Lines Matching refs:max_queue_ext
3899 struct ena_admin_queue_ext_feature_fields *max_queue_ext = in ena_calc_max_io_queue_num() local
3900 &get_feat_ctx->max_queue_ext.max_queue_ext; in ena_calc_max_io_queue_num()
3901 io_rx_num = min_t(u32, max_queue_ext->max_rx_sq_num, in ena_calc_max_io_queue_num()
3902 max_queue_ext->max_rx_cq_num); in ena_calc_max_io_queue_num()
3904 io_tx_sq_num = max_queue_ext->max_tx_sq_num; in ena_calc_max_io_queue_num()
3905 io_tx_cq_num = max_queue_ext->max_tx_cq_num; in ena_calc_max_io_queue_num()
4058 struct ena_admin_queue_ext_feature_fields *max_queue_ext = in ena_calc_io_queue_size() local
4059 &ctx->get_feat_ctx->max_queue_ext.max_queue_ext; in ena_calc_io_queue_size()
4060 max_rx_queue_size = min_t(u32, max_queue_ext->max_rx_cq_depth, in ena_calc_io_queue_size()
4061 max_queue_ext->max_rx_sq_depth); in ena_calc_io_queue_size()
4062 max_tx_queue_size = max_queue_ext->max_tx_cq_depth; in ena_calc_io_queue_size()
4069 max_queue_ext->max_tx_sq_depth); in ena_calc_io_queue_size()
4072 max_queue_ext->max_per_packet_tx_descs); in ena_calc_io_queue_size()
4074 max_queue_ext->max_per_packet_rx_descs); in ena_calc_io_queue_size()