25 	memset(buf, 0, size);  in sja1105_spi_message_pack()
57 	int rc, i = 0;  in sja1105_xfer()
80 	for (i = 0; i < num_chunks; i++) {  in sja1105_xfer()
94 			msg.read_count = 0;  in sja1105_xfer()
138 	if (rc < 0)  in sja1105_xfer()
171 		sja1105_pack(packed_buf, value, 63, 0, 8);  in sja1105_xfer_u64()
176 		sja1105_unpack(packed_buf, value, 63, 0, 8);  in sja1105_xfer_u64()
195 		sja1105_pack(packed_buf, &tmp, 31, 0, 4);  in sja1105_xfer_u32()
201 		sja1105_unpack(packed_buf, &tmp, 31, 0, 4);  in sja1105_xfer_u32()
212 	u8 packed_buf[SJA1105_SIZE_RESET_CMD] = {0};  in sja1105et_reset_cmd()
226 	u8 packed_buf[SJA1105_SIZE_RESET_CMD] = {0};  in sja1105pqrs_reset_cmd()
245 	if (rc < 0)  in sja1105_inhibit_tx()
276 	 * the register pointer, and never access p[0].  in sja1105_status_unpack()
279 	sja1105_unpack(p + 0x1, &status->configs,   31, 31, 4);  in sja1105_status_unpack()
280 	sja1105_unpack(p + 0x1, &status->crcchkl,   30, 30, 4);  in sja1105_status_unpack()
281 	sja1105_unpack(p + 0x1, &status->ids,       29, 29, 4);  in sja1105_status_unpack()
282 	sja1105_unpack(p + 0x1, &status->crcchkg,   28, 28, 4);  in sja1105_status_unpack()
293 	if (rc < 0)  in sja1105_status_get()
298 	return 0;  in sja1105_status_get()
323 	/* Recalculate CRC of the last header (right now 0xDEADBEEF).  in static_config_buf_prepare_for_upload()
335 	return 0;  in static_config_buf_prepare_for_upload()
342 	unsigned long port_bitmap = GENMASK_ULL(SJA1105_NUM_PORTS - 1, 0);  in sja1105_static_config_upload()
357 	if (rc < 0) {  in sja1105_static_config_upload()
367 	if (rc < 0) {  in sja1105_static_config_upload()
380 		if (rc < 0) {  in sja1105_static_config_upload()
389 		if (rc < 0) {  in sja1105_static_config_upload()
395 		if (rc < 0)  in sja1105_static_config_upload()
400 				"device id. Wrote 0x%llx, wants 0x%llx\n",  in sja1105_static_config_upload()
414 		if (status.configs == 0) {  in sja1105_static_config_upload()
437 	.device_id = 0x0,
438 	.prod_id = 0x100BC3,
439 	.status = 0x1,
440 	.port_control = 0x11,
441 	.vl_status = 0x10000,
442 	.config = 0x020000,
443 	.rgu = 0x100440,
445 	.pad_mii_tx = {0x100800, 0x100802, 0x100804, 0x100806, 0x100808},
446 	.pad_mii_rx = {0x100801, 0x100803, 0x100805, 0x100807, 0x100809},
447 	.rmii_pll1 = 0x10000A,
448 	.cgu_idiv = {0x10000B, 0x10000C, 0x10000D, 0x10000E, 0x10000F},
449 	.mac = {0x200, 0x202, 0x204, 0x206, 0x208},
450 	.mac_hl1 = {0x400, 0x410, 0x420, 0x430, 0x440},
451 	.mac_hl2 = {0x600, 0x610, 0x620, 0x630, 0x640},
453 	.mii_tx_clk = {0x100013, 0x10001A, 0x100021, 0x100028, 0x10002F},
454 	.mii_rx_clk = {0x100014, 0x10001B, 0x100022, 0x100029, 0x100030},
455 	.mii_ext_tx_clk = {0x100018, 0x10001F, 0x100026, 0x10002D, 0x100034},
456 	.mii_ext_rx_clk = {0x100019, 0x100020, 0x100027, 0x10002E, 0x100035},
457 	.rgmii_tx_clk = {0x100016, 0x10001D, 0x100024, 0x10002B, 0x100032},
458 	.rmii_ref_clk = {0x100015, 0x10001C, 0x100023, 0x10002A, 0x100031},
459 	.rmii_ext_tx_clk = {0x100018, 0x10001F, 0x100026, 0x10002D, 0x100034},
460 	.ptpegr_ts = {0xC0, 0xC2, 0xC4, 0xC6, 0xC8},
461 	.ptpschtm = 0x12, /* Spans 0x12 to 0x13 */
462 	.ptppinst = 0x14,
463 	.ptppindur = 0x16,
464 	.ptp_control = 0x17,
465 	.ptpclkval = 0x18, /* Spans 0x18 to 0x19 */
466 	.ptpclkrate = 0x1A,
467 	.ptpclkcorp = 0x1D,
471 	.device_id = 0x0,
472 	.prod_id = 0x100BC3,
473 	.status = 0x1,
474 	.port_control = 0x12,
475 	.vl_status = 0x10000,
476 	.config = 0x020000,
477 	.rgu = 0x100440,
479 	.pad_mii_tx = {0x100800, 0x100802, 0x100804, 0x100806, 0x100808},
480 	.pad_mii_rx = {0x100801, 0x100803, 0x100805, 0x100807, 0x100809},
481 	.pad_mii_id = {0x100810, 0x100811, 0x100812, 0x100813, 0x100814},
482 	.sgmii = 0x1F0000,
483 	.rmii_pll1 = 0x10000A,
484 	.cgu_idiv = {0x10000B, 0x10000C, 0x10000D, 0x10000E, 0x10000F},
485 	.mac = {0x200, 0x202, 0x204, 0x206, 0x208},
486 	.mac_hl1 = {0x400, 0x410, 0x420, 0x430, 0x440},
487 	.mac_hl2 = {0x600, 0x610, 0x620, 0x630, 0x640},
488 	.ether_stats = {0x1400, 0x1418, 0x1430, 0x1448, 0x1460},
490 	.mii_tx_clk = {0x100013, 0x100019, 0x10001F, 0x100025, 0x10002B},
491 	.mii_rx_clk = {0x100014, 0x10001A, 0x100020, 0x100026, 0x10002C},
492 	.mii_ext_tx_clk = {0x100017, 0x10001D, 0x100023, 0x100029, 0x10002F},
493 	.mii_ext_rx_clk = {0x100018, 0x10001E, 0x100024, 0x10002A, 0x100030},
494 	.rgmii_tx_clk = {0x100016, 0x10001C, 0x100022, 0x100028, 0x10002E},
495 	.rmii_ref_clk = {0x100015, 0x10001B, 0x100021, 0x100027, 0x10002D},
496 	.rmii_ext_tx_clk = {0x100017, 0x10001D, 0x100023, 0x100029, 0x10002F},
497 	.qlevel = {0x604, 0x614, 0x624, 0x634, 0x644},
498 	.ptpegr_ts = {0xC0, 0xC4, 0xC8, 0xCC, 0xD0},
499 	.ptpschtm = 0x13, /* Spans 0x13 to 0x14 */
500 	.ptppinst = 0x15,
501 	.ptppindur = 0x17,
502 	.ptp_control = 0x18,
503 	.ptpclkval = 0x19,
504 	.ptpclkrate = 0x1B,
505 	.ptpclkcorp = 0x1E,
506 	.ptpsyncts = 0x1F,