Lines Matching +full:power +full:- +full:role
1 // SPDX-License-Identifier: BSD-3-Clause
2 /* Copyright (c) 2016-2018, NXP Semiconductors
3 * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com>
99 sja1105_packing(buf, &idiv->clksrc, 28, 24, size, op); in sja1105_cgu_idiv_packing()
100 sja1105_packing(buf, &idiv->autoblock, 11, 11, size, op); in sja1105_cgu_idiv_packing()
101 sja1105_packing(buf, &idiv->idiv, 5, 2, size, op); in sja1105_cgu_idiv_packing()
102 sja1105_packing(buf, &idiv->pd, 0, 0, size, op); in sja1105_cgu_idiv_packing()
108 const struct sja1105_regs *regs = priv->info->regs; in sja1105_cgu_idiv_config()
109 struct device *dev = priv->ds->dev; in sja1105_cgu_idiv_config()
115 return -ERANGE; in sja1105_cgu_idiv_config()
121 idiv.idiv = factor - 1; /* Divide by 1 or 10 */ in sja1105_cgu_idiv_config()
122 idiv.pd = enabled ? 0 : 1; /* Power down? */ in sja1105_cgu_idiv_config()
125 return sja1105_xfer_buf(priv, SPI_WRITE, regs->cgu_idiv[port], in sja1105_cgu_idiv_config()
135 sja1105_packing(buf, &cmd->clksrc, 28, 24, size, op); in sja1105_cgu_mii_control_packing()
136 sja1105_packing(buf, &cmd->autoblock, 11, 11, size, op); in sja1105_cgu_mii_control_packing()
137 sja1105_packing(buf, &cmd->pd, 0, 0, size, op); in sja1105_cgu_mii_control_packing()
141 int port, sja1105_mii_role_t role) in sja1105_cgu_mii_tx_clk_config() argument
143 const struct sja1105_regs *regs = priv->info->regs; in sja1105_cgu_mii_tx_clk_config()
162 if (role == XMII_MAC) in sja1105_cgu_mii_tx_clk_config()
170 mii_tx_clk.pd = 0; /* Power Down off => enabled */ in sja1105_cgu_mii_tx_clk_config()
173 return sja1105_xfer_buf(priv, SPI_WRITE, regs->mii_tx_clk[port], in sja1105_cgu_mii_tx_clk_config()
180 const struct sja1105_regs *regs = priv->info->regs; in sja1105_cgu_mii_rx_clk_config()
194 mii_rx_clk.pd = 0; /* Power Down off => enabled */ in sja1105_cgu_mii_rx_clk_config()
197 return sja1105_xfer_buf(priv, SPI_WRITE, regs->mii_rx_clk[port], in sja1105_cgu_mii_rx_clk_config()
204 const struct sja1105_regs *regs = priv->info->regs; in sja1105_cgu_mii_ext_tx_clk_config()
218 mii_ext_tx_clk.pd = 0; /* Power Down off => enabled */ in sja1105_cgu_mii_ext_tx_clk_config()
221 return sja1105_xfer_buf(priv, SPI_WRITE, regs->mii_ext_tx_clk[port], in sja1105_cgu_mii_ext_tx_clk_config()
228 const struct sja1105_regs *regs = priv->info->regs; in sja1105_cgu_mii_ext_rx_clk_config()
242 mii_ext_rx_clk.pd = 0; /* Power Down off => enabled */ in sja1105_cgu_mii_ext_rx_clk_config()
245 return sja1105_xfer_buf(priv, SPI_WRITE, regs->mii_ext_rx_clk[port], in sja1105_cgu_mii_ext_rx_clk_config()
250 sja1105_mii_role_t role) in sja1105_mii_clocking_setup() argument
252 struct device *dev = priv->ds->dev; in sja1105_mii_clocking_setup()
255 dev_dbg(dev, "Configuring MII-%s clocking\n", in sja1105_mii_clocking_setup()
256 (role == XMII_MAC) ? "MAC" : "PHY"); in sja1105_mii_clocking_setup()
257 /* If role is MAC, disable IDIV in sja1105_mii_clocking_setup()
258 * If role is PHY, enable IDIV and configure for 1/1 divider in sja1105_mii_clocking_setup()
260 rc = sja1105_cgu_idiv_config(priv, port, (role == XMII_PHY), 1); in sja1105_mii_clocking_setup()
265 * * If role is MAC, select TX_CLK_n in sja1105_mii_clocking_setup()
266 * * If role is PHY, select IDIV_n in sja1105_mii_clocking_setup()
268 rc = sja1105_cgu_mii_tx_clk_config(priv, port, role); in sja1105_mii_clocking_setup()
279 if (role == XMII_PHY) { in sja1105_mii_clocking_setup()
305 sja1105_packing(buf, &cmd->pllclksrc, 28, 24, size, op); in sja1105_cgu_pll_control_packing()
306 sja1105_packing(buf, &cmd->msel, 23, 16, size, op); in sja1105_cgu_pll_control_packing()
307 sja1105_packing(buf, &cmd->autoblock, 11, 11, size, op); in sja1105_cgu_pll_control_packing()
308 sja1105_packing(buf, &cmd->psel, 9, 8, size, op); in sja1105_cgu_pll_control_packing()
309 sja1105_packing(buf, &cmd->direct, 7, 7, size, op); in sja1105_cgu_pll_control_packing()
310 sja1105_packing(buf, &cmd->fbsel, 6, 6, size, op); in sja1105_cgu_pll_control_packing()
311 sja1105_packing(buf, &cmd->bypass, 1, 1, size, op); in sja1105_cgu_pll_control_packing()
312 sja1105_packing(buf, &cmd->pd, 0, 0, size, op); in sja1105_cgu_pll_control_packing()
318 const struct sja1105_regs *regs = priv->info->regs; in sja1105_cgu_rgmii_tx_clk_config()
335 /* Power Down off => enabled */ in sja1105_cgu_rgmii_tx_clk_config()
339 return sja1105_xfer_buf(priv, SPI_WRITE, regs->rgmii_tx_clk[port], in sja1105_cgu_rgmii_tx_clk_config()
350 sja1105_packing(buf, &cmd->d32_os, 28, 27, size, op); in sja1105_cfg_pad_mii_packing()
351 sja1105_packing(buf, &cmd->d32_ih, 26, 26, size, op); in sja1105_cfg_pad_mii_packing()
352 sja1105_packing(buf, &cmd->d32_ipud, 25, 24, size, op); in sja1105_cfg_pad_mii_packing()
353 sja1105_packing(buf, &cmd->d10_os, 20, 19, size, op); in sja1105_cfg_pad_mii_packing()
354 sja1105_packing(buf, &cmd->d10_ih, 18, 18, size, op); in sja1105_cfg_pad_mii_packing()
355 sja1105_packing(buf, &cmd->d10_ipud, 17, 16, size, op); in sja1105_cfg_pad_mii_packing()
356 sja1105_packing(buf, &cmd->ctrl_os, 12, 11, size, op); in sja1105_cfg_pad_mii_packing()
357 sja1105_packing(buf, &cmd->ctrl_ih, 10, 10, size, op); in sja1105_cfg_pad_mii_packing()
358 sja1105_packing(buf, &cmd->ctrl_ipud, 9, 8, size, op); in sja1105_cfg_pad_mii_packing()
359 sja1105_packing(buf, &cmd->clk_os, 4, 3, size, op); in sja1105_cfg_pad_mii_packing()
360 sja1105_packing(buf, &cmd->clk_ih, 2, 2, size, op); in sja1105_cfg_pad_mii_packing()
361 sja1105_packing(buf, &cmd->clk_ipud, 1, 0, size, op); in sja1105_cfg_pad_mii_packing()
367 const struct sja1105_regs *regs = priv->info->regs; in sja1105_rgmii_cfg_pad_tx_config()
387 return sja1105_xfer_buf(priv, SPI_WRITE, regs->pad_mii_tx[port], in sja1105_rgmii_cfg_pad_tx_config()
393 const struct sja1105_regs *regs = priv->info->regs; in sja1105_cfg_pad_rx_config()
399 /* non-Schmitt (default) */ in sja1105_cfg_pad_rx_config()
400 pad_mii_rx.d32_ipud = 2; /* RXD[3:2] input weak pull-up/down */ in sja1105_cfg_pad_rx_config()
403 /* non-Schmitt (default) */ in sja1105_cfg_pad_rx_config()
404 pad_mii_rx.d10_ipud = 2; /* RXD[1:0] input weak pull-up/down */ in sja1105_cfg_pad_rx_config()
408 /* non-Schmitt (default) */ in sja1105_cfg_pad_rx_config()
410 /* input stage weak pull-up/down: */ in sja1105_cfg_pad_rx_config()
411 /* pull-down */ in sja1105_cfg_pad_rx_config()
415 /* non-Schmitt (default) */ in sja1105_cfg_pad_rx_config()
416 pad_mii_rx.clk_ipud = 2; /* RX_CLK/RXC input pull-up/down: */ in sja1105_cfg_pad_rx_config()
420 return sja1105_xfer_buf(priv, SPI_WRITE, regs->pad_mii_rx[port], in sja1105_cfg_pad_rx_config()
430 sja1105_packing(buf, &cmd->rxc_stable_ovr, 15, 15, size, op); in sja1105_cfg_pad_mii_id_packing()
431 sja1105_packing(buf, &cmd->rxc_delay, 14, 10, size, op); in sja1105_cfg_pad_mii_id_packing()
432 sja1105_packing(buf, &cmd->rxc_bypass, 9, 9, size, op); in sja1105_cfg_pad_mii_id_packing()
433 sja1105_packing(buf, &cmd->rxc_pd, 8, 8, size, op); in sja1105_cfg_pad_mii_id_packing()
434 sja1105_packing(buf, &cmd->txc_stable_ovr, 7, 7, size, op); in sja1105_cfg_pad_mii_id_packing()
435 sja1105_packing(buf, &cmd->txc_delay, 6, 2, size, op); in sja1105_cfg_pad_mii_id_packing()
436 sja1105_packing(buf, &cmd->txc_bypass, 1, 1, size, op); in sja1105_cfg_pad_mii_id_packing()
437 sja1105_packing(buf, &cmd->txc_pd, 0, 0, size, op); in sja1105_cfg_pad_mii_id_packing()
448 return (phase - 738) / 9; in sja1105_rgmii_delay()
451 /* The RGMII delay setup procedure is 2-step and gets called upon each
455 * The easiest way to recover from this is to temporarily power down the TDL,
456 * as it will re-lock at the new frequency afterwards.
461 const struct sja1105_regs *regs = priv->info->regs; in sja1105pqrs_setup_rgmii_delay()
466 if (priv->rgmii_rx_delay[port]) in sja1105pqrs_setup_rgmii_delay()
468 if (priv->rgmii_tx_delay[port]) in sja1105pqrs_setup_rgmii_delay()
478 rc = sja1105_xfer_buf(priv, SPI_WRITE, regs->pad_mii_id[port], in sja1105pqrs_setup_rgmii_delay()
484 if (priv->rgmii_rx_delay[port]) { in sja1105pqrs_setup_rgmii_delay()
488 if (priv->rgmii_tx_delay[port]) { in sja1105pqrs_setup_rgmii_delay()
494 return sja1105_xfer_buf(priv, SPI_WRITE, regs->pad_mii_id[port], in sja1105pqrs_setup_rgmii_delay()
499 sja1105_mii_role_t role) in sja1105_rgmii_clocking_setup() argument
501 struct device *dev = priv->ds->dev; in sja1105_rgmii_clocking_setup()
506 mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries; in sja1105_rgmii_clocking_setup()
532 rc = -EINVAL; in sja1105_rgmii_clocking_setup()
549 if (!priv->info->setup_rgmii_delay) in sja1105_rgmii_clocking_setup()
551 /* The role has no hardware effect for RGMII. However we use it as in sja1105_rgmii_clocking_setup()
552 * a proxy for this interface being a MAC-to-MAC connection, with in sja1105_rgmii_clocking_setup()
555 if (role == XMII_MAC) in sja1105_rgmii_clocking_setup()
558 return priv->info->setup_rgmii_delay(priv, port); in sja1105_rgmii_clocking_setup()
564 const struct sja1105_regs *regs = priv->info->regs; in sja1105_cgu_rmii_ref_clk_config()
578 ref_clk.pd = 0; /* Power Down off => enabled */ in sja1105_cgu_rmii_ref_clk_config()
581 return sja1105_xfer_buf(priv, SPI_WRITE, regs->rmii_ref_clk[port], in sja1105_cgu_rmii_ref_clk_config()
588 const struct sja1105_regs *regs = priv->info->regs; in sja1105_cgu_rmii_ext_tx_clk_config()
595 ext_tx_clk.pd = 0; /* Power Down off => enabled */ in sja1105_cgu_rmii_ext_tx_clk_config()
598 return sja1105_xfer_buf(priv, SPI_WRITE, regs->rmii_ext_tx_clk[port], in sja1105_cgu_rmii_ext_tx_clk_config()
604 const struct sja1105_regs *regs = priv->info->regs; in sja1105_cgu_rmii_pll_config()
607 struct device *dev = priv->ds->dev; in sja1105_cgu_rmii_pll_config()
613 * power down (PD) 0x0A010940. in sja1105_cgu_rmii_pll_config()
627 rc = sja1105_xfer_buf(priv, SPI_WRITE, regs->rmii_pll1, packed_buf, in sja1105_cgu_rmii_pll_config()
638 rc = sja1105_xfer_buf(priv, SPI_WRITE, regs->rmii_pll1, packed_buf, in sja1105_cgu_rmii_pll_config()
648 sja1105_mii_role_t role) in sja1105_rmii_clocking_setup() argument
650 struct device *dev = priv->ds->dev; in sja1105_rmii_clocking_setup()
653 dev_dbg(dev, "Configuring RMII-%s clocking\n", in sja1105_rmii_clocking_setup()
654 (role == XMII_MAC) ? "MAC" : "PHY"); in sja1105_rmii_clocking_setup()
656 if (role == XMII_MAC) { in sja1105_rmii_clocking_setup()
670 if (role == XMII_MAC) { in sja1105_rmii_clocking_setup()
681 struct device *dev = priv->ds->dev; in sja1105_clocking_setup_port()
683 sja1105_mii_role_t role; in sja1105_clocking_setup_port() local
686 mii = priv->static_config.tables[BLK_IDX_XMII_PARAMS].entries; in sja1105_clocking_setup_port()
689 phy_mode = mii->xmii_mode[port]; in sja1105_clocking_setup_port()
691 role = mii->phy_mac[port]; in sja1105_clocking_setup_port()
695 rc = sja1105_mii_clocking_setup(priv, port, role); in sja1105_clocking_setup_port()
698 rc = sja1105_rmii_clocking_setup(priv, port, role); in sja1105_clocking_setup_port()
701 rc = sja1105_rgmii_clocking_setup(priv, port, role); in sja1105_clocking_setup_port()
710 return -EINVAL; in sja1105_clocking_setup_port()