Lines Matching full:chip
15 #include "chip.h"
19 int mv88e6xxx_g2_read(struct mv88e6xxx_chip *chip, int reg, u16 *val) in mv88e6xxx_g2_read() argument
21 return mv88e6xxx_read(chip, chip->info->global2_addr, reg, val); in mv88e6xxx_g2_read()
24 int mv88e6xxx_g2_write(struct mv88e6xxx_chip *chip, int reg, u16 val) in mv88e6xxx_g2_write() argument
26 return mv88e6xxx_write(chip, chip->info->global2_addr, reg, val); in mv88e6xxx_g2_write()
29 int mv88e6xxx_g2_wait_bit(struct mv88e6xxx_chip *chip, int reg, int in mv88e6xxx_g2_wait_bit() argument
32 return mv88e6xxx_wait_bit(chip, chip->info->global2_addr, reg, in mv88e6xxx_g2_wait_bit()
38 static int mv88e6xxx_g2_int_source(struct mv88e6xxx_chip *chip, u16 *src) in mv88e6xxx_g2_int_source() argument
41 return mv88e6xxx_g2_read(chip, MV88E6XXX_G2_INT_SRC, src); in mv88e6xxx_g2_int_source()
46 static int mv88e6xxx_g2_int_mask(struct mv88e6xxx_chip *chip, u16 mask) in mv88e6xxx_g2_int_mask() argument
48 return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_INT_MASK, mask); in mv88e6xxx_g2_int_mask()
53 static int mv88e6xxx_g2_mgmt_enable_2x(struct mv88e6xxx_chip *chip, u16 en2x) in mv88e6xxx_g2_mgmt_enable_2x() argument
55 return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_MGMT_EN_2X, en2x); in mv88e6xxx_g2_mgmt_enable_2x()
60 static int mv88e6xxx_g2_mgmt_enable_0x(struct mv88e6xxx_chip *chip, u16 en0x) in mv88e6xxx_g2_mgmt_enable_0x() argument
62 return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_MGMT_EN_0X, en0x); in mv88e6xxx_g2_mgmt_enable_0x()
67 static int mv88e6xxx_g2_switch_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_switch_mgmt_rsvd2cpu() argument
73 err = mv88e6xxx_g2_read(chip, MV88E6XXX_G2_SWITCH_MGMT, &val); in mv88e6xxx_g2_switch_mgmt_rsvd2cpu()
82 return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_SWITCH_MGMT, val); in mv88e6xxx_g2_switch_mgmt_rsvd2cpu()
85 int mv88e6185_g2_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip) in mv88e6185_g2_mgmt_rsvd2cpu() argument
92 err = mv88e6xxx_g2_mgmt_enable_0x(chip, 0xffff); in mv88e6185_g2_mgmt_rsvd2cpu()
96 return mv88e6xxx_g2_switch_mgmt_rsvd2cpu(chip, true); in mv88e6185_g2_mgmt_rsvd2cpu()
99 int mv88e6352_g2_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip) in mv88e6352_g2_mgmt_rsvd2cpu() argument
106 err = mv88e6xxx_g2_mgmt_enable_2x(chip, 0xffff); in mv88e6352_g2_mgmt_rsvd2cpu()
110 return mv88e6185_g2_mgmt_rsvd2cpu(chip); in mv88e6352_g2_mgmt_rsvd2cpu()
115 int mv88e6xxx_g2_device_mapping_write(struct mv88e6xxx_chip *chip, int target, in mv88e6xxx_g2_device_mapping_write() argument
123 return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_DEVICE_MAPPING, in mv88e6xxx_g2_device_mapping_write()
129 static int mv88e6xxx_g2_trunk_mask_write(struct mv88e6xxx_chip *chip, int num, in mv88e6xxx_g2_trunk_mask_write() argument
132 u16 val = (num << 12) | (mask & mv88e6xxx_port_mask(chip)); in mv88e6xxx_g2_trunk_mask_write()
137 return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_TRUNK_MASK, in mv88e6xxx_g2_trunk_mask_write()
143 static int mv88e6xxx_g2_trunk_mapping_write(struct mv88e6xxx_chip *chip, int id, in mv88e6xxx_g2_trunk_mapping_write() argument
146 const u16 port_mask = BIT(mv88e6xxx_num_ports(chip)) - 1; in mv88e6xxx_g2_trunk_mapping_write()
149 return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_TRUNK_MAPPING, in mv88e6xxx_g2_trunk_mapping_write()
153 int mv88e6xxx_g2_trunk_clear(struct mv88e6xxx_chip *chip) in mv88e6xxx_g2_trunk_clear() argument
155 const u16 port_mask = BIT(mv88e6xxx_num_ports(chip)) - 1; in mv88e6xxx_g2_trunk_clear()
160 err = mv88e6xxx_g2_trunk_mask_write(chip, i, false, port_mask); in mv88e6xxx_g2_trunk_clear()
167 err = mv88e6xxx_g2_trunk_mapping_write(chip, i, 0); in mv88e6xxx_g2_trunk_clear()
179 static int mv88e6xxx_g2_irl_wait(struct mv88e6xxx_chip *chip) in mv88e6xxx_g2_irl_wait() argument
183 return mv88e6xxx_g2_wait_bit(chip, MV88E6XXX_G2_IRL_CMD, bit, 0); in mv88e6xxx_g2_irl_wait()
186 static int mv88e6xxx_g2_irl_op(struct mv88e6xxx_chip *chip, u16 op, int port, in mv88e6xxx_g2_irl_op() argument
191 err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_IRL_CMD, in mv88e6xxx_g2_irl_op()
197 return mv88e6xxx_g2_irl_wait(chip); in mv88e6xxx_g2_irl_op()
200 int mv88e6352_g2_irl_init_all(struct mv88e6xxx_chip *chip, int port) in mv88e6352_g2_irl_init_all() argument
202 return mv88e6xxx_g2_irl_op(chip, MV88E6352_G2_IRL_CMD_OP_INIT_ALL, port, in mv88e6352_g2_irl_init_all()
206 int mv88e6390_g2_irl_init_all(struct mv88e6xxx_chip *chip, int port) in mv88e6390_g2_irl_init_all() argument
208 return mv88e6xxx_g2_irl_op(chip, MV88E6390_G2_IRL_CMD_OP_INIT_ALL, port, in mv88e6390_g2_irl_init_all()
212 /* Offset 0x0B: Cross-chip Port VLAN (Addr) Register
213 * Offset 0x0C: Cross-chip Port VLAN Data Register
216 static int mv88e6xxx_g2_pvt_op_wait(struct mv88e6xxx_chip *chip) in mv88e6xxx_g2_pvt_op_wait() argument
220 return mv88e6xxx_g2_wait_bit(chip, MV88E6XXX_G2_PVT_ADDR, bit, 0); in mv88e6xxx_g2_pvt_op_wait()
223 static int mv88e6xxx_g2_pvt_op(struct mv88e6xxx_chip *chip, int src_dev, in mv88e6xxx_g2_pvt_op() argument
228 /* 9-bit Cross-chip PVT pointer: with MV88E6XXX_G2_MISC_5_BIT_PORT in mv88e6xxx_g2_pvt_op()
235 err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_PVT_ADDR, op); in mv88e6xxx_g2_pvt_op()
239 return mv88e6xxx_g2_pvt_op_wait(chip); in mv88e6xxx_g2_pvt_op()
242 int mv88e6xxx_g2_pvt_write(struct mv88e6xxx_chip *chip, int src_dev, in mv88e6xxx_g2_pvt_write() argument
247 err = mv88e6xxx_g2_pvt_op_wait(chip); in mv88e6xxx_g2_pvt_write()
251 err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_PVT_DATA, data); in mv88e6xxx_g2_pvt_write()
255 return mv88e6xxx_g2_pvt_op(chip, src_dev, src_port, in mv88e6xxx_g2_pvt_write()
261 static int mv88e6xxx_g2_switch_mac_write(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_switch_mac_write() argument
266 return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_SWITCH_MAC, in mv88e6xxx_g2_switch_mac_write()
270 int mv88e6xxx_g2_set_switch_mac(struct mv88e6xxx_chip *chip, u8 *addr) in mv88e6xxx_g2_set_switch_mac() argument
275 err = mv88e6xxx_g2_switch_mac_write(chip, i, addr[i]); in mv88e6xxx_g2_set_switch_mac()
285 int mv88e6xxx_g2_atu_stats_set(struct mv88e6xxx_chip *chip, u16 kind, u16 bin) in mv88e6xxx_g2_atu_stats_set() argument
287 return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_ATU_STATS, in mv88e6xxx_g2_atu_stats_set()
291 int mv88e6xxx_g2_atu_stats_get(struct mv88e6xxx_chip *chip, u16 *stats) in mv88e6xxx_g2_atu_stats_get() argument
293 return mv88e6xxx_g2_read(chip, MV88E6XXX_G2_ATU_STATS, stats); in mv88e6xxx_g2_atu_stats_get()
298 static int mv88e6xxx_g2_pot_write(struct mv88e6xxx_chip *chip, int pointer, in mv88e6xxx_g2_pot_write() argument
303 return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_PRIO_OVERRIDE, in mv88e6xxx_g2_pot_write()
307 int mv88e6xxx_g2_pot_clear(struct mv88e6xxx_chip *chip) in mv88e6xxx_g2_pot_clear() argument
313 err = mv88e6xxx_g2_pot_write(chip, i, 0); in mv88e6xxx_g2_pot_clear()
326 static int mv88e6xxx_g2_eeprom_wait(struct mv88e6xxx_chip *chip) in mv88e6xxx_g2_eeprom_wait() argument
331 err = mv88e6xxx_g2_wait_bit(chip, MV88E6XXX_G2_EEPROM_CMD, bit, 0); in mv88e6xxx_g2_eeprom_wait()
337 return mv88e6xxx_g2_wait_bit(chip, MV88E6XXX_G2_EEPROM_CMD, bit, 0); in mv88e6xxx_g2_eeprom_wait()
340 static int mv88e6xxx_g2_eeprom_cmd(struct mv88e6xxx_chip *chip, u16 cmd) in mv88e6xxx_g2_eeprom_cmd() argument
344 err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_EEPROM_CMD, in mv88e6xxx_g2_eeprom_cmd()
349 return mv88e6xxx_g2_eeprom_wait(chip); in mv88e6xxx_g2_eeprom_cmd()
352 static int mv88e6xxx_g2_eeprom_read8(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_eeprom_read8() argument
358 err = mv88e6xxx_g2_eeprom_wait(chip); in mv88e6xxx_g2_eeprom_read8()
362 err = mv88e6xxx_g2_write(chip, MV88E6390_G2_EEPROM_ADDR, addr); in mv88e6xxx_g2_eeprom_read8()
366 err = mv88e6xxx_g2_eeprom_cmd(chip, cmd); in mv88e6xxx_g2_eeprom_read8()
370 err = mv88e6xxx_g2_read(chip, MV88E6XXX_G2_EEPROM_CMD, &cmd); in mv88e6xxx_g2_eeprom_read8()
379 static int mv88e6xxx_g2_eeprom_write8(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_eeprom_write8() argument
386 err = mv88e6xxx_g2_eeprom_wait(chip); in mv88e6xxx_g2_eeprom_write8()
390 err = mv88e6xxx_g2_write(chip, MV88E6390_G2_EEPROM_ADDR, addr); in mv88e6xxx_g2_eeprom_write8()
394 return mv88e6xxx_g2_eeprom_cmd(chip, cmd | data); in mv88e6xxx_g2_eeprom_write8()
397 static int mv88e6xxx_g2_eeprom_read16(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_eeprom_read16() argument
403 err = mv88e6xxx_g2_eeprom_wait(chip); in mv88e6xxx_g2_eeprom_read16()
407 err = mv88e6xxx_g2_eeprom_cmd(chip, cmd); in mv88e6xxx_g2_eeprom_read16()
411 return mv88e6xxx_g2_read(chip, MV88E6352_G2_EEPROM_DATA, data); in mv88e6xxx_g2_eeprom_read16()
414 static int mv88e6xxx_g2_eeprom_write16(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_eeprom_write16() argument
420 err = mv88e6xxx_g2_eeprom_wait(chip); in mv88e6xxx_g2_eeprom_write16()
424 err = mv88e6xxx_g2_write(chip, MV88E6352_G2_EEPROM_DATA, data); in mv88e6xxx_g2_eeprom_write16()
428 return mv88e6xxx_g2_eeprom_cmd(chip, cmd); in mv88e6xxx_g2_eeprom_write16()
431 int mv88e6xxx_g2_get_eeprom8(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_get_eeprom8() argument
441 err = mv88e6xxx_g2_eeprom_read8(chip, offset, data); in mv88e6xxx_g2_get_eeprom8()
454 int mv88e6xxx_g2_set_eeprom8(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_set_eeprom8() argument
464 err = mv88e6xxx_g2_eeprom_write8(chip, offset, *data); in mv88e6xxx_g2_set_eeprom8()
477 int mv88e6xxx_g2_get_eeprom16(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_get_eeprom16() argument
488 err = mv88e6xxx_g2_eeprom_read16(chip, offset >> 1, &val); in mv88e6xxx_g2_get_eeprom16()
500 err = mv88e6xxx_g2_eeprom_read16(chip, offset >> 1, &val); in mv88e6xxx_g2_get_eeprom16()
513 err = mv88e6xxx_g2_eeprom_read16(chip, offset >> 1, &val); in mv88e6xxx_g2_get_eeprom16()
527 int mv88e6xxx_g2_set_eeprom16(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_set_eeprom16() argument
536 err = mv88e6xxx_g2_read(chip, MV88E6XXX_G2_EEPROM_CMD, &val); in mv88e6xxx_g2_set_eeprom16()
546 err = mv88e6xxx_g2_eeprom_read16(chip, offset >> 1, &val); in mv88e6xxx_g2_set_eeprom16()
552 err = mv88e6xxx_g2_eeprom_write16(chip, offset >> 1, val); in mv88e6xxx_g2_set_eeprom16()
565 err = mv88e6xxx_g2_eeprom_write16(chip, offset >> 1, val); in mv88e6xxx_g2_set_eeprom16()
575 err = mv88e6xxx_g2_eeprom_read16(chip, offset >> 1, &val); in mv88e6xxx_g2_set_eeprom16()
581 err = mv88e6xxx_g2_eeprom_write16(chip, offset >> 1, val); in mv88e6xxx_g2_set_eeprom16()
597 static int mv88e6xxx_g2_smi_phy_wait(struct mv88e6xxx_chip *chip) in mv88e6xxx_g2_smi_phy_wait() argument
601 return mv88e6xxx_g2_wait_bit(chip, MV88E6XXX_G2_SMI_PHY_CMD, bit, 0); in mv88e6xxx_g2_smi_phy_wait()
604 static int mv88e6xxx_g2_smi_phy_cmd(struct mv88e6xxx_chip *chip, u16 cmd) in mv88e6xxx_g2_smi_phy_cmd() argument
608 err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_SMI_PHY_CMD, in mv88e6xxx_g2_smi_phy_cmd()
613 return mv88e6xxx_g2_smi_phy_wait(chip); in mv88e6xxx_g2_smi_phy_cmd()
616 static int mv88e6xxx_g2_smi_phy_access(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_smi_phy_access() argument
636 return mv88e6xxx_g2_smi_phy_cmd(chip, cmd); in mv88e6xxx_g2_smi_phy_access()
639 static int mv88e6xxx_g2_smi_phy_access_c22(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_smi_phy_access_c22() argument
643 return mv88e6xxx_g2_smi_phy_access(chip, external, false, op, dev, reg); in mv88e6xxx_g2_smi_phy_access_c22()
647 static int mv88e6xxx_g2_smi_phy_read_data_c22(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_smi_phy_read_data_c22() argument
654 err = mv88e6xxx_g2_smi_phy_wait(chip); in mv88e6xxx_g2_smi_phy_read_data_c22()
658 err = mv88e6xxx_g2_smi_phy_access_c22(chip, external, op, dev, reg); in mv88e6xxx_g2_smi_phy_read_data_c22()
662 return mv88e6xxx_g2_read(chip, MV88E6XXX_G2_SMI_PHY_DATA, data); in mv88e6xxx_g2_smi_phy_read_data_c22()
666 static int mv88e6xxx_g2_smi_phy_write_data_c22(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_smi_phy_write_data_c22() argument
673 err = mv88e6xxx_g2_smi_phy_wait(chip); in mv88e6xxx_g2_smi_phy_write_data_c22()
677 err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_SMI_PHY_DATA, data); in mv88e6xxx_g2_smi_phy_write_data_c22()
681 return mv88e6xxx_g2_smi_phy_access_c22(chip, external, op, dev, reg); in mv88e6xxx_g2_smi_phy_write_data_c22()
684 static int mv88e6xxx_g2_smi_phy_access_c45(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_smi_phy_access_c45() argument
688 return mv88e6xxx_g2_smi_phy_access(chip, external, true, op, port, dev); in mv88e6xxx_g2_smi_phy_access_c45()
692 static int mv88e6xxx_g2_smi_phy_write_addr_c45(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_smi_phy_write_addr_c45() argument
699 err = mv88e6xxx_g2_smi_phy_wait(chip); in mv88e6xxx_g2_smi_phy_write_addr_c45()
703 err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_SMI_PHY_DATA, addr); in mv88e6xxx_g2_smi_phy_write_addr_c45()
707 return mv88e6xxx_g2_smi_phy_access_c45(chip, external, op, port, dev); in mv88e6xxx_g2_smi_phy_write_addr_c45()
711 static int mv88e6xxx_g2_smi_phy_read_data_c45(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_smi_phy_read_data_c45() argument
718 err = mv88e6xxx_g2_smi_phy_access_c45(chip, external, op, port, dev); in mv88e6xxx_g2_smi_phy_read_data_c45()
722 return mv88e6xxx_g2_read(chip, MV88E6XXX_G2_SMI_PHY_DATA, data); in mv88e6xxx_g2_smi_phy_read_data_c45()
725 static int mv88e6xxx_g2_smi_phy_read_c45(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_smi_phy_read_c45() argument
733 err = mv88e6xxx_g2_smi_phy_write_addr_c45(chip, external, port, dev, in mv88e6xxx_g2_smi_phy_read_c45()
738 return mv88e6xxx_g2_smi_phy_read_data_c45(chip, external, port, dev, in mv88e6xxx_g2_smi_phy_read_c45()
743 static int mv88e6xxx_g2_smi_phy_write_data_c45(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_smi_phy_write_data_c45() argument
750 err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_SMI_PHY_DATA, data); in mv88e6xxx_g2_smi_phy_write_data_c45()
754 return mv88e6xxx_g2_smi_phy_access_c45(chip, external, op, port, dev); in mv88e6xxx_g2_smi_phy_write_data_c45()
757 static int mv88e6xxx_g2_smi_phy_write_c45(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_smi_phy_write_c45() argument
765 err = mv88e6xxx_g2_smi_phy_write_addr_c45(chip, external, port, dev, in mv88e6xxx_g2_smi_phy_write_c45()
770 return mv88e6xxx_g2_smi_phy_write_data_c45(chip, external, port, dev, in mv88e6xxx_g2_smi_phy_write_c45()
774 int mv88e6xxx_g2_smi_phy_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus, in mv88e6xxx_g2_smi_phy_read() argument
781 return mv88e6xxx_g2_smi_phy_read_c45(chip, external, addr, reg, in mv88e6xxx_g2_smi_phy_read()
784 return mv88e6xxx_g2_smi_phy_read_data_c22(chip, external, addr, reg, in mv88e6xxx_g2_smi_phy_read()
788 int mv88e6xxx_g2_smi_phy_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus, in mv88e6xxx_g2_smi_phy_write() argument
795 return mv88e6xxx_g2_smi_phy_write_c45(chip, external, addr, reg, in mv88e6xxx_g2_smi_phy_write()
798 return mv88e6xxx_g2_smi_phy_write_data_c22(chip, external, addr, reg, in mv88e6xxx_g2_smi_phy_write()
803 static int mv88e6097_watchdog_action(struct mv88e6xxx_chip *chip, int irq) in mv88e6097_watchdog_action() argument
807 mv88e6xxx_g2_read(chip, MV88E6352_G2_WDOG_CTL, ®); in mv88e6097_watchdog_action()
809 dev_info(chip->dev, "Watchdog event: 0x%04x", reg); in mv88e6097_watchdog_action()
814 static void mv88e6097_watchdog_free(struct mv88e6xxx_chip *chip) in mv88e6097_watchdog_free() argument
818 mv88e6xxx_g2_read(chip, MV88E6352_G2_WDOG_CTL, ®); in mv88e6097_watchdog_free()
823 mv88e6xxx_g2_write(chip, MV88E6352_G2_WDOG_CTL, reg); in mv88e6097_watchdog_free()
826 static int mv88e6097_watchdog_setup(struct mv88e6xxx_chip *chip) in mv88e6097_watchdog_setup() argument
828 return mv88e6xxx_g2_write(chip, MV88E6352_G2_WDOG_CTL, in mv88e6097_watchdog_setup()
840 static void mv88e6250_watchdog_free(struct mv88e6xxx_chip *chip) in mv88e6250_watchdog_free() argument
844 mv88e6xxx_g2_read(chip, MV88E6250_G2_WDOG_CTL, ®); in mv88e6250_watchdog_free()
849 mv88e6xxx_g2_write(chip, MV88E6250_G2_WDOG_CTL, reg); in mv88e6250_watchdog_free()
852 static int mv88e6250_watchdog_setup(struct mv88e6xxx_chip *chip) in mv88e6250_watchdog_setup() argument
854 return mv88e6xxx_g2_write(chip, MV88E6250_G2_WDOG_CTL, in mv88e6250_watchdog_setup()
866 static int mv88e6390_watchdog_setup(struct mv88e6xxx_chip *chip) in mv88e6390_watchdog_setup() argument
868 return mv88e6xxx_g2_write(chip, MV88E6390_G2_WDOG_CTL, in mv88e6390_watchdog_setup()
877 static int mv88e6390_watchdog_action(struct mv88e6xxx_chip *chip, int irq) in mv88e6390_watchdog_action() argument
881 mv88e6xxx_g2_write(chip, MV88E6390_G2_WDOG_CTL, in mv88e6390_watchdog_action()
883 mv88e6xxx_g2_read(chip, MV88E6390_G2_WDOG_CTL, ®); in mv88e6390_watchdog_action()
885 dev_info(chip->dev, "Watchdog event: 0x%04x", in mv88e6390_watchdog_action()
888 mv88e6xxx_g2_write(chip, MV88E6390_G2_WDOG_CTL, in mv88e6390_watchdog_action()
890 mv88e6xxx_g2_read(chip, MV88E6390_G2_WDOG_CTL, ®); in mv88e6390_watchdog_action()
892 dev_info(chip->dev, "Watchdog history: 0x%04x", in mv88e6390_watchdog_action()
896 if (chip->info->ops->reset) in mv88e6390_watchdog_action()
897 chip->info->ops->reset(chip); in mv88e6390_watchdog_action()
899 mv88e6390_watchdog_setup(chip); in mv88e6390_watchdog_action()
904 static void mv88e6390_watchdog_free(struct mv88e6xxx_chip *chip) in mv88e6390_watchdog_free() argument
906 mv88e6xxx_g2_write(chip, MV88E6390_G2_WDOG_CTL, in mv88e6390_watchdog_free()
919 struct mv88e6xxx_chip *chip = dev_id; in mv88e6xxx_g2_watchdog_thread_fn() local
922 mv88e6xxx_reg_lock(chip); in mv88e6xxx_g2_watchdog_thread_fn()
923 if (chip->info->ops->watchdog_ops->irq_action) in mv88e6xxx_g2_watchdog_thread_fn()
924 ret = chip->info->ops->watchdog_ops->irq_action(chip, irq); in mv88e6xxx_g2_watchdog_thread_fn()
925 mv88e6xxx_reg_unlock(chip); in mv88e6xxx_g2_watchdog_thread_fn()
930 static void mv88e6xxx_g2_watchdog_free(struct mv88e6xxx_chip *chip) in mv88e6xxx_g2_watchdog_free() argument
932 mv88e6xxx_reg_lock(chip); in mv88e6xxx_g2_watchdog_free()
933 if (chip->info->ops->watchdog_ops->irq_free) in mv88e6xxx_g2_watchdog_free()
934 chip->info->ops->watchdog_ops->irq_free(chip); in mv88e6xxx_g2_watchdog_free()
935 mv88e6xxx_reg_unlock(chip); in mv88e6xxx_g2_watchdog_free()
937 free_irq(chip->watchdog_irq, chip); in mv88e6xxx_g2_watchdog_free()
938 irq_dispose_mapping(chip->watchdog_irq); in mv88e6xxx_g2_watchdog_free()
941 static int mv88e6xxx_g2_watchdog_setup(struct mv88e6xxx_chip *chip) in mv88e6xxx_g2_watchdog_setup() argument
945 chip->watchdog_irq = irq_find_mapping(chip->g2_irq.domain, in mv88e6xxx_g2_watchdog_setup()
947 if (chip->watchdog_irq < 0) in mv88e6xxx_g2_watchdog_setup()
948 return chip->watchdog_irq; in mv88e6xxx_g2_watchdog_setup()
950 snprintf(chip->watchdog_irq_name, sizeof(chip->watchdog_irq_name), in mv88e6xxx_g2_watchdog_setup()
951 "mv88e6xxx-%s-watchdog", dev_name(chip->dev)); in mv88e6xxx_g2_watchdog_setup()
953 err = request_threaded_irq(chip->watchdog_irq, NULL, in mv88e6xxx_g2_watchdog_setup()
956 chip->watchdog_irq_name, chip); in mv88e6xxx_g2_watchdog_setup()
960 mv88e6xxx_reg_lock(chip); in mv88e6xxx_g2_watchdog_setup()
961 if (chip->info->ops->watchdog_ops->irq_setup) in mv88e6xxx_g2_watchdog_setup()
962 err = chip->info->ops->watchdog_ops->irq_setup(chip); in mv88e6xxx_g2_watchdog_setup()
963 mv88e6xxx_reg_unlock(chip); in mv88e6xxx_g2_watchdog_setup()
970 static int mv88e6xxx_g2_misc_5_bit_port(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_misc_5_bit_port() argument
976 err = mv88e6xxx_g2_read(chip, MV88E6XXX_G2_MISC, &val); in mv88e6xxx_g2_misc_5_bit_port()
985 return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_MISC, val); in mv88e6xxx_g2_misc_5_bit_port()
988 int mv88e6xxx_g2_misc_4_bit_port(struct mv88e6xxx_chip *chip) in mv88e6xxx_g2_misc_4_bit_port() argument
990 return mv88e6xxx_g2_misc_5_bit_port(chip, false); in mv88e6xxx_g2_misc_4_bit_port()
995 struct mv88e6xxx_chip *chip = irq_data_get_irq_chip_data(d); in mv88e6xxx_g2_irq_mask() local
998 chip->g2_irq.masked |= (1 << n); in mv88e6xxx_g2_irq_mask()
1003 struct mv88e6xxx_chip *chip = irq_data_get_irq_chip_data(d); in mv88e6xxx_g2_irq_unmask() local
1006 chip->g2_irq.masked &= ~(1 << n); in mv88e6xxx_g2_irq_unmask()
1011 struct mv88e6xxx_chip *chip = dev_id; in mv88e6xxx_g2_irq_thread_fn() local
1018 mv88e6xxx_reg_lock(chip); in mv88e6xxx_g2_irq_thread_fn()
1019 err = mv88e6xxx_g2_int_source(chip, ®); in mv88e6xxx_g2_irq_thread_fn()
1020 mv88e6xxx_reg_unlock(chip); in mv88e6xxx_g2_irq_thread_fn()
1026 sub_irq = irq_find_mapping(chip->g2_irq.domain, n); in mv88e6xxx_g2_irq_thread_fn()
1037 struct mv88e6xxx_chip *chip = irq_data_get_irq_chip_data(d); in mv88e6xxx_g2_irq_bus_lock() local
1039 mv88e6xxx_reg_lock(chip); in mv88e6xxx_g2_irq_bus_lock()
1044 struct mv88e6xxx_chip *chip = irq_data_get_irq_chip_data(d); in mv88e6xxx_g2_irq_bus_sync_unlock() local
1047 err = mv88e6xxx_g2_int_mask(chip, ~chip->g2_irq.masked); in mv88e6xxx_g2_irq_bus_sync_unlock()
1049 dev_err(chip->dev, "failed to mask interrupts\n"); in mv88e6xxx_g2_irq_bus_sync_unlock()
1051 mv88e6xxx_reg_unlock(chip); in mv88e6xxx_g2_irq_bus_sync_unlock()
1066 struct mv88e6xxx_chip *chip = d->host_data; in mv88e6xxx_g2_irq_domain_map() local
1069 irq_set_chip_and_handler(irq, &chip->g2_irq.chip, handle_level_irq); in mv88e6xxx_g2_irq_domain_map()
1080 void mv88e6xxx_g2_irq_free(struct mv88e6xxx_chip *chip) in mv88e6xxx_g2_irq_free() argument
1084 mv88e6xxx_g2_watchdog_free(chip); in mv88e6xxx_g2_irq_free()
1086 free_irq(chip->device_irq, chip); in mv88e6xxx_g2_irq_free()
1087 irq_dispose_mapping(chip->device_irq); in mv88e6xxx_g2_irq_free()
1090 virq = irq_find_mapping(chip->g2_irq.domain, irq); in mv88e6xxx_g2_irq_free()
1094 irq_domain_remove(chip->g2_irq.domain); in mv88e6xxx_g2_irq_free()
1097 int mv88e6xxx_g2_irq_setup(struct mv88e6xxx_chip *chip) in mv88e6xxx_g2_irq_setup() argument
1101 chip->g2_irq.masked = ~0; in mv88e6xxx_g2_irq_setup()
1102 mv88e6xxx_reg_lock(chip); in mv88e6xxx_g2_irq_setup()
1103 err = mv88e6xxx_g2_int_mask(chip, ~chip->g2_irq.masked); in mv88e6xxx_g2_irq_setup()
1104 mv88e6xxx_reg_unlock(chip); in mv88e6xxx_g2_irq_setup()
1108 chip->g2_irq.domain = irq_domain_add_simple( in mv88e6xxx_g2_irq_setup()
1109 chip->dev->of_node, 16, 0, &mv88e6xxx_g2_irq_domain_ops, chip); in mv88e6xxx_g2_irq_setup()
1110 if (!chip->g2_irq.domain) in mv88e6xxx_g2_irq_setup()
1114 irq_create_mapping(chip->g2_irq.domain, irq); in mv88e6xxx_g2_irq_setup()
1116 chip->g2_irq.chip = mv88e6xxx_g2_irq_chip; in mv88e6xxx_g2_irq_setup()
1118 chip->device_irq = irq_find_mapping(chip->g1_irq.domain, in mv88e6xxx_g2_irq_setup()
1120 if (chip->device_irq < 0) { in mv88e6xxx_g2_irq_setup()
1121 err = chip->device_irq; in mv88e6xxx_g2_irq_setup()
1125 snprintf(chip->device_irq_name, sizeof(chip->device_irq_name), in mv88e6xxx_g2_irq_setup()
1126 "mv88e6xxx-%s-g2", dev_name(chip->dev)); in mv88e6xxx_g2_irq_setup()
1128 err = request_threaded_irq(chip->device_irq, NULL, in mv88e6xxx_g2_irq_setup()
1130 IRQF_ONESHOT, chip->device_irq_name, chip); in mv88e6xxx_g2_irq_setup()
1134 return mv88e6xxx_g2_watchdog_setup(chip); in mv88e6xxx_g2_irq_setup()
1138 virq = irq_find_mapping(chip->g2_irq.domain, irq); in mv88e6xxx_g2_irq_setup()
1142 irq_domain_remove(chip->g2_irq.domain); in mv88e6xxx_g2_irq_setup()
1147 int mv88e6xxx_g2_irq_mdio_setup(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_irq_mdio_setup() argument
1152 for (phy = 0; phy < chip->info->num_internal_phys; phy++) { in mv88e6xxx_g2_irq_mdio_setup()
1153 irq = irq_find_mapping(chip->g2_irq.domain, phy); in mv88e6xxx_g2_irq_mdio_setup()
1158 bus->irq[chip->info->phy_base_addr + phy] = irq; in mv88e6xxx_g2_irq_mdio_setup()
1170 void mv88e6xxx_g2_irq_mdio_free(struct mv88e6xxx_chip *chip, in mv88e6xxx_g2_irq_mdio_free() argument
1175 for (phy = 0; phy < chip->info->num_internal_phys; phy++) in mv88e6xxx_g2_irq_mdio_free()