Lines Matching +full:mode +full:- +full:flag
1 // SPDX-License-Identifier: GPL-2.0+
2 /* Renesas R-Car CAN device driver
33 * mailbox 60 - 63 - Rx FIFO mailboxes
34 * mailbox 56 - 59 - Tx FIFO mailboxes
35 * non-FIFO mailboxes are not used
37 #define RCAR_CAN_N_MBX 64 /* Number of mailboxes in non-FIFO mode */
38 #define RCAR_CAN_RX_FIFO_MBX 60 /* Mailbox - window to Rx FIFO */
39 #define RCAR_CAN_TX_FIFO_MBX 56 /* Mailbox - window to Tx FIFO */
46 u8 dlc; /* Data Length Code - bits [0..3] */
54 u32 mkr_2_9[8]; /* Mask Registers 2-9 */
58 u32 mkr_0_1[2]; /* Mask Registers 0-1 */
78 u8 msmr; /* Mailbox Search Mode Register */
117 #define RCAR_CAN_CTLR_BOM (3 << 11) /* Bus-Off Recovery Mode Bits */
118 #define RCAR_CAN_CTLR_BOM_ENT (1 << 11) /* Entry to halt mode */
119 /* at bus-off entry */
121 #define RCAR_CAN_CTLR_CANM (3 << 8) /* Operating Mode Select Bit */
125 #define RCAR_CAN_CTLR_MLM (1 << 3) /* Message Lost Mode Select */
126 #define RCAR_CAN_CTLR_IDFM (3 << 1) /* ID Format Mode Select Bits */
127 #define RCAR_CAN_CTLR_IDFM_MIXED (1 << 2) /* Mixed ID mode */
128 #define RCAR_CAN_CTLR_MBM (1 << 0) /* Mailbox Mode select */
138 #define RCAR_CAN_RFCR_RFEST (1 << 7) /* Receive FIFO Empty Status Flag */
149 /* for Rx mailboxes 0-31 */
185 #define RCAR_CAN_EIER_BORIE (1 << 4) /* Bus-Off Recovery Interrupt Enable */
186 #define RCAR_CAN_EIER_BOEIE (1 << 3) /* Bus-Off Entry Interrupt Enable */
192 #define RCAR_CAN_EIFR_BLIF (1 << 7) /* Bus Lock Detect Flag */
194 /* Detect Flag */
195 #define RCAR_CAN_EIFR_ORIF (1 << 5) /* Receive Overrun Detect Flag */
196 #define RCAR_CAN_EIFR_BORIF (1 << 4) /* Bus-Off Recovery Detect Flag */
197 #define RCAR_CAN_EIFR_BOEIF (1 << 3) /* Bus-Off Entry Detect Flag */
198 #define RCAR_CAN_EIFR_EPIF (1 << 2) /* Error Passive Detect Flag */
199 #define RCAR_CAN_EIFR_EWIF (1 << 1) /* Error Warning Detect Flag */
200 #define RCAR_CAN_EIFR_BEIF (1 << 0) /* Bus Error Detect Flag */
203 #define RCAR_CAN_ECSR_EDPM (1 << 7) /* Error Display Mode Select Bit */
204 #define RCAR_CAN_ECSR_ADEF (1 << 6) /* ACK Delimiter Error Flag */
205 #define RCAR_CAN_ECSR_BE0F (1 << 5) /* Bit Error (dominant) Flag */
206 #define RCAR_CAN_ECSR_BE1F (1 << 4) /* Bit Error (recessive) Flag */
207 #define RCAR_CAN_ECSR_CEF (1 << 3) /* CRC Error Flag */
208 #define RCAR_CAN_ECSR_AEF (1 << 2) /* ACK Error Flag */
209 #define RCAR_CAN_ECSR_FEF (1 << 1) /* Form Error Flag */
210 #define RCAR_CAN_ECSR_SEF (1 << 0) /* Stuff Error Flag */
226 struct net_device_stats *stats = &ndev->stats; in rcar_can_error()
234 eifr = readb(&priv->regs->eifr); in rcar_can_error()
236 txerr = readb(&priv->regs->tecr); in rcar_can_error()
237 rxerr = readb(&priv->regs->recr); in rcar_can_error()
239 cf->can_id |= CAN_ERR_CRTL; in rcar_can_error()
240 cf->data[6] = txerr; in rcar_can_error()
241 cf->data[7] = rxerr; in rcar_can_error()
248 netdev_dbg(priv->ndev, "Bus error interrupt:\n"); in rcar_can_error()
250 cf->can_id |= CAN_ERR_BUSERROR | CAN_ERR_PROT; in rcar_can_error()
252 ecsr = readb(&priv->regs->ecsr); in rcar_can_error()
254 netdev_dbg(priv->ndev, "ACK Delimiter Error\n"); in rcar_can_error()
256 writeb(~RCAR_CAN_ECSR_ADEF, &priv->regs->ecsr); in rcar_can_error()
258 cf->data[3] = CAN_ERR_PROT_LOC_ACK_DEL; in rcar_can_error()
261 netdev_dbg(priv->ndev, "Bit Error (dominant)\n"); in rcar_can_error()
263 writeb(~RCAR_CAN_ECSR_BE0F, &priv->regs->ecsr); in rcar_can_error()
265 cf->data[2] |= CAN_ERR_PROT_BIT0; in rcar_can_error()
268 netdev_dbg(priv->ndev, "Bit Error (recessive)\n"); in rcar_can_error()
270 writeb(~RCAR_CAN_ECSR_BE1F, &priv->regs->ecsr); in rcar_can_error()
272 cf->data[2] |= CAN_ERR_PROT_BIT1; in rcar_can_error()
275 netdev_dbg(priv->ndev, "CRC Error\n"); in rcar_can_error()
277 writeb(~RCAR_CAN_ECSR_CEF, &priv->regs->ecsr); in rcar_can_error()
279 cf->data[3] = CAN_ERR_PROT_LOC_CRC_SEQ; in rcar_can_error()
282 netdev_dbg(priv->ndev, "ACK Error\n"); in rcar_can_error()
284 writeb(~RCAR_CAN_ECSR_AEF, &priv->regs->ecsr); in rcar_can_error()
286 cf->can_id |= CAN_ERR_ACK; in rcar_can_error()
287 cf->data[3] = CAN_ERR_PROT_LOC_ACK; in rcar_can_error()
291 netdev_dbg(priv->ndev, "Form Error\n"); in rcar_can_error()
293 writeb(~RCAR_CAN_ECSR_FEF, &priv->regs->ecsr); in rcar_can_error()
295 cf->data[2] |= CAN_ERR_PROT_FORM; in rcar_can_error()
298 netdev_dbg(priv->ndev, "Stuff Error\n"); in rcar_can_error()
300 writeb(~RCAR_CAN_ECSR_SEF, &priv->regs->ecsr); in rcar_can_error()
302 cf->data[2] |= CAN_ERR_PROT_STUFF; in rcar_can_error()
305 priv->can.can_stats.bus_error++; in rcar_can_error()
306 ndev->stats.rx_errors += rx_errors; in rcar_can_error()
307 ndev->stats.tx_errors += tx_errors; in rcar_can_error()
308 writeb(~RCAR_CAN_EIFR_BEIF, &priv->regs->eifr); in rcar_can_error()
311 netdev_dbg(priv->ndev, "Error warning interrupt\n"); in rcar_can_error()
312 priv->can.state = CAN_STATE_ERROR_WARNING; in rcar_can_error()
313 priv->can.can_stats.error_warning++; in rcar_can_error()
315 writeb(~RCAR_CAN_EIFR_EWIF, &priv->regs->eifr); in rcar_can_error()
317 cf->data[1] = txerr > rxerr ? CAN_ERR_CRTL_TX_WARNING : in rcar_can_error()
321 netdev_dbg(priv->ndev, "Error passive interrupt\n"); in rcar_can_error()
322 priv->can.state = CAN_STATE_ERROR_PASSIVE; in rcar_can_error()
323 priv->can.can_stats.error_passive++; in rcar_can_error()
325 writeb(~RCAR_CAN_EIFR_EPIF, &priv->regs->eifr); in rcar_can_error()
327 cf->data[1] = txerr > rxerr ? CAN_ERR_CRTL_TX_PASSIVE : in rcar_can_error()
331 netdev_dbg(priv->ndev, "Bus-off entry interrupt\n"); in rcar_can_error()
333 priv->ier = RCAR_CAN_IER_ERSIE; in rcar_can_error()
334 writeb(priv->ier, &priv->regs->ier); in rcar_can_error()
335 priv->can.state = CAN_STATE_BUS_OFF; in rcar_can_error()
337 writeb(~RCAR_CAN_EIFR_BOEIF, &priv->regs->eifr); in rcar_can_error()
338 priv->can.can_stats.bus_off++; in rcar_can_error()
341 cf->can_id |= CAN_ERR_BUSOFF; in rcar_can_error()
344 netdev_dbg(priv->ndev, "Receive overrun error interrupt\n"); in rcar_can_error()
345 ndev->stats.rx_over_errors++; in rcar_can_error()
346 ndev->stats.rx_errors++; in rcar_can_error()
347 writeb(~RCAR_CAN_EIFR_ORIF, &priv->regs->eifr); in rcar_can_error()
349 cf->can_id |= CAN_ERR_CRTL; in rcar_can_error()
350 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW; in rcar_can_error()
354 netdev_dbg(priv->ndev, in rcar_can_error()
356 ndev->stats.rx_over_errors++; in rcar_can_error()
357 ndev->stats.rx_errors++; in rcar_can_error()
358 writeb(~RCAR_CAN_EIFR_OLIF, &priv->regs->eifr); in rcar_can_error()
360 cf->can_id |= CAN_ERR_PROT; in rcar_can_error()
361 cf->data[2] |= CAN_ERR_PROT_OVERLOAD; in rcar_can_error()
366 stats->rx_packets++; in rcar_can_error()
367 stats->rx_bytes += cf->can_dlc; in rcar_can_error()
375 struct net_device_stats *stats = &ndev->stats; in rcar_can_tx_done()
379 u8 unsent = readb(&priv->regs->tfcr); in rcar_can_tx_done()
383 if (priv->tx_head - priv->tx_tail <= unsent) in rcar_can_tx_done()
385 stats->tx_packets++; in rcar_can_tx_done()
386 stats->tx_bytes += priv->tx_dlc[priv->tx_tail % in rcar_can_tx_done()
388 priv->tx_dlc[priv->tx_tail % RCAR_CAN_FIFO_DEPTH] = 0; in rcar_can_tx_done()
389 can_get_echo_skb(ndev, priv->tx_tail % RCAR_CAN_FIFO_DEPTH); in rcar_can_tx_done()
390 priv->tx_tail++; in rcar_can_tx_done()
394 isr = readb(&priv->regs->isr); in rcar_can_tx_done()
395 writeb(isr & ~RCAR_CAN_ISR_TXFF, &priv->regs->isr); in rcar_can_tx_done()
405 isr = readb(&priv->regs->isr); in rcar_can_interrupt()
406 if (!(isr & priv->ier)) in rcar_can_interrupt()
416 if (napi_schedule_prep(&priv->napi)) { in rcar_can_interrupt()
418 priv->ier &= ~RCAR_CAN_IER_RXFIE; in rcar_can_interrupt()
419 writeb(priv->ier, &priv->regs->ier); in rcar_can_interrupt()
420 __napi_schedule(&priv->napi); in rcar_can_interrupt()
430 struct can_bittiming *bt = &priv->can.bittiming; in rcar_can_set_bittiming()
433 bcr = RCAR_CAN_BCR_TSEG1(bt->phase_seg1 + bt->prop_seg - 1) | in rcar_can_set_bittiming()
434 RCAR_CAN_BCR_BPR(bt->brp - 1) | RCAR_CAN_BCR_SJW(bt->sjw - 1) | in rcar_can_set_bittiming()
435 RCAR_CAN_BCR_TSEG2(bt->phase_seg2 - 1); in rcar_can_set_bittiming()
436 /* Don't overwrite CLKR with 32-bit BCR access; CLKR has 8-bit access. in rcar_can_set_bittiming()
437 * All the registers are big-endian but they get byte-swapped on 32-bit in rcar_can_set_bittiming()
438 * read/write (but not on 8-bit, contrary to the manuals)... in rcar_can_set_bittiming()
440 writel((bcr << 8) | priv->clock_select, &priv->regs->bcr); in rcar_can_set_bittiming()
449 /* Set controller to known mode: in rcar_can_start()
450 * - FIFO mailbox mode in rcar_can_start()
451 * - accept all messages in rcar_can_start()
452 * - overrun mode in rcar_can_start()
453 * CAN is in sleep mode after MCU hardware or software reset. in rcar_can_start()
455 ctlr = readw(&priv->regs->ctlr); in rcar_can_start()
457 writew(ctlr, &priv->regs->ctlr); in rcar_can_start()
458 /* Go to reset mode */ in rcar_can_start()
460 writew(ctlr, &priv->regs->ctlr); in rcar_can_start()
462 if (readw(&priv->regs->str) & RCAR_CAN_STR_RSTST) in rcar_can_start()
466 ctlr |= RCAR_CAN_CTLR_IDFM_MIXED; /* Select mixed ID mode */ in rcar_can_start()
467 ctlr |= RCAR_CAN_CTLR_BOM_ENT; /* Entry to halt mode automatically */ in rcar_can_start()
468 /* at bus-off */ in rcar_can_start()
469 ctlr |= RCAR_CAN_CTLR_MBM; /* Select FIFO mailbox mode */ in rcar_can_start()
470 ctlr |= RCAR_CAN_CTLR_MLM; /* Overrun mode */ in rcar_can_start()
471 writew(ctlr, &priv->regs->ctlr); in rcar_can_start()
474 writel(0, &priv->regs->mkr_2_9[6]); in rcar_can_start()
475 writel(0, &priv->regs->mkr_2_9[7]); in rcar_can_start()
476 /* In FIFO mailbox mode, write "0" to bits 24 to 31 */ in rcar_can_start()
477 writel(0, &priv->regs->mkivlr1); in rcar_can_start()
479 writel(0, &priv->regs->fidcr[0]); in rcar_can_start()
480 writel(RCAR_CAN_FIDCR_IDE | RCAR_CAN_FIDCR_RTR, &priv->regs->fidcr[1]); in rcar_can_start()
482 writel(RCAR_CAN_MIER1_RXFIE | RCAR_CAN_MIER1_TXFIE, &priv->regs->mier1); in rcar_can_start()
484 priv->ier = RCAR_CAN_IER_ERSIE | RCAR_CAN_IER_RXFIE | in rcar_can_start()
486 writeb(priv->ier, &priv->regs->ier); in rcar_can_start()
489 writeb(RCAR_CAN_ECSR_EDPM, &priv->regs->ecsr); in rcar_can_start()
492 (priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING ? in rcar_can_start()
494 RCAR_CAN_EIER_OLIE, &priv->regs->eier); in rcar_can_start()
495 priv->can.state = CAN_STATE_ERROR_ACTIVE; in rcar_can_start()
497 /* Go to operation mode */ in rcar_can_start()
498 writew(ctlr & ~RCAR_CAN_CTLR_CANM, &priv->regs->ctlr); in rcar_can_start()
500 if (!(readw(&priv->regs->str) & RCAR_CAN_STR_RSTST)) in rcar_can_start()
504 writeb(RCAR_CAN_RFCR_RFE, &priv->regs->rfcr); in rcar_can_start()
505 writeb(RCAR_CAN_TFCR_TFE, &priv->regs->tfcr); in rcar_can_start()
513 err = clk_prepare_enable(priv->clk); in rcar_can_open()
520 err = clk_prepare_enable(priv->can_clk); in rcar_can_open()
531 napi_enable(&priv->napi); in rcar_can_open()
532 err = request_irq(ndev->irq, rcar_can_interrupt, 0, ndev->name, ndev); in rcar_can_open()
535 ndev->irq, err); in rcar_can_open()
543 napi_disable(&priv->napi); in rcar_can_open()
546 clk_disable_unprepare(priv->can_clk); in rcar_can_open()
548 clk_disable_unprepare(priv->clk); in rcar_can_open()
559 /* Go to (force) reset mode */ in rcar_can_stop()
560 ctlr = readw(&priv->regs->ctlr); in rcar_can_stop()
562 writew(ctlr, &priv->regs->ctlr); in rcar_can_stop()
564 if (readw(&priv->regs->str) & RCAR_CAN_STR_RSTST) in rcar_can_stop()
567 writel(0, &priv->regs->mier0); in rcar_can_stop()
568 writel(0, &priv->regs->mier1); in rcar_can_stop()
569 writeb(0, &priv->regs->ier); in rcar_can_stop()
570 writeb(0, &priv->regs->eier); in rcar_can_stop()
571 /* Go to sleep mode */ in rcar_can_stop()
573 writew(ctlr, &priv->regs->ctlr); in rcar_can_stop()
574 priv->can.state = CAN_STATE_STOPPED; in rcar_can_stop()
583 free_irq(ndev->irq, ndev); in rcar_can_close()
584 napi_disable(&priv->napi); in rcar_can_close()
585 clk_disable_unprepare(priv->can_clk); in rcar_can_close()
586 clk_disable_unprepare(priv->clk); in rcar_can_close()
596 struct can_frame *cf = (struct can_frame *)skb->data; in rcar_can_start_xmit()
602 if (cf->can_id & CAN_EFF_FLAG) /* Extended frame format */ in rcar_can_start_xmit()
603 data = (cf->can_id & CAN_EFF_MASK) | RCAR_CAN_IDE; in rcar_can_start_xmit()
605 data = (cf->can_id & CAN_SFF_MASK) << RCAR_CAN_SID_SHIFT; in rcar_can_start_xmit()
607 if (cf->can_id & CAN_RTR_FLAG) { /* Remote transmission request */ in rcar_can_start_xmit()
610 for (i = 0; i < cf->can_dlc; i++) in rcar_can_start_xmit()
611 writeb(cf->data[i], in rcar_can_start_xmit()
612 &priv->regs->mb[RCAR_CAN_TX_FIFO_MBX].data[i]); in rcar_can_start_xmit()
615 writel(data, &priv->regs->mb[RCAR_CAN_TX_FIFO_MBX].id); in rcar_can_start_xmit()
617 writeb(cf->can_dlc, &priv->regs->mb[RCAR_CAN_TX_FIFO_MBX].dlc); in rcar_can_start_xmit()
619 priv->tx_dlc[priv->tx_head % RCAR_CAN_FIFO_DEPTH] = cf->can_dlc; in rcar_can_start_xmit()
620 can_put_echo_skb(skb, ndev, priv->tx_head % RCAR_CAN_FIFO_DEPTH); in rcar_can_start_xmit()
621 priv->tx_head++; in rcar_can_start_xmit()
623 * the CPU-side pointer for the transmit FIFO to the next in rcar_can_start_xmit()
626 writeb(0xff, &priv->regs->tfpcr); in rcar_can_start_xmit()
628 if (priv->tx_head - priv->tx_tail >= RCAR_CAN_FIFO_DEPTH) in rcar_can_start_xmit()
643 struct net_device_stats *stats = &priv->ndev->stats; in rcar_can_rx_pkt()
649 skb = alloc_can_skb(priv->ndev, &cf); in rcar_can_rx_pkt()
651 stats->rx_dropped++; in rcar_can_rx_pkt()
655 data = readl(&priv->regs->mb[RCAR_CAN_RX_FIFO_MBX].id); in rcar_can_rx_pkt()
657 cf->can_id = (data & CAN_EFF_MASK) | CAN_EFF_FLAG; in rcar_can_rx_pkt()
659 cf->can_id = (data >> RCAR_CAN_SID_SHIFT) & CAN_SFF_MASK; in rcar_can_rx_pkt()
661 dlc = readb(&priv->regs->mb[RCAR_CAN_RX_FIFO_MBX].dlc); in rcar_can_rx_pkt()
662 cf->can_dlc = get_can_dlc(dlc); in rcar_can_rx_pkt()
664 cf->can_id |= CAN_RTR_FLAG; in rcar_can_rx_pkt()
666 for (dlc = 0; dlc < cf->can_dlc; dlc++) in rcar_can_rx_pkt()
667 cf->data[dlc] = in rcar_can_rx_pkt()
668 readb(&priv->regs->mb[RCAR_CAN_RX_FIFO_MBX].data[dlc]); in rcar_can_rx_pkt()
671 can_led_event(priv->ndev, CAN_LED_EVENT_RX); in rcar_can_rx_pkt()
673 stats->rx_bytes += cf->can_dlc; in rcar_can_rx_pkt()
674 stats->rx_packets++; in rcar_can_rx_pkt()
687 isr = readb(&priv->regs->isr); in rcar_can_rx_poll()
690 writeb(isr & ~RCAR_CAN_ISR_RXFF, &priv->regs->isr); in rcar_can_rx_poll()
691 rfcr = readb(&priv->regs->rfcr); in rcar_can_rx_poll()
696 * the CPU-side pointer for the receive FIFO in rcar_can_rx_poll()
699 writeb(0xff, &priv->regs->rfpcr); in rcar_can_rx_poll()
704 priv->ier |= RCAR_CAN_IER_RXFIE; in rcar_can_rx_poll()
705 writeb(priv->ier, &priv->regs->ier); in rcar_can_rx_poll()
710 static int rcar_can_do_set_mode(struct net_device *ndev, enum can_mode mode) in rcar_can_do_set_mode() argument
712 switch (mode) { in rcar_can_do_set_mode()
718 return -EOPNOTSUPP; in rcar_can_do_set_mode()
728 err = clk_prepare_enable(priv->clk); in rcar_can_get_berr_counter()
731 bec->txerr = readb(&priv->regs->tecr); in rcar_can_get_berr_counter()
732 bec->rxerr = readb(&priv->regs->recr); in rcar_can_get_berr_counter()
733 clk_disable_unprepare(priv->clk); in rcar_can_get_berr_counter()
749 int err = -ENODEV; in rcar_can_probe()
752 of_property_read_u32(pdev->dev.of_node, "renesas,can-clock-select", in rcar_can_probe()
769 dev_err(&pdev->dev, "alloc_candev() failed\n"); in rcar_can_probe()
770 err = -ENOMEM; in rcar_can_probe()
776 priv->clk = devm_clk_get(&pdev->dev, "clkp1"); in rcar_can_probe()
777 if (IS_ERR(priv->clk)) { in rcar_can_probe()
778 err = PTR_ERR(priv->clk); in rcar_can_probe()
779 dev_err(&pdev->dev, "cannot get peripheral clock, error %d\n", in rcar_can_probe()
785 err = -EINVAL; in rcar_can_probe()
786 dev_err(&pdev->dev, "invalid CAN clock selected\n"); in rcar_can_probe()
789 priv->can_clk = devm_clk_get(&pdev->dev, clock_names[clock_select]); in rcar_can_probe()
790 if (IS_ERR(priv->can_clk)) { in rcar_can_probe()
791 err = PTR_ERR(priv->can_clk); in rcar_can_probe()
792 dev_err(&pdev->dev, "cannot get CAN clock, error %d\n", err); in rcar_can_probe()
796 ndev->netdev_ops = &rcar_can_netdev_ops; in rcar_can_probe()
797 ndev->irq = irq; in rcar_can_probe()
798 ndev->flags |= IFF_ECHO; in rcar_can_probe()
799 priv->ndev = ndev; in rcar_can_probe()
800 priv->regs = addr; in rcar_can_probe()
801 priv->clock_select = clock_select; in rcar_can_probe()
802 priv->can.clock.freq = clk_get_rate(priv->can_clk); in rcar_can_probe()
803 priv->can.bittiming_const = &rcar_can_bittiming_const; in rcar_can_probe()
804 priv->can.do_set_mode = rcar_can_do_set_mode; in rcar_can_probe()
805 priv->can.do_get_berr_counter = rcar_can_get_berr_counter; in rcar_can_probe()
806 priv->can.ctrlmode_supported = CAN_CTRLMODE_BERR_REPORTING; in rcar_can_probe()
808 SET_NETDEV_DEV(ndev, &pdev->dev); in rcar_can_probe()
810 netif_napi_add(ndev, &priv->napi, rcar_can_rx_poll, in rcar_can_probe()
814 dev_err(&pdev->dev, "register_candev() failed, error %d\n", in rcar_can_probe()
821 dev_info(&pdev->dev, "device registered (IRQ%d)\n", ndev->irq); in rcar_can_probe()
825 netif_napi_del(&priv->napi); in rcar_can_probe()
838 netif_napi_del(&priv->napi); in rcar_can_remove()
853 ctlr = readw(&priv->regs->ctlr); in rcar_can_suspend()
855 writew(ctlr, &priv->regs->ctlr); in rcar_can_suspend()
857 writew(ctlr, &priv->regs->ctlr); in rcar_can_suspend()
858 priv->can.state = CAN_STATE_SLEEPING; in rcar_can_suspend()
860 clk_disable(priv->clk); in rcar_can_suspend()
871 err = clk_enable(priv->clk); in rcar_can_resume()
877 ctlr = readw(&priv->regs->ctlr); in rcar_can_resume()
879 writew(ctlr, &priv->regs->ctlr); in rcar_can_resume()
881 writew(ctlr, &priv->regs->ctlr); in rcar_can_resume()
882 priv->can.state = CAN_STATE_ERROR_ACTIVE; in rcar_can_resume()
894 { .compatible = "renesas,can-r8a7778" },
895 { .compatible = "renesas,can-r8a7779" },
896 { .compatible = "renesas,can-r8a7790" },
897 { .compatible = "renesas,can-r8a7791" },
898 { .compatible = "renesas,rcar-gen1-can" },
899 { .compatible = "renesas,rcar-gen2-can" },
900 { .compatible = "renesas,rcar-gen3-can" },
919 MODULE_DESCRIPTION("CAN driver for Renesas R-Car SoC");