Lines Matching +full:clock +full:- +full:freq
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2004-2005 Andrey Volkov <avolkov@varma-el.com>,
7 * Copyright (C) 2008-2009 Wolfgang Grandegger <wg@grandegger.com>
36 { .compatible = "fsl,mpc5200-cdm", },
46 unsigned int freq; in mpc52xx_can_get_clock() local
52 * Either the oscillator clock (SYS_XTAL_IN) or the IP bus clock in mpc52xx_can_get_clock()
53 * (IP_CLK) can be selected as MSCAN clock source. According to in mpc52xx_can_get_clock()
54 * the MPC5200 user's manual, the oscillator clock is the better in mpc52xx_can_get_clock()
64 freq = mpc5xxx_get_bus_frequency(ofdev->dev.of_node); in mpc52xx_can_get_clock()
65 if (!freq) in mpc52xx_can_get_clock()
69 return freq; in mpc52xx_can_get_clock()
71 /* Determine SYS_XTAL_IN frequency from the clock domain settings */ in mpc52xx_can_get_clock()
74 dev_err(&ofdev->dev, "can't get clock node!\n"); in mpc52xx_can_get_clock()
80 dev_err(&ofdev->dev, "can't map clock node!\n"); in mpc52xx_can_get_clock()
84 if (in_8(&cdm->ipb_clk_sel) & 0x1) in mpc52xx_can_get_clock()
85 freq *= 2; in mpc52xx_can_get_clock()
86 val = in_be32(&cdm->rstcfg); in mpc52xx_can_get_clock()
88 freq *= (val & (1 << 5)) ? 8 : 4; in mpc52xx_can_get_clock()
89 freq /= (val & (1 << 6)) ? 12 : 16; in mpc52xx_can_get_clock()
94 return freq; in mpc52xx_can_get_clock()
121 /* the caller passed in the clock source spec that was read from in mpc512x_can_get_clock()
122 * the device tree, get the optional clock divider as well in mpc512x_can_get_clock()
124 np = ofdev->dev.of_node; in mpc512x_can_get_clock()
126 of_property_read_u32(np, "fsl,mscan-clock-divider", &clockdiv); in mpc512x_can_get_clock()
127 dev_dbg(&ofdev->dev, "device tree specs: clk src[%s] div[%d]\n", in mpc512x_can_get_clock()
130 /* when clock-source is 'ip', the CANCTL1[CLKSRC] bit needs to in mpc512x_can_get_clock()
131 * get set, and the 'ips' clock is the input to the MSCAN in mpc512x_can_get_clock()
134 * for clock-source values of 'ref' or 'sys' the CANCTL1[CLKSRC] in mpc512x_can_get_clock()
135 * bit needs to get cleared, an optional clock-divider may have in mpc512x_can_get_clock()
139 * in the absence of a clock-source spec, first an optimal clock in mpc512x_can_get_clock()
140 * gets determined based on the 'sys' clock, if that fails the in mpc512x_can_get_clock()
141 * 'ref' clock is used in mpc512x_can_get_clock()
145 /* interpret the device tree's spec for the clock source */ in mpc512x_can_get_clock()
154 dev_dbg(&ofdev->dev, "got a clk source spec[%d]\n", clk_from); in mpc512x_can_get_clock()
157 /* no spec so far, try the 'sys' clock; round to the in mpc512x_can_get_clock()
160 dev_dbg(&ofdev->dev, "no clk source spec, trying SYS\n"); in mpc512x_can_get_clock()
161 clk_in = devm_clk_get(&ofdev->dev, "sys"); in mpc512x_can_get_clock()
171 dev_dbg(&ofdev->dev, in mpc512x_can_get_clock()
172 "clk fit, sys[%lu] div[%d] freq[%lu]\n", in mpc512x_can_get_clock()
177 /* no spec so far, use the 'ref' clock */ in mpc512x_can_get_clock()
178 dev_dbg(&ofdev->dev, "no clk source spec, trying REF\n"); in mpc512x_can_get_clock()
179 clk_in = devm_clk_get(&ofdev->dev, "ref"); in mpc512x_can_get_clock()
184 dev_dbg(&ofdev->dev, in mpc512x_can_get_clock()
185 "clk fit, ref[%lu] (no div) freq[%lu]\n", in mpc512x_can_get_clock()
192 * the actual resulting clock rate to return to the caller in mpc512x_can_get_clock()
196 clk_can = devm_clk_get(&ofdev->dev, "ips"); in mpc512x_can_get_clock()
199 priv = netdev_priv(dev_get_drvdata(&ofdev->dev)); in mpc512x_can_get_clock()
200 priv->clk_can = clk_can; in mpc512x_can_get_clock()
203 dev_dbg(&ofdev->dev, "clk from IPS, clksrc[%d] freq[%lu]\n", in mpc512x_can_get_clock()
208 clk_can = devm_clk_get(&ofdev->dev, "mclk"); in mpc512x_can_get_clock()
211 priv = netdev_priv(dev_get_drvdata(&ofdev->dev)); in mpc512x_can_get_clock()
212 priv->clk_can = clk_can; in mpc512x_can_get_clock()
214 clk_in = devm_clk_get(&ofdev->dev, "sys"); in mpc512x_can_get_clock()
216 clk_in = devm_clk_get(&ofdev->dev, "ref"); in mpc512x_can_get_clock()
225 dev_dbg(&ofdev->dev, "clk from MCLK, clksrc[%d] freq[%lu]\n", in mpc512x_can_get_clock()
235 clk_ipg = devm_clk_get(&ofdev->dev, "ipg"); in mpc512x_can_get_clock()
240 priv = netdev_priv(dev_get_drvdata(&ofdev->dev)); in mpc512x_can_get_clock()
241 priv->clk_ipg = clk_ipg; in mpc512x_can_get_clock()
243 /* return the determined clock source rate */ in mpc512x_can_get_clock()
247 dev_err(&ofdev->dev, "invalid clock source specification\n"); in mpc512x_can_get_clock()
248 /* clock source rate could not get determined */ in mpc512x_can_get_clock()
252 dev_err(&ofdev->dev, "cannot acquire or setup bitrate clock source\n"); in mpc512x_can_get_clock()
253 /* clock source rate could not get determined */ in mpc512x_can_get_clock()
257 dev_err(&ofdev->dev, "cannot acquire or setup register clock\n"); in mpc512x_can_get_clock()
258 /* clock source rate could not get determined */ in mpc512x_can_get_clock()
266 priv = netdev_priv(dev_get_drvdata(&ofdev->dev)); in mpc512x_can_put_clock()
267 if (priv->clk_ipg) in mpc512x_can_put_clock()
268 clk_disable_unprepare(priv->clk_ipg); in mpc512x_can_put_clock()
284 struct device_node *np = ofdev->dev.of_node; in mpc5xxx_can_probe()
290 int err = -ENOMEM; in mpc5xxx_can_probe()
292 match = of_match_device(mpc5xxx_can_table, &ofdev->dev); in mpc5xxx_can_probe()
294 return -EINVAL; in mpc5xxx_can_probe()
295 data = match->data; in mpc5xxx_can_probe()
299 dev_err(&ofdev->dev, "couldn't ioremap\n"); in mpc5xxx_can_probe()
305 dev_err(&ofdev->dev, "no irq found\n"); in mpc5xxx_can_probe()
306 err = -ENODEV; in mpc5xxx_can_probe()
314 SET_NETDEV_DEV(dev, &ofdev->dev); in mpc5xxx_can_probe()
317 priv->reg_base = base; in mpc5xxx_can_probe()
318 dev->irq = irq; in mpc5xxx_can_probe()
320 clock_name = of_get_property(np, "fsl,mscan-clock-source", NULL); in mpc5xxx_can_probe()
323 priv->type = data->type; in mpc5xxx_can_probe()
324 priv->can.clock.freq = data->get_clock(ofdev, clock_name, in mpc5xxx_can_probe()
326 if (!priv->can.clock.freq) { in mpc5xxx_can_probe()
327 dev_err(&ofdev->dev, "couldn't get MSCAN clock properties\n"); in mpc5xxx_can_probe()
333 dev_err(&ofdev->dev, "registering %s failed (err=%d)\n", in mpc5xxx_can_probe()
338 dev_info(&ofdev->dev, "MSCAN at 0x%p, irq %d, clock %d Hz\n", in mpc5xxx_can_probe()
339 priv->reg_base, dev->irq, priv->can.clock.freq); in mpc5xxx_can_probe()
360 match = of_match_device(mpc5xxx_can_table, &ofdev->dev); in mpc5xxx_can_remove()
361 data = match ? match->data : NULL; in mpc5xxx_can_remove()
364 if (data && data->put_clock) in mpc5xxx_can_remove()
365 data->put_clock(ofdev); in mpc5xxx_can_remove()
366 iounmap(priv->reg_base); in mpc5xxx_can_remove()
367 irq_dispose_mapping(dev->irq); in mpc5xxx_can_remove()
379 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; in mpc5xxx_can_suspend()
390 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; in mpc5xxx_can_resume()
392 regs->canctl0 |= MSCAN_INITRQ; in mpc5xxx_can_resume()
393 while (!(regs->canctl1 & MSCAN_INITAK)) in mpc5xxx_can_resume()
396 regs->canctl1 = saved_regs.canctl1; in mpc5xxx_can_resume()
397 regs->canbtr0 = saved_regs.canbtr0; in mpc5xxx_can_resume()
398 regs->canbtr1 = saved_regs.canbtr1; in mpc5xxx_can_resume()
399 regs->canidac = saved_regs.canidac; in mpc5xxx_can_resume()
402 _memcpy_toio(®s->canidar1_0, (void *)&saved_regs.canidar1_0, in mpc5xxx_can_resume()
403 sizeof(*regs) - offsetof(struct mscan_regs, canidar1_0)); in mpc5xxx_can_resume()
405 regs->canctl0 &= ~MSCAN_INITRQ; in mpc5xxx_can_resume()
406 regs->cantbsel = saved_regs.cantbsel; in mpc5xxx_can_resume()
407 regs->canrier = saved_regs.canrier; in mpc5xxx_can_resume()
408 regs->cantier = saved_regs.cantier; in mpc5xxx_can_resume()
409 regs->canctl0 = saved_regs.canctl0; in mpc5xxx_can_resume()
428 { .compatible = "fsl,mpc5200-mscan", .data = &mpc5200_can_data, },
430 { .compatible = "fsl,mpc5121-mscan", .data = &mpc5121_can_data, },