Lines Matching +full:non +full:- +full:flash

1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/mtd/spi-nor.h>
12 /* Xilinx S3AN Internal Flash */
21 * This code converts an address to the Default Address Mode, that has non
23 * mode supported by Xilinx tools, it can access the whole flash area and
24 * changing over to the Power-of-two mode is irreversible and corrupts the
33 offset = addr % nor->page_size; in s3an_convert_addr()
34 page = addr / nor->page_size; in s3an_convert_addr()
35 page <<= (nor->page_size > 512) ? 10 : 9; in s3an_convert_addr()
45 ret = spi_nor_xread_sr(nor, nor->bouncebuf); in xilinx_nor_setup()
49 nor->erase_opcode = SPINOR_OP_XSE; in xilinx_nor_setup()
50 nor->program_opcode = SPINOR_OP_XPP; in xilinx_nor_setup()
51 nor->read_opcode = SPINOR_OP_READ; in xilinx_nor_setup()
52 nor->flags |= SNOR_F_NO_OP_CHIP_ERASE; in xilinx_nor_setup()
65 if (nor->bouncebuf[0] & XSR_PAGESIZE) { in xilinx_nor_setup()
66 /* Flash in Power of 2 mode */ in xilinx_nor_setup()
67 nor->page_size = (nor->page_size == 264) ? 256 : 512; in xilinx_nor_setup()
68 nor->mtd.writebufsize = nor->page_size; in xilinx_nor_setup()
69 nor->mtd.size = 8 * nor->page_size * nor->info->n_sectors; in xilinx_nor_setup()
70 nor->mtd.erasesize = 8 * nor->page_size; in xilinx_nor_setup()
72 /* Flash in Default addressing mode */ in xilinx_nor_setup()
73 nor->params->convert_addr = s3an_convert_addr; in xilinx_nor_setup()
74 nor->mtd.erasesize = nor->info->sector_size; in xilinx_nor_setup()
82 nor->params->setup = xilinx_nor_setup; in xilinx_post_sfdp_fixups()