Lines Matching +full:spi +full:- +full:flash
1 // SPDX-License-Identifier: GPL-2.0
22 #include <linux/spi/flash.h>
23 #include <linux/mtd/spi-nor.h>
30 * For everything but full-chip erase; probably could be much smaller, but kept
36 * For full-chip erase, calibrated to a 2MB flash (M25P16); should be scaled up
37 * for larger flash
44 * spi_nor_spimem_bounce() - check if a bounce buffer is needed for the data
55 /* op->data.buf.in occupies the same memory as op->data.buf.out */ in spi_nor_spimem_bounce()
56 if (object_is_on_stack(op->data.buf.in) || in spi_nor_spimem_bounce()
57 !virt_addr_valid(op->data.buf.in)) { in spi_nor_spimem_bounce()
58 if (op->data.nbytes > nor->bouncebuf_size) in spi_nor_spimem_bounce()
59 op->data.nbytes = nor->bouncebuf_size; in spi_nor_spimem_bounce()
60 op->data.buf.in = nor->bouncebuf; in spi_nor_spimem_bounce()
68 * spi_nor_spimem_exec_op() - execute a memory operation
72 * Return: 0 on success, -error otherwise.
78 error = spi_mem_adjust_op_size(nor->spimem, op); in spi_nor_spimem_exec_op()
82 return spi_mem_exec_op(nor->spimem, op); in spi_nor_spimem_exec_op()
86 * spi_nor_spimem_read_data() - read data from flash's memory region via
87 * spi-mem
93 * Return: number of bytes read successfully, -errno otherwise
99 SPI_MEM_OP(SPI_MEM_OP_CMD(nor->read_opcode, 1), in spi_nor_spimem_read_data()
100 SPI_MEM_OP_ADDR(nor->addr_width, from, 1), in spi_nor_spimem_read_data()
101 SPI_MEM_OP_DUMMY(nor->read_dummy, 1), in spi_nor_spimem_read_data()
108 op.cmd.buswidth = spi_nor_get_protocol_inst_nbits(nor->read_proto); in spi_nor_spimem_read_data()
109 op.addr.buswidth = spi_nor_get_protocol_addr_nbits(nor->read_proto); in spi_nor_spimem_read_data()
111 op.data.buswidth = spi_nor_get_protocol_data_nbits(nor->read_proto); in spi_nor_spimem_read_data()
114 op.dummy.nbytes = (nor->read_dummy * op.dummy.buswidth) / 8; in spi_nor_spimem_read_data()
118 if (nor->dirmap.rdesc) { in spi_nor_spimem_read_data()
119 nbytes = spi_mem_dirmap_read(nor->dirmap.rdesc, op.addr.val, in spi_nor_spimem_read_data()
135 * spi_nor_read_data() - read data from flash memory
141 * Return: number of bytes read successfully, -errno otherwise
145 if (nor->spimem) in spi_nor_read_data()
148 return nor->controller_ops->read(nor, from, len, buf); in spi_nor_read_data()
152 * spi_nor_spimem_write_data() - write data to flash memory via
153 * spi-mem
159 * Return: number of bytes written successfully, -errno otherwise
165 SPI_MEM_OP(SPI_MEM_OP_CMD(nor->program_opcode, 1), in spi_nor_spimem_write_data()
166 SPI_MEM_OP_ADDR(nor->addr_width, to, 1), in spi_nor_spimem_write_data()
172 op.cmd.buswidth = spi_nor_get_protocol_inst_nbits(nor->write_proto); in spi_nor_spimem_write_data()
173 op.addr.buswidth = spi_nor_get_protocol_addr_nbits(nor->write_proto); in spi_nor_spimem_write_data()
174 op.data.buswidth = spi_nor_get_protocol_data_nbits(nor->write_proto); in spi_nor_spimem_write_data()
176 if (nor->program_opcode == SPINOR_OP_AAI_WP && nor->sst_write_second) in spi_nor_spimem_write_data()
180 memcpy(nor->bouncebuf, buf, op.data.nbytes); in spi_nor_spimem_write_data()
182 if (nor->dirmap.wdesc) { in spi_nor_spimem_write_data()
183 nbytes = spi_mem_dirmap_write(nor->dirmap.wdesc, op.addr.val, in spi_nor_spimem_write_data()
196 * spi_nor_write_data() - write data to flash memory
202 * Return: number of bytes written successfully, -errno otherwise
207 if (nor->spimem) in spi_nor_write_data()
210 return nor->controller_ops->write(nor, to, len, buf); in spi_nor_write_data()
214 * spi_nor_write_enable() - Set write enable latch with Write Enable command.
217 * Return: 0 on success, -errno otherwise.
223 if (nor->spimem) { in spi_nor_write_enable()
230 ret = spi_mem_exec_op(nor->spimem, &op); in spi_nor_write_enable()
232 ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WREN, in spi_nor_write_enable()
237 dev_dbg(nor->dev, "error %d on Write Enable\n", ret); in spi_nor_write_enable()
243 * spi_nor_write_disable() - Send Write Disable instruction to the chip.
246 * Return: 0 on success, -errno otherwise.
252 if (nor->spimem) { in spi_nor_write_disable()
259 ret = spi_mem_exec_op(nor->spimem, &op); in spi_nor_write_disable()
261 ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WRDI, in spi_nor_write_disable()
266 dev_dbg(nor->dev, "error %d on Write Disable\n", ret); in spi_nor_write_disable()
272 * spi_nor_read_sr() - Read the Status Register.
274 * @sr: pointer to a DMA-able buffer where the value of the
277 * Return: 0 on success, -errno otherwise.
283 if (nor->spimem) { in spi_nor_read_sr()
290 ret = spi_mem_exec_op(nor->spimem, &op); in spi_nor_read_sr()
292 ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDSR, in spi_nor_read_sr()
297 dev_dbg(nor->dev, "error %d reading SR\n", ret); in spi_nor_read_sr()
303 * spi_nor_read_fsr() - Read the Flag Status Register.
305 * @fsr: pointer to a DMA-able buffer where the value of the
308 * Return: 0 on success, -errno otherwise.
314 if (nor->spimem) { in spi_nor_read_fsr()
321 ret = spi_mem_exec_op(nor->spimem, &op); in spi_nor_read_fsr()
323 ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDFSR, in spi_nor_read_fsr()
328 dev_dbg(nor->dev, "error %d reading FSR\n", ret); in spi_nor_read_fsr()
334 * spi_nor_read_cr() - Read the Configuration Register using the
337 * @cr: pointer to a DMA-able buffer where the value of the
340 * Return: 0 on success, -errno otherwise.
346 if (nor->spimem) { in spi_nor_read_cr()
353 ret = spi_mem_exec_op(nor->spimem, &op); in spi_nor_read_cr()
355 ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDCR, cr, 1); in spi_nor_read_cr()
359 dev_dbg(nor->dev, "error %d reading CR\n", ret); in spi_nor_read_cr()
365 * spi_nor_set_4byte_addr_mode() - Enter/Exit 4-byte address mode.
367 * @enable: true to enter the 4-byte address mode, false to exit the 4-byte
370 * Return: 0 on success, -errno otherwise.
376 if (nor->spimem) { in spi_nor_set_4byte_addr_mode()
386 ret = spi_mem_exec_op(nor->spimem, &op); in spi_nor_set_4byte_addr_mode()
388 ret = nor->controller_ops->write_reg(nor, in spi_nor_set_4byte_addr_mode()
395 dev_dbg(nor->dev, "error %d setting 4-byte mode\n", ret); in spi_nor_set_4byte_addr_mode()
401 * spansion_set_4byte_addr_mode() - Set 4-byte address mode for Spansion
404 * @enable: true to enter the 4-byte address mode, false to exit the 4-byte
407 * Return: 0 on success, -errno otherwise.
413 nor->bouncebuf[0] = enable << 7; in spansion_set_4byte_addr_mode()
415 if (nor->spimem) { in spansion_set_4byte_addr_mode()
420 SPI_MEM_OP_DATA_OUT(1, nor->bouncebuf, 1)); in spansion_set_4byte_addr_mode()
422 ret = spi_mem_exec_op(nor->spimem, &op); in spansion_set_4byte_addr_mode()
424 ret = nor->controller_ops->write_reg(nor, SPINOR_OP_BRWR, in spansion_set_4byte_addr_mode()
425 nor->bouncebuf, 1); in spansion_set_4byte_addr_mode()
429 dev_dbg(nor->dev, "error %d setting 4-byte mode\n", ret); in spansion_set_4byte_addr_mode()
435 * spi_nor_write_ear() - Write Extended Address Register.
439 * Return: 0 on success, -errno otherwise.
445 nor->bouncebuf[0] = ear; in spi_nor_write_ear()
447 if (nor->spimem) { in spi_nor_write_ear()
452 SPI_MEM_OP_DATA_OUT(1, nor->bouncebuf, 1)); in spi_nor_write_ear()
454 ret = spi_mem_exec_op(nor->spimem, &op); in spi_nor_write_ear()
456 ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WREAR, in spi_nor_write_ear()
457 nor->bouncebuf, 1); in spi_nor_write_ear()
461 dev_dbg(nor->dev, "error %d writing EAR\n", ret); in spi_nor_write_ear()
467 * spi_nor_xread_sr() - Read the Status Register on S3AN flashes.
469 * @sr: pointer to a DMA-able buffer where the value of the
472 * Return: 0 on success, -errno otherwise.
478 if (nor->spimem) { in spi_nor_xread_sr()
485 ret = spi_mem_exec_op(nor->spimem, &op); in spi_nor_xread_sr()
487 ret = nor->controller_ops->read_reg(nor, SPINOR_OP_XRDSR, in spi_nor_xread_sr()
492 dev_dbg(nor->dev, "error %d reading XRDSR\n", ret); in spi_nor_xread_sr()
498 * spi_nor_xsr_ready() - Query the Status Register of the S3AN flash to see if
499 * the flash is ready for new commands.
502 * Return: 1 if ready, 0 if not ready, -errno on errors.
508 ret = spi_nor_xread_sr(nor, nor->bouncebuf); in spi_nor_xsr_ready()
512 return !!(nor->bouncebuf[0] & XSR_RDY); in spi_nor_xsr_ready()
516 * spi_nor_clear_sr() - Clear the Status Register.
523 if (nor->spimem) { in spi_nor_clear_sr()
530 ret = spi_mem_exec_op(nor->spimem, &op); in spi_nor_clear_sr()
532 ret = nor->controller_ops->write_reg(nor, SPINOR_OP_CLSR, in spi_nor_clear_sr()
537 dev_dbg(nor->dev, "error %d clearing SR\n", ret); in spi_nor_clear_sr()
541 * spi_nor_sr_ready() - Query the Status Register to see if the flash is ready
545 * Return: 1 if ready, 0 if not ready, -errno on errors.
549 int ret = spi_nor_read_sr(nor, nor->bouncebuf); in spi_nor_sr_ready()
554 if (nor->flags & SNOR_F_USE_CLSR && in spi_nor_sr_ready()
555 nor->bouncebuf[0] & (SR_E_ERR | SR_P_ERR)) { in spi_nor_sr_ready()
556 if (nor->bouncebuf[0] & SR_E_ERR) in spi_nor_sr_ready()
557 dev_err(nor->dev, "Erase Error occurred\n"); in spi_nor_sr_ready()
559 dev_err(nor->dev, "Programming Error occurred\n"); in spi_nor_sr_ready()
573 return -EIO; in spi_nor_sr_ready()
576 return !(nor->bouncebuf[0] & SR_WIP); in spi_nor_sr_ready()
580 * spi_nor_clear_fsr() - Clear the Flag Status Register.
587 if (nor->spimem) { in spi_nor_clear_fsr()
594 ret = spi_mem_exec_op(nor->spimem, &op); in spi_nor_clear_fsr()
596 ret = nor->controller_ops->write_reg(nor, SPINOR_OP_CLFSR, in spi_nor_clear_fsr()
601 dev_dbg(nor->dev, "error %d clearing FSR\n", ret); in spi_nor_clear_fsr()
605 * spi_nor_fsr_ready() - Query the Flag Status Register to see if the flash is
609 * Return: 1 if ready, 0 if not ready, -errno on errors.
613 int ret = spi_nor_read_fsr(nor, nor->bouncebuf); in spi_nor_fsr_ready()
618 if (nor->bouncebuf[0] & (FSR_E_ERR | FSR_P_ERR)) { in spi_nor_fsr_ready()
619 if (nor->bouncebuf[0] & FSR_E_ERR) in spi_nor_fsr_ready()
620 dev_err(nor->dev, "Erase operation failed.\n"); in spi_nor_fsr_ready()
622 dev_err(nor->dev, "Program operation failed.\n"); in spi_nor_fsr_ready()
624 if (nor->bouncebuf[0] & FSR_PT_ERR) in spi_nor_fsr_ready()
625 dev_err(nor->dev, in spi_nor_fsr_ready()
640 return -EIO; in spi_nor_fsr_ready()
643 return !!(nor->bouncebuf[0] & FSR_READY); in spi_nor_fsr_ready()
647 * spi_nor_ready() - Query the flash to see if it is ready for new commands.
650 * Return: 1 if ready, 0 if not ready, -errno on errors.
656 if (nor->flags & SNOR_F_READY_XSR_RDY) in spi_nor_ready()
662 fsr = nor->flags & SNOR_F_USE_FSR ? spi_nor_fsr_ready(nor) : 1; in spi_nor_ready()
669 * spi_nor_wait_till_ready_with_timeout() - Service routine to read the
674 * Return: 0 on success, -errno otherwise.
697 dev_dbg(nor->dev, "flash operation timed out\n"); in spi_nor_wait_till_ready_with_timeout()
699 return -ETIMEDOUT; in spi_nor_wait_till_ready_with_timeout()
703 * spi_nor_wait_till_ready() - Wait for a predefined amount of time for the
704 * flash to be ready, or timeout occurs.
707 * Return: 0 on success, -errno otherwise.
716 * spi_nor_write_sr() - Write the Status Register.
718 * @sr: pointer to DMA-able buffer to write to the Status Register.
721 * Return: 0 on success, -errno otherwise.
731 if (nor->spimem) { in spi_nor_write_sr()
738 ret = spi_mem_exec_op(nor->spimem, &op); in spi_nor_write_sr()
740 ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WRSR, in spi_nor_write_sr()
745 dev_dbg(nor->dev, "error %d writing SR\n", ret); in spi_nor_write_sr()
753 * spi_nor_write_sr1_and_check() - Write one byte to the Status Register 1 and
758 * Return: 0 on success, -errno otherwise.
764 nor->bouncebuf[0] = sr1; in spi_nor_write_sr1_and_check()
766 ret = spi_nor_write_sr(nor, nor->bouncebuf, 1); in spi_nor_write_sr1_and_check()
770 ret = spi_nor_read_sr(nor, nor->bouncebuf); in spi_nor_write_sr1_and_check()
774 if (nor->bouncebuf[0] != sr1) { in spi_nor_write_sr1_and_check()
775 dev_dbg(nor->dev, "SR1: read back test failed\n"); in spi_nor_write_sr1_and_check()
776 return -EIO; in spi_nor_write_sr1_and_check()
783 * spi_nor_write_16bit_sr_and_check() - Write the Status Register 1 and the
785 * Register 1 match the received value, and that the 16-bit Write did not
790 * Return: 0 on success, -errno otherwise.
795 u8 *sr_cr = nor->bouncebuf; in spi_nor_write_16bit_sr_and_check()
799 if (!(nor->flags & SNOR_F_NO_READ_CR)) { in spi_nor_write_16bit_sr_and_check()
803 } else if (nor->params->quad_enable) { in spi_nor_write_16bit_sr_and_check()
811 * nor->params->quad_enable() call. in spi_nor_write_16bit_sr_and_check()
815 * revB standard, BFPT DWORDS[15], bits 22:20, the 16-bit in spi_nor_write_16bit_sr_and_check()
830 if (nor->flags & SNOR_F_NO_READ_CR) in spi_nor_write_16bit_sr_and_check()
840 dev_dbg(nor->dev, "CR: read back test failed\n"); in spi_nor_write_16bit_sr_and_check()
841 return -EIO; in spi_nor_write_16bit_sr_and_check()
848 * spi_nor_write_16bit_cr_and_check() - Write the Status Register 1 and the
850 * Configuration Register match the received value, and that the 16-bit Write
855 * Return: 0 on success, -errno otherwise.
860 u8 *sr_cr = nor->bouncebuf; in spi_nor_write_16bit_cr_and_check()
881 dev_dbg(nor->dev, "SR: Read back test failed\n"); in spi_nor_write_16bit_cr_and_check()
882 return -EIO; in spi_nor_write_16bit_cr_and_check()
885 if (nor->flags & SNOR_F_NO_READ_CR) in spi_nor_write_16bit_cr_and_check()
893 dev_dbg(nor->dev, "CR: read back test failed\n"); in spi_nor_write_16bit_cr_and_check()
894 return -EIO; in spi_nor_write_16bit_cr_and_check()
901 * spi_nor_write_sr_and_check() - Write the Status Register 1 and ensure that
907 * Return: 0 on success, -errno otherwise.
911 if (nor->flags & SNOR_F_HAS_16BIT_SR) in spi_nor_write_sr_and_check()
918 * spi_nor_write_sr2() - Write the Status Register 2 using the
921 * @sr2: pointer to DMA-able buffer to write to the Status Register 2.
923 * Return: 0 on success, -errno otherwise.
933 if (nor->spimem) { in spi_nor_write_sr2()
940 ret = spi_mem_exec_op(nor->spimem, &op); in spi_nor_write_sr2()
942 ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WRSR2, in spi_nor_write_sr2()
947 dev_dbg(nor->dev, "error %d writing SR2\n", ret); in spi_nor_write_sr2()
955 * spi_nor_read_sr2() - Read the Status Register 2 using the
958 * @sr2: pointer to DMA-able buffer where the value of the
961 * Return: 0 on success, -errno otherwise.
967 if (nor->spimem) { in spi_nor_read_sr2()
974 ret = spi_mem_exec_op(nor->spimem, &op); in spi_nor_read_sr2()
976 ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDSR2, in spi_nor_read_sr2()
981 dev_dbg(nor->dev, "error %d reading SR2\n", ret); in spi_nor_read_sr2()
987 * spi_nor_erase_chip() - Erase the entire flash memory.
990 * Return: 0 on success, -errno otherwise.
996 dev_dbg(nor->dev, " %lldKiB\n", (long long)(nor->mtd.size >> 10)); in spi_nor_erase_chip()
998 if (nor->spimem) { in spi_nor_erase_chip()
1005 ret = spi_mem_exec_op(nor->spimem, &op); in spi_nor_erase_chip()
1007 ret = nor->controller_ops->write_reg(nor, SPINOR_OP_CHIP_ERASE, in spi_nor_erase_chip()
1012 dev_dbg(nor->dev, "error %d erasing chip\n", ret); in spi_nor_erase_chip()
1078 return !!nor->params->erase_map.uniform_erase_type; in spi_nor_has_uniform_erase()
1083 nor->read_opcode = spi_nor_convert_3to4_read(nor->read_opcode); in spi_nor_set_4byte_opcodes()
1084 nor->program_opcode = spi_nor_convert_3to4_program(nor->program_opcode); in spi_nor_set_4byte_opcodes()
1085 nor->erase_opcode = spi_nor_convert_3to4_erase(nor->erase_opcode); in spi_nor_set_4byte_opcodes()
1088 struct spi_nor_erase_map *map = &nor->params->erase_map; in spi_nor_set_4byte_opcodes()
1093 erase = &map->erase_type[i]; in spi_nor_set_4byte_opcodes()
1094 erase->opcode = in spi_nor_set_4byte_opcodes()
1095 spi_nor_convert_3to4_erase(erase->opcode); in spi_nor_set_4byte_opcodes()
1104 mutex_lock(&nor->lock); in spi_nor_lock_and_prep()
1106 if (nor->controller_ops && nor->controller_ops->prepare) { in spi_nor_lock_and_prep()
1107 ret = nor->controller_ops->prepare(nor); in spi_nor_lock_and_prep()
1109 mutex_unlock(&nor->lock); in spi_nor_lock_and_prep()
1118 if (nor->controller_ops && nor->controller_ops->unprepare) in spi_nor_unlock_and_unprep()
1119 nor->controller_ops->unprepare(nor); in spi_nor_unlock_and_unprep()
1120 mutex_unlock(&nor->lock); in spi_nor_unlock_and_unprep()
1125 if (!nor->params->convert_addr) in spi_nor_convert_addr()
1128 return nor->params->convert_addr(nor, addr); in spi_nor_convert_addr()
1140 if (nor->spimem) { in spi_nor_erase_sector()
1142 SPI_MEM_OP(SPI_MEM_OP_CMD(nor->erase_opcode, 1), in spi_nor_erase_sector()
1143 SPI_MEM_OP_ADDR(nor->addr_width, addr, 1), in spi_nor_erase_sector()
1147 return spi_mem_exec_op(nor->spimem, &op); in spi_nor_erase_sector()
1148 } else if (nor->controller_ops->erase) { in spi_nor_erase_sector()
1149 return nor->controller_ops->erase(nor, addr); in spi_nor_erase_sector()
1156 for (i = nor->addr_width - 1; i >= 0; i--) { in spi_nor_erase_sector()
1157 nor->bouncebuf[i] = addr & 0xff; in spi_nor_erase_sector()
1161 return nor->controller_ops->write_reg(nor, nor->erase_opcode, in spi_nor_erase_sector()
1162 nor->bouncebuf, nor->addr_width); in spi_nor_erase_sector()
1166 * spi_nor_div_by_erase_size() - calculate remainder and update new dividend
1167 * @erase: pointer to a structure that describes a SPI NOR erase type
1177 *remainder = (u32)dividend & erase->size_mask; in spi_nor_div_by_erase_size()
1178 return dividend >> erase->size_shift; in spi_nor_div_by_erase_size()
1182 * spi_nor_find_best_erase_type() - find the best erase type for the given
1183 * offset in the serial flash memory and the
1187 * @map: the erase map of the SPI NOR
1188 * @region: pointer to a structure that describes a SPI NOR erase region
1189 * @addr: offset in the serial flash memory
1202 u8 erase_mask = region->offset & SNOR_ERASE_TYPE_MASK; in spi_nor_find_best_erase_type()
1208 for (i = SNOR_ERASE_TYPE_MAX - 1; i >= 0; i--) { in spi_nor_find_best_erase_type()
1213 erase = &map->erase_type[i]; in spi_nor_find_best_erase_type()
1216 if (erase->size > len) in spi_nor_find_best_erase_type()
1220 if (region->offset & SNOR_OVERLAID_REGION) in spi_nor_find_best_erase_type()
1235 return region->offset & SNOR_LAST_REGION; in spi_nor_region_is_last()
1240 return (region->offset & ~SNOR_ERASE_FLAGS_MASK) + region->size; in spi_nor_region_end()
1244 * spi_nor_region_next() - get the next spi nor region
1245 * @region: pointer to a structure that describes a SPI NOR erase region
1247 * Return: the next spi nor region or NULL if last region.
1259 * spi_nor_find_erase_region() - find the region of the serial flash memory in
1261 * @map: the erase map of the SPI NOR
1262 * @addr: offset in the serial flash memory
1264 * Return: a pointer to the spi_nor_erase_region struct, ERR_PTR(-errno)
1270 struct spi_nor_erase_region *region = map->regions; in spi_nor_find_erase_region()
1271 u64 region_start = region->offset & ~SNOR_ERASE_FLAGS_MASK; in spi_nor_find_erase_region()
1272 u64 region_end = region_start + region->size; in spi_nor_find_erase_region()
1277 return ERR_PTR(-EINVAL); in spi_nor_find_erase_region()
1279 region_start = region->offset & ~SNOR_ERASE_FLAGS_MASK; in spi_nor_find_erase_region()
1280 region_end = region_start + region->size; in spi_nor_find_erase_region()
1287 * spi_nor_init_erase_cmd() - initialize an erase command
1288 * @region: pointer to a structure that describes a SPI NOR erase region
1289 * @erase: pointer to a structure that describes a SPI NOR erase type
1291 * Return: the pointer to the allocated erase command, ERR_PTR(-errno)
1302 return ERR_PTR(-ENOMEM); in spi_nor_init_erase_cmd()
1304 INIT_LIST_HEAD(&cmd->list); in spi_nor_init_erase_cmd()
1305 cmd->opcode = erase->opcode; in spi_nor_init_erase_cmd()
1306 cmd->count = 1; in spi_nor_init_erase_cmd()
1308 if (region->offset & SNOR_OVERLAID_REGION) in spi_nor_init_erase_cmd()
1309 cmd->size = region->size; in spi_nor_init_erase_cmd()
1311 cmd->size = erase->size; in spi_nor_init_erase_cmd()
1317 * spi_nor_destroy_erase_cmd_list() - destroy erase command list
1325 list_del(&cmd->list); in spi_nor_destroy_erase_cmd_list()
1331 * spi_nor_init_erase_cmd_list() - initialize erase command list
1335 * @addr: offset in the serial flash memory
1341 * Return: 0 on success, -errno otherwise.
1347 const struct spi_nor_erase_map *map = &nor->params->erase_map; in spi_nor_init_erase_cmd_list()
1352 int ret = -EINVAL; in spi_nor_init_erase_cmd_list()
1366 region->offset & SNOR_OVERLAID_REGION) { in spi_nor_init_erase_cmd_list()
1373 list_add_tail(&cmd->list, erase_list); in spi_nor_init_erase_cmd_list()
1375 cmd->count++; in spi_nor_init_erase_cmd_list()
1378 addr += cmd->size; in spi_nor_init_erase_cmd_list()
1379 len -= cmd->size; in spi_nor_init_erase_cmd_list()
1399 * spi_nor_erase_multi_sectors() - perform a non-uniform erase
1401 * @addr: offset in the serial flash memory
1407 * Return: 0 on success, -errno otherwise.
1420 nor->erase_opcode = cmd->opcode; in spi_nor_erase_multi_sectors()
1421 while (cmd->count) { in spi_nor_erase_multi_sectors()
1430 addr += cmd->size; in spi_nor_erase_multi_sectors()
1431 cmd->count--; in spi_nor_erase_multi_sectors()
1437 list_del(&cmd->list); in spi_nor_erase_multi_sectors()
1459 dev_dbg(nor->dev, "at 0x%llx, len %lld\n", (long long)instr->addr, in spi_nor_erase()
1460 (long long)instr->len); in spi_nor_erase()
1463 div_u64_rem(instr->len, mtd->erasesize, &rem); in spi_nor_erase()
1465 return -EINVAL; in spi_nor_erase()
1468 addr = instr->addr; in spi_nor_erase()
1469 len = instr->len; in spi_nor_erase()
1475 /* whole-chip erase? */ in spi_nor_erase()
1476 if (len == mtd->size && !(nor->flags & SNOR_F_NO_OP_CHIP_ERASE)) { in spi_nor_erase()
1488 * Scale the timeout linearly with the size of the flash, with in spi_nor_erase()
1489 * a minimum calibrated to an old 2MB flash. We could try to in spi_nor_erase()
1495 (unsigned long)(mtd->size / SZ_2M)); in spi_nor_erase()
1505 /* "sector"-at-a-time erase */ in spi_nor_erase()
1516 addr += mtd->erasesize; in spi_nor_erase()
1517 len -= mtd->erasesize; in spi_nor_erase()
1543 if (nor->flags & SNOR_F_HAS_SR_BP3_BIT6) in spi_nor_get_sr_bp_mask()
1546 if (nor->flags & SNOR_F_HAS_4BIT_BP) in spi_nor_get_sr_bp_mask()
1554 if (nor->flags & SNOR_F_HAS_SR_TB_BIT6) in spi_nor_get_sr_tb_mask()
1566 bp_slots = (1 << hweight8(mask)) - 2; in spi_nor_get_min_prot_length_sr()
1567 bp_slots_needed = ilog2(nor->info->n_sectors); in spi_nor_get_min_prot_length_sr()
1570 return nor->info->sector_size << in spi_nor_get_min_prot_length_sr()
1571 (bp_slots_needed - bp_slots); in spi_nor_get_min_prot_length_sr()
1573 return nor->info->sector_size; in spi_nor_get_min_prot_length_sr()
1579 struct mtd_info *mtd = &nor->mtd; in spi_nor_get_locked_range_sr()
1585 if (nor->flags & SNOR_F_HAS_SR_BP3_BIT6 && val & SR_BP3_BIT6) in spi_nor_get_locked_range_sr()
1598 *len = min_prot_len << (bp - 1); in spi_nor_get_locked_range_sr()
1600 if (*len > mtd->size) in spi_nor_get_locked_range_sr()
1601 *len = mtd->size; in spi_nor_get_locked_range_sr()
1603 if (nor->flags & SNOR_F_HAS_SR_TB && sr & tb_mask) in spi_nor_get_locked_range_sr()
1606 *ofs = mtd->size - *len; in spi_nor_get_locked_range_sr()
1625 /* Requested range is a sub-range of locked range */ in spi_nor_check_lock_status_sr()
1645 * Lock a region of the flash. Compatible with ST Micro and similar flash.
1649 * - SEC: sector/block protect - only handle SEC=0 (block protect)
1650 * - CMP: complement protect - only support CMP=0 (range is not complemented)
1652 * Support for the following is provided conditionally for some flash:
1653 * - TB: top/bottom protect
1655 * Sample table portion for 8MB flash (Winbond w25q64fw):
1658 * --------------------------------------------------------------------------
1667 * ------|-------|-------|-------|-------|---------------|-------------------
1679 struct mtd_info *mtd = &nor->mtd; in spi_nor_sr_lock()
1686 bool can_be_top = true, can_be_bottom = nor->flags & SNOR_F_HAS_SR_TB; in spi_nor_sr_lock()
1689 ret = spi_nor_read_sr(nor, nor->bouncebuf); in spi_nor_sr_lock()
1693 status_old = nor->bouncebuf[0]; in spi_nor_sr_lock()
1704 if (!spi_nor_is_locked_sr(nor, ofs + len, mtd->size - (ofs + len), in spi_nor_sr_lock()
1709 return -EINVAL; in spi_nor_sr_lock()
1716 lock_len = mtd->size - ofs; in spi_nor_sr_lock()
1720 if (lock_len == mtd->size) { in spi_nor_sr_lock()
1724 pow = ilog2(lock_len) - ilog2(min_prot_len) + 1; in spi_nor_sr_lock()
1727 if (nor->flags & SNOR_F_HAS_SR_BP3_BIT6 && val & SR_BP3) in spi_nor_sr_lock()
1731 return -EINVAL; in spi_nor_sr_lock()
1735 return -EINVAL; in spi_nor_sr_lock()
1752 return -EINVAL; in spi_nor_sr_lock()
1758 * Unlock a region of the flash. See spi_nor_sr_lock() for more info
1764 struct mtd_info *mtd = &nor->mtd; in spi_nor_sr_unlock()
1771 bool can_be_top = true, can_be_bottom = nor->flags & SNOR_F_HAS_SR_TB; in spi_nor_sr_unlock()
1774 ret = spi_nor_read_sr(nor, nor->bouncebuf); in spi_nor_sr_unlock()
1778 status_old = nor->bouncebuf[0]; in spi_nor_sr_unlock()
1789 if (!spi_nor_is_unlocked_sr(nor, ofs + len, mtd->size - (ofs + len), in spi_nor_sr_unlock()
1794 return -EINVAL; in spi_nor_sr_unlock()
1801 lock_len = mtd->size - (ofs + len); in spi_nor_sr_unlock()
1809 pow = ilog2(lock_len) - ilog2(min_prot_len) + 1; in spi_nor_sr_unlock()
1812 if (nor->flags & SNOR_F_HAS_SR_BP3_BIT6 && val & SR_BP3) in spi_nor_sr_unlock()
1815 /* Some power-of-two sizes are not supported */ in spi_nor_sr_unlock()
1817 return -EINVAL; in spi_nor_sr_unlock()
1835 return -EINVAL; in spi_nor_sr_unlock()
1841 * Check if a region of the flash is (completely) locked. See spi_nor_sr_lock()
1851 ret = spi_nor_read_sr(nor, nor->bouncebuf); in spi_nor_sr_is_locked()
1855 return spi_nor_is_locked_sr(nor, ofs, len, nor->bouncebuf[0]); in spi_nor_sr_is_locked()
1873 ret = nor->params->locking_ops->lock(nor, ofs, len); in spi_nor_lock()
1888 ret = nor->params->locking_ops->unlock(nor, ofs, len); in spi_nor_unlock()
1903 ret = nor->params->locking_ops->is_locked(nor, ofs, len); in spi_nor_is_locked()
1910 * spi_nor_sr1_bit6_quad_enable() - Set the Quad Enable BIT(6) in the Status
1916 * Return: 0 on success, -errno otherwise.
1922 ret = spi_nor_read_sr(nor, nor->bouncebuf); in spi_nor_sr1_bit6_quad_enable()
1926 if (nor->bouncebuf[0] & SR1_QUAD_EN_BIT6) in spi_nor_sr1_bit6_quad_enable()
1929 nor->bouncebuf[0] |= SR1_QUAD_EN_BIT6; in spi_nor_sr1_bit6_quad_enable()
1931 return spi_nor_write_sr1_and_check(nor, nor->bouncebuf[0]); in spi_nor_sr1_bit6_quad_enable()
1935 * spi_nor_sr2_bit1_quad_enable() - set the Quad Enable BIT(1) in the Status
1941 * Return: 0 on success, -errno otherwise.
1947 if (nor->flags & SNOR_F_NO_READ_CR) in spi_nor_sr2_bit1_quad_enable()
1950 ret = spi_nor_read_cr(nor, nor->bouncebuf); in spi_nor_sr2_bit1_quad_enable()
1954 if (nor->bouncebuf[0] & SR2_QUAD_EN_BIT1) in spi_nor_sr2_bit1_quad_enable()
1957 nor->bouncebuf[0] |= SR2_QUAD_EN_BIT1; in spi_nor_sr2_bit1_quad_enable()
1959 return spi_nor_write_16bit_cr_and_check(nor, nor->bouncebuf[0]); in spi_nor_sr2_bit1_quad_enable()
1963 * spi_nor_sr2_bit7_quad_enable() - set QE bit in Status Register 2.
1972 * Return: 0 on success, -errno otherwise.
1976 u8 *sr2 = nor->bouncebuf; in spi_nor_sr2_bit7_quad_enable()
2002 dev_dbg(nor->dev, "SR2: Read back test failed\n"); in spi_nor_sr2_bit7_quad_enable()
2003 return -EIO; in spi_nor_sr2_bit7_quad_enable()
2047 u8 *id = nor->bouncebuf; in spi_nor_read_id()
2051 if (nor->spimem) { in spi_nor_read_id()
2058 ret = spi_mem_exec_op(nor->spimem, &op); in spi_nor_read_id()
2060 ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDID, id, in spi_nor_read_id()
2064 dev_dbg(nor->dev, "error %d reading JEDEC ID\n", ret); in spi_nor_read_id()
2069 info = spi_nor_search_part_by_id(manufacturers[i]->parts, in spi_nor_read_id()
2070 manufacturers[i]->nparts, in spi_nor_read_id()
2073 nor->manufacturer = manufacturers[i]; in spi_nor_read_id()
2078 dev_err(nor->dev, "unrecognized JEDEC id bytes: %*ph\n", in spi_nor_read_id()
2080 return ERR_PTR(-ENODEV); in spi_nor_read_id()
2089 dev_dbg(nor->dev, "from 0x%08x, len %zd\n", (u32)from, len); in spi_nor_read()
2102 /* We shouldn't see 0-length reads */ in spi_nor_read()
2103 ret = -EIO; in spi_nor_read()
2113 len -= ret; in spi_nor_read()
2134 dev_dbg(nor->dev, "to 0x%08x, len %zd\n", (u32)to, len); in spi_nor_write()
2152 if (hweight32(nor->page_size) == 1) { in spi_nor_write()
2153 page_offset = addr & (nor->page_size - 1); in spi_nor_write()
2157 page_offset = do_div(aux, nor->page_size); in spi_nor_write()
2161 nor->page_size - page_offset, len - i); in spi_nor_write()
2188 if (!nor->dev || in spi_nor_check()
2189 (!nor->spimem && !nor->controller_ops) || in spi_nor_check()
2190 (!nor->spimem && nor->controller_ops && in spi_nor_check()
2191 (!nor->controller_ops->read || in spi_nor_check()
2192 !nor->controller_ops->write || in spi_nor_check()
2193 !nor->controller_ops->read_reg || in spi_nor_check()
2194 !nor->controller_ops->write_reg))) { in spi_nor_check()
2195 pr_err("spi-nor: please fill all the necessary fields!\n"); in spi_nor_check()
2196 return -EINVAL; in spi_nor_check()
2199 if (nor->spimem && nor->controller_ops) { in spi_nor_check()
2200 …dev_err(nor->dev, "nor->spimem and nor->controller_ops are mutually exclusive, please set just one… in spi_nor_check()
2201 return -EINVAL; in spi_nor_check()
2214 read->num_mode_clocks = num_mode_clocks; in spi_nor_set_read_settings()
2215 read->num_wait_states = num_wait_states; in spi_nor_set_read_settings()
2216 read->opcode = opcode; in spi_nor_set_read_settings()
2217 read->proto = proto; in spi_nor_set_read_settings()
2223 pp->opcode = opcode; in spi_nor_set_pp_settings()
2224 pp->proto = proto; in spi_nor_set_pp_settings()
2235 return -EINVAL; in spi_nor_hwcaps2cmd()
2279 * spi_nor_spimem_check_op - check if the operation is supported
2284 * Returns 0 if operation is supported, -ENOTSUPP otherwise.
2292 * SPI controller implementation should not check the opcode, in spi_nor_spimem_check_op()
2295 op->addr.nbytes = 4; in spi_nor_spimem_check_op()
2296 if (!spi_mem_supports_op(nor->spimem, op)) { in spi_nor_spimem_check_op()
2297 if (nor->mtd.size > SZ_16M) in spi_nor_spimem_check_op()
2298 return -ENOTSUPP; in spi_nor_spimem_check_op()
2300 /* If flash size <= 16MB, 3 address bytes are sufficient */ in spi_nor_spimem_check_op()
2301 op->addr.nbytes = 3; in spi_nor_spimem_check_op()
2302 if (!spi_mem_supports_op(nor->spimem, op)) in spi_nor_spimem_check_op()
2303 return -ENOTSUPP; in spi_nor_spimem_check_op()
2310 * spi_nor_spimem_check_readop - check if the read op is supported
2315 * Returns 0 if operation is supported, -ENOTSUPP otherwise.
2320 struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(read->opcode, 1), in spi_nor_spimem_check_readop()
2325 op.cmd.buswidth = spi_nor_get_protocol_inst_nbits(read->proto); in spi_nor_spimem_check_readop()
2326 op.addr.buswidth = spi_nor_get_protocol_addr_nbits(read->proto); in spi_nor_spimem_check_readop()
2327 op.data.buswidth = spi_nor_get_protocol_data_nbits(read->proto); in spi_nor_spimem_check_readop()
2329 op.dummy.nbytes = (read->num_mode_clocks + read->num_wait_states) * in spi_nor_spimem_check_readop()
2336 * spi_nor_spimem_check_pp - check if the page program op is supported
2341 * Returns 0 if operation is supported, -ENOTSUPP otherwise.
2346 struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(pp->opcode, 1), in spi_nor_spimem_check_pp()
2351 op.cmd.buswidth = spi_nor_get_protocol_inst_nbits(pp->proto); in spi_nor_spimem_check_pp()
2352 op.addr.buswidth = spi_nor_get_protocol_addr_nbits(pp->proto); in spi_nor_spimem_check_pp()
2353 op.data.buswidth = spi_nor_get_protocol_data_nbits(pp->proto); in spi_nor_spimem_check_pp()
2359 * spi_nor_spimem_adjust_hwcaps - Find optimal Read/Write protocol
2360 * based on SPI controller capabilities
2363 * according to controller and flash's capability
2368 struct spi_nor_flash_parameter *params = nor->params; in spi_nor_spimem_adjust_hwcaps()
2374 /* X-X-X modes are not supported yet, mask them all. */ in spi_nor_spimem_adjust_hwcaps()
2385 spi_nor_spimem_check_readop(nor, ¶ms->reads[rdidx])) in spi_nor_spimem_adjust_hwcaps()
2393 ¶ms->page_programs[ppidx])) in spi_nor_spimem_adjust_hwcaps()
2399 * spi_nor_set_erase_type() - set a SPI NOR erase type
2400 * @erase: pointer to a structure that describes a SPI NOR erase type
2402 * @opcode: the SPI command op code to erase the sector/block
2407 erase->size = size; in spi_nor_set_erase_type()
2408 erase->opcode = opcode; in spi_nor_set_erase_type()
2410 erase->size_shift = ffs(erase->size) - 1; in spi_nor_set_erase_type()
2411 erase->size_mask = (1 << erase->size_shift) - 1; in spi_nor_set_erase_type()
2415 * spi_nor_init_uniform_erase_map() - Initialize uniform erase map
2416 * @map: the erase map of the SPI NOR
2418 * flash memory
2419 * @flash_size: the spi nor flash memory size
2425 map->uniform_region.offset = (erase_mask & SNOR_ERASE_TYPE_MASK) | in spi_nor_init_uniform_erase_map()
2427 map->uniform_region.size = flash_size; in spi_nor_init_uniform_erase_map()
2428 map->regions = &map->uniform_region; in spi_nor_init_uniform_erase_map()
2429 map->uniform_erase_type = erase_mask; in spi_nor_init_uniform_erase_map()
2439 if (nor->manufacturer && nor->manufacturer->fixups && in spi_nor_post_bfpt_fixups()
2440 nor->manufacturer->fixups->post_bfpt) { in spi_nor_post_bfpt_fixups()
2441 ret = nor->manufacturer->fixups->post_bfpt(nor, bfpt_header, in spi_nor_post_bfpt_fixups()
2447 if (nor->info->fixups && nor->info->fixups->post_bfpt) in spi_nor_post_bfpt_fixups()
2448 return nor->info->fixups->post_bfpt(nor, bfpt_header, bfpt, in spi_nor_post_bfpt_fixups()
2457 int cmd, best_match = fls(shared_hwcaps & SNOR_HWCAPS_READ_MASK) - 1; in spi_nor_select_read()
2461 return -EINVAL; in spi_nor_select_read()
2465 return -EINVAL; in spi_nor_select_read()
2467 read = &nor->params->reads[cmd]; in spi_nor_select_read()
2468 nor->read_opcode = read->opcode; in spi_nor_select_read()
2469 nor->read_proto = read->proto; in spi_nor_select_read()
2472 * In the SPI NOR framework, we don't need to make the difference in spi_nor_select_read()
2475 * flash memory to know whether it should enter or leave its 0-4-4 in spi_nor_select_read()
2477 * eXecution In Place is out of the scope of the mtd sub-system. in spi_nor_select_read()
2481 nor->read_dummy = read->num_mode_clocks + read->num_wait_states; in spi_nor_select_read()
2488 int cmd, best_match = fls(shared_hwcaps & SNOR_HWCAPS_PP_MASK) - 1; in spi_nor_select_pp()
2492 return -EINVAL; in spi_nor_select_pp()
2496 return -EINVAL; in spi_nor_select_pp()
2498 pp = &nor->params->page_programs[cmd]; in spi_nor_select_pp()
2499 nor->program_opcode = pp->opcode; in spi_nor_select_pp()
2500 nor->write_proto = pp->proto; in spi_nor_select_pp()
2505 * spi_nor_select_uniform_erase() - select optimum uniform erase type
2506 * @map: the erase map of the SPI NOR
2508 * info->sector_size or of the "small sector" size in case
2522 u8 uniform_erase_type = map->uniform_erase_type; in spi_nor_select_uniform_erase()
2524 for (i = SNOR_ERASE_TYPE_MAX - 1; i >= 0; i--) { in spi_nor_select_uniform_erase()
2528 tested_erase = &map->erase_type[i]; in spi_nor_select_uniform_erase()
2534 if (tested_erase->size == wanted_size) { in spi_nor_select_uniform_erase()
2543 if (!erase && tested_erase->size) in spi_nor_select_uniform_erase()
2552 map->uniform_erase_type &= ~SNOR_ERASE_TYPE_MASK; in spi_nor_select_uniform_erase()
2553 map->uniform_erase_type |= BIT(erase - map->erase_type); in spi_nor_select_uniform_erase()
2559 struct spi_nor_erase_map *map = &nor->params->erase_map; in spi_nor_select_erase()
2561 struct mtd_info *mtd = &nor->mtd; in spi_nor_select_erase()
2562 u32 wanted_size = nor->info->sector_size; in spi_nor_select_erase()
2567 * that the SPI flash memory has an uniform layout then used only one in spi_nor_select_erase()
2570 * manage the SPI flash memory as uniform with a single erase sector in spi_nor_select_erase()
2581 return -EINVAL; in spi_nor_select_erase()
2582 nor->erase_opcode = erase->opcode; in spi_nor_select_erase()
2583 mtd->erasesize = erase->size; in spi_nor_select_erase()
2588 * For non-uniform SPI flash memory, set mtd->erasesize to the in spi_nor_select_erase()
2589 * maximum erase sector size. No need to set nor->erase_opcode. in spi_nor_select_erase()
2591 for (i = SNOR_ERASE_TYPE_MAX - 1; i >= 0; i--) { in spi_nor_select_erase()
2592 if (map->erase_type[i].size) { in spi_nor_select_erase()
2593 erase = &map->erase_type[i]; in spi_nor_select_erase()
2599 return -EINVAL; in spi_nor_select_erase()
2601 mtd->erasesize = erase->size; in spi_nor_select_erase()
2608 struct spi_nor_flash_parameter *params = nor->params; in spi_nor_default_setup()
2613 * Keep only the hardware capabilities supported by both the SPI in spi_nor_default_setup()
2614 * controller and the SPI flash memory. in spi_nor_default_setup()
2616 shared_mask = hwcaps->mask & params->hwcaps.mask; in spi_nor_default_setup()
2618 if (nor->spimem) { in spi_nor_default_setup()
2621 * need to discard some of them based on what the SPI in spi_nor_default_setup()
2627 * SPI n-n-n protocols are not supported when the SPI in spi_nor_default_setup()
2629 * Yet another reason to switch to spi-mem. in spi_nor_default_setup()
2633 dev_dbg(nor->dev, in spi_nor_default_setup()
2634 "SPI n-n-n protocols are not supported.\n"); in spi_nor_default_setup()
2642 dev_dbg(nor->dev, in spi_nor_default_setup()
2643 "can't select read settings supported by both the SPI controller and memory.\n"); in spi_nor_default_setup()
2650 dev_dbg(nor->dev, in spi_nor_default_setup()
2651 "can't select write settings supported by both the SPI controller and memory.\n"); in spi_nor_default_setup()
2658 dev_dbg(nor->dev, in spi_nor_default_setup()
2659 "can't select erase settings supported by both the SPI controller and memory.\n"); in spi_nor_default_setup()
2669 if (!nor->params->setup) in spi_nor_setup()
2672 return nor->params->setup(nor, hwcaps); in spi_nor_setup()
2676 * spi_nor_manufacturer_init_params() - Initialize the flash's parameters and
2677 * settings based on MFR register and ->default_init() hook.
2682 if (nor->manufacturer && nor->manufacturer->fixups && in spi_nor_manufacturer_init_params()
2683 nor->manufacturer->fixups->default_init) in spi_nor_manufacturer_init_params()
2684 nor->manufacturer->fixups->default_init(nor); in spi_nor_manufacturer_init_params()
2686 if (nor->info->fixups && nor->info->fixups->default_init) in spi_nor_manufacturer_init_params()
2687 nor->info->fixups->default_init(nor); in spi_nor_manufacturer_init_params()
2691 * spi_nor_sfdp_init_params() - Initialize the flash's parameters and settings
2695 * The method has a roll-back mechanism: in case the SFDP parsing fails, the
2696 * legacy flash parameters and settings will be restored.
2702 memcpy(&sfdp_params, nor->params, sizeof(sfdp_params)); in spi_nor_sfdp_init_params()
2704 if (spi_nor_parse_sfdp(nor, nor->params)) { in spi_nor_sfdp_init_params()
2705 memcpy(nor->params, &sfdp_params, sizeof(*nor->params)); in spi_nor_sfdp_init_params()
2706 nor->addr_width = 0; in spi_nor_sfdp_init_params()
2707 nor->flags &= ~SNOR_F_4B_OPCODES; in spi_nor_sfdp_init_params()
2712 * spi_nor_info_init_params() - Initialize the flash's parameters and settings
2713 * based on nor->info data.
2718 struct spi_nor_flash_parameter *params = nor->params; in spi_nor_info_init_params()
2719 struct spi_nor_erase_map *map = ¶ms->erase_map; in spi_nor_info_init_params()
2720 const struct flash_info *info = nor->info; in spi_nor_info_init_params()
2724 /* Initialize legacy flash parameters and settings. */ in spi_nor_info_init_params()
2725 params->quad_enable = spi_nor_sr2_bit1_quad_enable; in spi_nor_info_init_params()
2726 params->set_4byte_addr_mode = spansion_set_4byte_addr_mode; in spi_nor_info_init_params()
2727 params->setup = spi_nor_default_setup; in spi_nor_info_init_params()
2728 /* Default to 16-bit Write Status (01h) Command */ in spi_nor_info_init_params()
2729 nor->flags |= SNOR_F_HAS_16BIT_SR; in spi_nor_info_init_params()
2731 /* Set SPI NOR sizes. */ in spi_nor_info_init_params()
2732 params->size = (u64)info->sector_size * info->n_sectors; in spi_nor_info_init_params()
2733 params->page_size = info->page_size; in spi_nor_info_init_params()
2735 if (!(info->flags & SPI_NOR_NO_FR)) { in spi_nor_info_init_params()
2736 /* Default to Fast Read for DT and non-DT platform devices. */ in spi_nor_info_init_params()
2737 params->hwcaps.mask |= SNOR_HWCAPS_READ_FAST; in spi_nor_info_init_params()
2740 if (np && !of_property_read_bool(np, "m25p,fast-read")) in spi_nor_info_init_params()
2741 params->hwcaps.mask &= ~SNOR_HWCAPS_READ_FAST; in spi_nor_info_init_params()
2745 params->hwcaps.mask |= SNOR_HWCAPS_READ; in spi_nor_info_init_params()
2746 spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ], in spi_nor_info_init_params()
2750 if (params->hwcaps.mask & SNOR_HWCAPS_READ_FAST) in spi_nor_info_init_params()
2751 spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ_FAST], in spi_nor_info_init_params()
2755 if (info->flags & SPI_NOR_DUAL_READ) { in spi_nor_info_init_params()
2756 params->hwcaps.mask |= SNOR_HWCAPS_READ_1_1_2; in spi_nor_info_init_params()
2757 spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ_1_1_2], in spi_nor_info_init_params()
2762 if (info->flags & SPI_NOR_QUAD_READ) { in spi_nor_info_init_params()
2763 params->hwcaps.mask |= SNOR_HWCAPS_READ_1_1_4; in spi_nor_info_init_params()
2764 spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ_1_1_4], in spi_nor_info_init_params()
2769 if (info->flags & SPI_NOR_OCTAL_READ) { in spi_nor_info_init_params()
2770 params->hwcaps.mask |= SNOR_HWCAPS_READ_1_1_8; in spi_nor_info_init_params()
2771 spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ_1_1_8], in spi_nor_info_init_params()
2777 params->hwcaps.mask |= SNOR_HWCAPS_PP; in spi_nor_info_init_params()
2778 spi_nor_set_pp_settings(¶ms->page_programs[SNOR_CMD_PP], in spi_nor_info_init_params()
2787 if (info->flags & SECT_4K_PMC) { in spi_nor_info_init_params()
2789 spi_nor_set_erase_type(&map->erase_type[i], 4096u, in spi_nor_info_init_params()
2792 } else if (info->flags & SECT_4K) { in spi_nor_info_init_params()
2794 spi_nor_set_erase_type(&map->erase_type[i], 4096u, in spi_nor_info_init_params()
2799 spi_nor_set_erase_type(&map->erase_type[i], info->sector_size, in spi_nor_info_init_params()
2801 spi_nor_init_uniform_erase_map(map, erase_mask, params->size); in spi_nor_info_init_params()
2805 * spi_nor_post_sfdp_fixups() - Updates the flash's parameters and settings
2806 * after SFDP has been parsed (is also called for SPI NORs that do not
2816 if (nor->manufacturer && nor->manufacturer->fixups && in spi_nor_post_sfdp_fixups()
2817 nor->manufacturer->fixups->post_sfdp) in spi_nor_post_sfdp_fixups()
2818 nor->manufacturer->fixups->post_sfdp(nor); in spi_nor_post_sfdp_fixups()
2820 if (nor->info->fixups && nor->info->fixups->post_sfdp) in spi_nor_post_sfdp_fixups()
2821 nor->info->fixups->post_sfdp(nor); in spi_nor_post_sfdp_fixups()
2825 * spi_nor_late_init_params() - Late initialization of default flash parameters.
2828 * Used to set default flash parameters and settings when the ->default_init()
2837 if (nor->flags & SNOR_F_HAS_LOCK && !nor->params->locking_ops) in spi_nor_late_init_params()
2838 nor->params->locking_ops = &spi_nor_sr_locking_ops; in spi_nor_late_init_params()
2842 * spi_nor_init_params() - Initialize the flash's parameters and settings.
2845 * The flash parameters and settings are initialized based on a sequence of
2848 * 1/ Default flash parameters initialization. The initializations are done
2849 * based on nor->info data:
2853 * 2/ Manufacturer flash parameters initialization. The initializations are
2855 * based on MFR, by using specific flash_info tweeks, ->default_init():
2859 * 3/ SFDP flash parameters initialization. JESD216 SFDP is a standard and
2863 * Please note that there is a ->post_bfpt() fixup hook that can overwrite
2864 * the flash parameters and settings immediately after parsing the Basic
2865 * Flash Parameter Table.
2868 * 4/ Post SFDP flash parameters initialization. Used to tweak various
2874 * 5/ Late default flash parameters initialization, used when the
2875 * ->default_init() hook or the SFDP parser do not set specific params.
2880 nor->params = devm_kzalloc(nor->dev, sizeof(*nor->params), GFP_KERNEL); in spi_nor_init_params()
2881 if (!nor->params) in spi_nor_init_params()
2882 return -ENOMEM; in spi_nor_init_params()
2888 if ((nor->info->flags & (SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)) && in spi_nor_init_params()
2889 !(nor->info->flags & SPI_NOR_SKIP_SFDP)) in spi_nor_init_params()
2900 * spi_nor_quad_enable() - enable Quad I/O if needed.
2903 * Return: 0 on success, -errno otherwise.
2907 if (!nor->params->quad_enable) in spi_nor_quad_enable()
2910 if (!(spi_nor_get_protocol_width(nor->read_proto) == 4 || in spi_nor_quad_enable()
2911 spi_nor_get_protocol_width(nor->write_proto) == 4)) in spi_nor_quad_enable()
2914 return nor->params->quad_enable(nor); in spi_nor_quad_enable()
2918 * spi_nor_unlock_all() - Unlocks the entire flash memory array.
2921 * Some SPI NOR flashes are write protected by default after a power-on reset
2922 * cycle, in order to avoid inadvertent writes during power-up. Backward
2923 * compatibility imposes to unlock the entire flash memory array at power-up
2928 if (nor->flags & SNOR_F_HAS_LOCK) in spi_nor_unlock_all()
2929 return spi_nor_unlock(&nor->mtd, 0, nor->params->size); in spi_nor_unlock_all()
2940 dev_dbg(nor->dev, "quad mode not supported\n"); in spi_nor_init()
2946 dev_dbg(nor->dev, "Failed to unlock the entire flash memory array\n"); in spi_nor_init()
2950 if (nor->addr_width == 4 && !(nor->flags & SNOR_F_4B_OPCODES)) { in spi_nor_init()
2958 WARN_ONCE(nor->flags & SNOR_F_BROKEN_RESET, in spi_nor_init()
2960 nor->params->set_4byte_addr_mode(nor, true); in spi_nor_init()
2970 struct device *dev = nor->dev; in spi_nor_resume()
2973 /* re-initialize the nor chip */ in spi_nor_resume()
2982 if (nor->addr_width == 4 && !(nor->flags & SNOR_F_4B_OPCODES) && in spi_nor_restore()
2983 nor->flags & SNOR_F_BROKEN_RESET) in spi_nor_restore()
2984 nor->params->set_4byte_addr_mode(nor, false); in spi_nor_restore()
2994 for (j = 0; j < manufacturers[i]->nparts; j++) { in spi_nor_match_id()
2995 if (!strcmp(name, manufacturers[i]->parts[j].name)) { in spi_nor_match_id()
2996 nor->manufacturer = manufacturers[i]; in spi_nor_match_id()
2997 return &manufacturers[i]->parts[j]; in spi_nor_match_id()
3007 if (nor->addr_width) { in spi_nor_set_addr_width()
3009 } else if (nor->info->addr_width) { in spi_nor_set_addr_width()
3010 nor->addr_width = nor->info->addr_width; in spi_nor_set_addr_width()
3012 nor->addr_width = 3; in spi_nor_set_addr_width()
3015 if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) { in spi_nor_set_addr_width()
3016 /* enable 4-byte addressing if the device exceeds 16MiB */ in spi_nor_set_addr_width()
3017 nor->addr_width = 4; in spi_nor_set_addr_width()
3020 if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) { in spi_nor_set_addr_width()
3021 dev_dbg(nor->dev, "address width is too large: %u\n", in spi_nor_set_addr_width()
3022 nor->addr_width); in spi_nor_set_addr_width()
3023 return -EINVAL; in spi_nor_set_addr_width()
3027 if (nor->addr_width == 4 && nor->flags & SNOR_F_4B_OPCODES && in spi_nor_set_addr_width()
3028 !(nor->flags & SNOR_F_HAS_4BAIT)) in spi_nor_set_addr_width()
3037 struct mtd_info *mtd = &nor->mtd; in spi_nor_debugfs_init()
3039 mtd->dbg.partname = info->name; in spi_nor_debugfs_init()
3040 mtd->dbg.partid = devm_kasprintf(nor->dev, GFP_KERNEL, "spi-nor:%*phN", in spi_nor_debugfs_init()
3041 info->id_len, info->id); in spi_nor_debugfs_init()
3051 /* Try to auto-detect if chip name wasn't specified or not found */ in spi_nor_get_flash_info()
3055 return ERR_PTR(-ENOENT); in spi_nor_get_flash_info()
3058 * If caller has specified name of flash model that can normally be in spi_nor_get_flash_info()
3061 if (name && info->id_len) { in spi_nor_get_flash_info()
3072 * marked read-only, and we don't want to lose that in spi_nor_get_flash_info()
3075 dev_warn(nor->dev, "found %s, expected %s\n", in spi_nor_get_flash_info()
3076 jinfo->name, info->name); in spi_nor_get_flash_info()
3088 struct device *dev = nor->dev; in spi_nor_scan()
3089 struct mtd_info *mtd = &nor->mtd; in spi_nor_scan()
3098 /* Reset SPI protocol for all commands. */ in spi_nor_scan()
3099 nor->reg_proto = SNOR_PROTO_1_1_1; in spi_nor_scan()
3100 nor->read_proto = SNOR_PROTO_1_1_1; in spi_nor_scan()
3101 nor->write_proto = SNOR_PROTO_1_1_1; in spi_nor_scan()
3105 * through the spi-mem layer (buffers have to be DMA-able). in spi_nor_scan()
3106 * For spi-mem drivers, we'll reallocate a new buffer if in spi_nor_scan()
3107 * nor->page_size turns out to be greater than PAGE_SIZE (which in spi_nor_scan()
3111 nor->bouncebuf_size = PAGE_SIZE; in spi_nor_scan()
3112 nor->bouncebuf = devm_kmalloc(dev, nor->bouncebuf_size, in spi_nor_scan()
3114 if (!nor->bouncebuf) in spi_nor_scan()
3115 return -ENOMEM; in spi_nor_scan()
3121 nor->info = info; in spi_nor_scan()
3125 mutex_init(&nor->lock); in spi_nor_scan()
3130 * with Atmel SPI NOR. in spi_nor_scan()
3132 if (info->flags & SPI_NOR_XSR_RDY) in spi_nor_scan()
3133 nor->flags |= SNOR_F_READY_XSR_RDY; in spi_nor_scan()
3135 if (info->flags & SPI_NOR_HAS_LOCK) in spi_nor_scan()
3136 nor->flags |= SNOR_F_HAS_LOCK; in spi_nor_scan()
3138 mtd->_write = spi_nor_write; in spi_nor_scan()
3140 /* Init flash parameters based on flash_info struct and SFDP */ in spi_nor_scan()
3145 if (!mtd->name) in spi_nor_scan()
3146 mtd->name = dev_name(dev); in spi_nor_scan()
3147 mtd->priv = nor; in spi_nor_scan()
3148 mtd->type = MTD_NORFLASH; in spi_nor_scan()
3149 mtd->writesize = 1; in spi_nor_scan()
3150 mtd->flags = MTD_CAP_NORFLASH; in spi_nor_scan()
3151 mtd->size = nor->params->size; in spi_nor_scan()
3152 mtd->_erase = spi_nor_erase; in spi_nor_scan()
3153 mtd->_read = spi_nor_read; in spi_nor_scan()
3154 mtd->_resume = spi_nor_resume; in spi_nor_scan()
3156 if (nor->params->locking_ops) { in spi_nor_scan()
3157 mtd->_lock = spi_nor_lock; in spi_nor_scan()
3158 mtd->_unlock = spi_nor_unlock; in spi_nor_scan()
3159 mtd->_is_locked = spi_nor_is_locked; in spi_nor_scan()
3162 if (info->flags & USE_FSR) in spi_nor_scan()
3163 nor->flags |= SNOR_F_USE_FSR; in spi_nor_scan()
3164 if (info->flags & SPI_NOR_HAS_TB) { in spi_nor_scan()
3165 nor->flags |= SNOR_F_HAS_SR_TB; in spi_nor_scan()
3166 if (info->flags & SPI_NOR_TB_SR_BIT6) in spi_nor_scan()
3167 nor->flags |= SNOR_F_HAS_SR_TB_BIT6; in spi_nor_scan()
3170 if (info->flags & NO_CHIP_ERASE) in spi_nor_scan()
3171 nor->flags |= SNOR_F_NO_OP_CHIP_ERASE; in spi_nor_scan()
3172 if (info->flags & USE_CLSR) in spi_nor_scan()
3173 nor->flags |= SNOR_F_USE_CLSR; in spi_nor_scan()
3175 if (info->flags & SPI_NOR_4BIT_BP) { in spi_nor_scan()
3176 nor->flags |= SNOR_F_HAS_4BIT_BP; in spi_nor_scan()
3177 if (info->flags & SPI_NOR_BP3_SR_BIT6) in spi_nor_scan()
3178 nor->flags |= SNOR_F_HAS_SR_BP3_BIT6; in spi_nor_scan()
3181 if (info->flags & SPI_NOR_NO_ERASE) in spi_nor_scan()
3182 mtd->flags |= MTD_NO_ERASE; in spi_nor_scan()
3184 mtd->dev.parent = dev; in spi_nor_scan()
3185 nor->page_size = nor->params->page_size; in spi_nor_scan()
3186 mtd->writebufsize = nor->page_size; in spi_nor_scan()
3188 if (of_property_read_bool(np, "broken-flash-reset")) in spi_nor_scan()
3189 nor->flags |= SNOR_F_BROKEN_RESET; in spi_nor_scan()
3192 * Configure the SPI memory: in spi_nor_scan()
3193 * - select op codes for (Fast) Read, Page Program and Sector Erase. in spi_nor_scan()
3194 * - set the number of dummy cycles (mode cycles + wait states). in spi_nor_scan()
3195 * - set the SPI protocols for register and memory accesses. in spi_nor_scan()
3201 if (info->flags & SPI_NOR_4B_OPCODES) in spi_nor_scan()
3202 nor->flags |= SNOR_F_4B_OPCODES; in spi_nor_scan()
3208 /* Send all the required SPI flash commands to initialize device */ in spi_nor_scan()
3213 dev_info(dev, "%s (%lld Kbytes)\n", info->name, in spi_nor_scan()
3214 (long long)mtd->size >> 10); in spi_nor_scan()
3219 mtd->name, (long long)mtd->size, (long long)(mtd->size >> 20), in spi_nor_scan()
3220 mtd->erasesize, mtd->erasesize / 1024, mtd->numeraseregions); in spi_nor_scan()
3222 if (mtd->numeraseregions) in spi_nor_scan()
3223 for (i = 0; i < mtd->numeraseregions; i++) in spi_nor_scan()
3228 i, (long long)mtd->eraseregions[i].offset, in spi_nor_scan()
3229 mtd->eraseregions[i].erasesize, in spi_nor_scan()
3230 mtd->eraseregions[i].erasesize / 1024, in spi_nor_scan()
3231 mtd->eraseregions[i].numblocks); in spi_nor_scan()
3239 .op_tmpl = SPI_MEM_OP(SPI_MEM_OP_CMD(nor->read_opcode, 1), in spi_nor_create_read_dirmap()
3240 SPI_MEM_OP_ADDR(nor->addr_width, 0, 1), in spi_nor_create_read_dirmap()
3241 SPI_MEM_OP_DUMMY(nor->read_dummy, 1), in spi_nor_create_read_dirmap()
3244 .length = nor->mtd.size, in spi_nor_create_read_dirmap()
3249 op->cmd.buswidth = spi_nor_get_protocol_inst_nbits(nor->read_proto); in spi_nor_create_read_dirmap()
3250 op->addr.buswidth = spi_nor_get_protocol_addr_nbits(nor->read_proto); in spi_nor_create_read_dirmap()
3251 op->dummy.buswidth = op->addr.buswidth; in spi_nor_create_read_dirmap()
3252 op->data.buswidth = spi_nor_get_protocol_data_nbits(nor->read_proto); in spi_nor_create_read_dirmap()
3255 op->dummy.nbytes = (nor->read_dummy * op->dummy.buswidth) / 8; in spi_nor_create_read_dirmap()
3257 nor->dirmap.rdesc = devm_spi_mem_dirmap_create(nor->dev, nor->spimem, in spi_nor_create_read_dirmap()
3259 return PTR_ERR_OR_ZERO(nor->dirmap.rdesc); in spi_nor_create_read_dirmap()
3265 .op_tmpl = SPI_MEM_OP(SPI_MEM_OP_CMD(nor->program_opcode, 1), in spi_nor_create_write_dirmap()
3266 SPI_MEM_OP_ADDR(nor->addr_width, 0, 1), in spi_nor_create_write_dirmap()
3270 .length = nor->mtd.size, in spi_nor_create_write_dirmap()
3275 op->cmd.buswidth = spi_nor_get_protocol_inst_nbits(nor->write_proto); in spi_nor_create_write_dirmap()
3276 op->addr.buswidth = spi_nor_get_protocol_addr_nbits(nor->write_proto); in spi_nor_create_write_dirmap()
3277 op->dummy.buswidth = op->addr.buswidth; in spi_nor_create_write_dirmap()
3278 op->data.buswidth = spi_nor_get_protocol_data_nbits(nor->write_proto); in spi_nor_create_write_dirmap()
3280 if (nor->program_opcode == SPINOR_OP_AAI_WP && nor->sst_write_second) in spi_nor_create_write_dirmap()
3281 op->addr.nbytes = 0; in spi_nor_create_write_dirmap()
3283 nor->dirmap.wdesc = devm_spi_mem_dirmap_create(nor->dev, nor->spimem, in spi_nor_create_write_dirmap()
3285 return PTR_ERR_OR_ZERO(nor->dirmap.wdesc); in spi_nor_create_write_dirmap()
3290 struct spi_device *spi = spimem->spi; in spi_nor_probe() local
3291 struct flash_platform_data *data = dev_get_platdata(&spi->dev); in spi_nor_probe()
3301 nor = devm_kzalloc(&spi->dev, sizeof(*nor), GFP_KERNEL); in spi_nor_probe()
3303 return -ENOMEM; in spi_nor_probe()
3305 nor->spimem = spimem; in spi_nor_probe()
3306 nor->dev = &spi->dev; in spi_nor_probe()
3307 spi_nor_set_flash_node(nor, spi->dev.of_node); in spi_nor_probe()
3311 if (data && data->name) in spi_nor_probe()
3312 nor->mtd.name = data->name; in spi_nor_probe()
3314 if (!nor->mtd.name) in spi_nor_probe()
3315 nor->mtd.name = spi_mem_get_name(spimem); in spi_nor_probe()
3323 if (data && data->type) in spi_nor_probe()
3324 flash_name = data->type; in spi_nor_probe()
3325 else if (!strcmp(spi->modalias, "spi-nor")) in spi_nor_probe()
3326 flash_name = NULL; /* auto-detect */ in spi_nor_probe()
3328 flash_name = spi->modalias; in spi_nor_probe()
3339 if (nor->page_size > PAGE_SIZE) { in spi_nor_probe()
3340 nor->bouncebuf_size = nor->page_size; in spi_nor_probe()
3341 devm_kfree(nor->dev, nor->bouncebuf); in spi_nor_probe()
3342 nor->bouncebuf = devm_kmalloc(nor->dev, in spi_nor_probe()
3343 nor->bouncebuf_size, in spi_nor_probe()
3345 if (!nor->bouncebuf) in spi_nor_probe()
3346 return -ENOMEM; in spi_nor_probe()
3357 return mtd_device_register(&nor->mtd, data ? data->parts : NULL, in spi_nor_probe()
3358 data ? data->nr_parts : 0); in spi_nor_probe()
3368 return mtd_device_unregister(&nor->mtd); in spi_nor_remove()
3381 * Historically, many flash devices are bound to this driver by their name. But
3382 * since most of these flash are compatible to some extent, and their
3383 * differences can often be differentiated by the JEDEC read-ID command, we
3384 * encourage new users to add support to the spi-nor library, and simply bind
3385 * against a generic string here (e.g., "jedec,spi-nor").
3387 * Many flash names are kept here in this list (as well as in spi-nor.c) to
3392 * Allow non-DT platform devices to bind to the "spi-nor" modalias, and
3393 * hack around the fact that the SPI core does not provide uevent
3396 {"spi-nor"},
3400 * them with "spi-nor" in platform data.
3405 * Entries that were used in DTs without "jedec,spi-nor" fallback and
3421 {"m25p05-nonjedec"}, {"m25p10-nonjedec"}, {"m25p20-nonjedec"},
3422 {"m25p40-nonjedec"}, {"m25p80-nonjedec"}, {"m25p16-nonjedec"},
3423 {"m25p32-nonjedec"}, {"m25p64-nonjedec"}, {"m25p128-nonjedec"},
3425 /* Everspin MRAMs (non-JEDEC) */
3433 MODULE_DEVICE_TABLE(spi, spi_nor_dev_ids);
3437 * Generic compatibility for SPI NOR that can be identified by the
3440 { .compatible = "jedec,spi-nor" },
3446 * REVISIT: many of these chips have deep power-down modes, which
3453 .name = "spi-nor",
3467 MODULE_DESCRIPTION("framework for SPI NOR");