Lines Matching full:host
29 #include <linux/mmc/host.h>
408 void __iomem *base; /* host base address */
409 void __iomem *top_base; /* host top register base address */
421 int irq; /* host interrupt */
608 static void msdc_reset_hw(struct msdc_host *host) in msdc_reset_hw() argument
612 sdr_set_bits(host->base + MSDC_CFG, MSDC_CFG_RST); in msdc_reset_hw()
613 while (readl(host->base + MSDC_CFG) & MSDC_CFG_RST) in msdc_reset_hw()
616 sdr_set_bits(host->base + MSDC_FIFOCS, MSDC_FIFOCS_CLR); in msdc_reset_hw()
617 while (readl(host->base + MSDC_FIFOCS) & MSDC_FIFOCS_CLR) in msdc_reset_hw()
620 val = readl(host->base + MSDC_INT); in msdc_reset_hw()
621 writel(val, host->base + MSDC_INT); in msdc_reset_hw()
624 static void msdc_cmd_next(struct msdc_host *host,
626 static void __msdc_enable_sdio_irq(struct msdc_host *host, int enb);
644 static inline void msdc_dma_setup(struct msdc_host *host, struct msdc_dma *dma, in msdc_dma_setup() argument
675 if (host->dev_comp->support_64g) { in msdc_dma_setup()
681 if (host->dev_comp->support_64g) { in msdc_dma_setup()
699 sdr_set_field(host->base + MSDC_DMA_CFG, MSDC_DMA_CFG_DECSEN, 1); in msdc_dma_setup()
700 dma_ctrl = readl_relaxed(host->base + MSDC_DMA_CTRL); in msdc_dma_setup()
703 writel_relaxed(dma_ctrl, host->base + MSDC_DMA_CTRL); in msdc_dma_setup()
704 if (host->dev_comp->support_64g) in msdc_dma_setup()
705 sdr_set_field(host->base + DMA_SA_H4BIT, DMA_ADDR_HIGH_4BIT, in msdc_dma_setup()
707 writel(lower_32_bits(dma->gpd_addr), host->base + MSDC_DMA_SA); in msdc_dma_setup()
710 static void msdc_prepare_data(struct msdc_host *host, struct mmc_request *mrq) in msdc_prepare_data() argument
716 data->sg_count = dma_map_sg(host->dev, data->sg, data->sg_len, in msdc_prepare_data()
721 static void msdc_unprepare_data(struct msdc_host *host, struct mmc_request *mrq) in msdc_unprepare_data() argument
729 dma_unmap_sg(host->dev, data->sg, data->sg_len, in msdc_unprepare_data()
735 static u64 msdc_timeout_cal(struct msdc_host *host, u64 ns, u64 clks) in msdc_timeout_cal() argument
737 struct mmc_host *mmc = mmc_from_priv(host); in msdc_timeout_cal()
751 if (host->dev_comp->clk_div_bits == 8) in msdc_timeout_cal()
752 sdr_get_field(host->base + MSDC_CFG, in msdc_timeout_cal()
755 sdr_get_field(host->base + MSDC_CFG, in msdc_timeout_cal()
765 static void msdc_set_timeout(struct msdc_host *host, u64 ns, u64 clks) in msdc_set_timeout() argument
769 host->timeout_ns = ns; in msdc_set_timeout()
770 host->timeout_clks = clks; in msdc_set_timeout()
772 timeout = msdc_timeout_cal(host, ns, clks); in msdc_set_timeout()
773 sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC, in msdc_set_timeout()
777 static void msdc_set_busy_timeout(struct msdc_host *host, u64 ns, u64 clks) in msdc_set_busy_timeout() argument
781 timeout = msdc_timeout_cal(host, ns, clks); in msdc_set_busy_timeout()
782 sdr_set_field(host->base + SDC_CFG, SDC_CFG_WRDTOC, in msdc_set_busy_timeout()
786 static void msdc_gate_clock(struct msdc_host *host) in msdc_gate_clock() argument
788 clk_disable_unprepare(host->src_clk_cg); in msdc_gate_clock()
789 clk_disable_unprepare(host->src_clk); in msdc_gate_clock()
790 clk_disable_unprepare(host->bus_clk); in msdc_gate_clock()
791 clk_disable_unprepare(host->h_clk); in msdc_gate_clock()
794 static void msdc_ungate_clock(struct msdc_host *host) in msdc_ungate_clock() argument
796 clk_prepare_enable(host->h_clk); in msdc_ungate_clock()
797 clk_prepare_enable(host->bus_clk); in msdc_ungate_clock()
798 clk_prepare_enable(host->src_clk); in msdc_ungate_clock()
799 clk_prepare_enable(host->src_clk_cg); in msdc_ungate_clock()
800 while (!(readl(host->base + MSDC_CFG) & MSDC_CFG_CKSTB)) in msdc_ungate_clock()
804 static void msdc_set_mclk(struct msdc_host *host, unsigned char timing, u32 hz) in msdc_set_mclk() argument
806 struct mmc_host *mmc = mmc_from_priv(host); in msdc_set_mclk()
811 u32 tune_reg = host->dev_comp->pad_tune_reg; in msdc_set_mclk()
814 dev_dbg(host->dev, "set mclk to 0\n"); in msdc_set_mclk()
815 host->mclk = 0; in msdc_set_mclk()
817 sdr_clr_bits(host->base + MSDC_CFG, MSDC_CFG_CKPDN); in msdc_set_mclk()
821 flags = readl(host->base + MSDC_INTEN); in msdc_set_mclk()
822 sdr_clr_bits(host->base + MSDC_INTEN, flags); in msdc_set_mclk()
823 if (host->dev_comp->clk_div_bits == 8) in msdc_set_mclk()
824 sdr_clr_bits(host->base + MSDC_CFG, MSDC_CFG_HS400_CK_MODE); in msdc_set_mclk()
826 sdr_clr_bits(host->base + MSDC_CFG, in msdc_set_mclk()
836 if (hz >= (host->src_clk_freq >> 2)) { in msdc_set_mclk()
838 sclk = host->src_clk_freq >> 2; /* sclk = clk / 4 */ in msdc_set_mclk()
840 div = (host->src_clk_freq + ((hz << 2) - 1)) / (hz << 2); in msdc_set_mclk()
841 sclk = (host->src_clk_freq >> 2) / div; in msdc_set_mclk()
846 hz >= (host->src_clk_freq >> 1)) { in msdc_set_mclk()
847 if (host->dev_comp->clk_div_bits == 8) in msdc_set_mclk()
848 sdr_set_bits(host->base + MSDC_CFG, in msdc_set_mclk()
851 sdr_set_bits(host->base + MSDC_CFG, in msdc_set_mclk()
853 sclk = host->src_clk_freq >> 1; in msdc_set_mclk()
856 } else if (hz >= host->src_clk_freq) { in msdc_set_mclk()
859 sclk = host->src_clk_freq; in msdc_set_mclk()
862 if (hz >= (host->src_clk_freq >> 1)) { in msdc_set_mclk()
864 sclk = host->src_clk_freq >> 1; /* sclk = clk / 2 */ in msdc_set_mclk()
866 div = (host->src_clk_freq + ((hz << 2) - 1)) / (hz << 2); in msdc_set_mclk()
867 sclk = (host->src_clk_freq >> 2) / div; in msdc_set_mclk()
870 sdr_clr_bits(host->base + MSDC_CFG, MSDC_CFG_CKPDN); in msdc_set_mclk()
875 if (host->src_clk_cg) in msdc_set_mclk()
876 clk_disable_unprepare(host->src_clk_cg); in msdc_set_mclk()
878 clk_disable_unprepare(clk_get_parent(host->src_clk)); in msdc_set_mclk()
879 if (host->dev_comp->clk_div_bits == 8) in msdc_set_mclk()
880 sdr_set_field(host->base + MSDC_CFG, in msdc_set_mclk()
884 sdr_set_field(host->base + MSDC_CFG, in msdc_set_mclk()
887 if (host->src_clk_cg) in msdc_set_mclk()
888 clk_prepare_enable(host->src_clk_cg); in msdc_set_mclk()
890 clk_prepare_enable(clk_get_parent(host->src_clk)); in msdc_set_mclk()
892 while (!(readl(host->base + MSDC_CFG) & MSDC_CFG_CKSTB)) in msdc_set_mclk()
894 sdr_set_bits(host->base + MSDC_CFG, MSDC_CFG_CKPDN); in msdc_set_mclk()
896 host->mclk = hz; in msdc_set_mclk()
897 host->timing = timing; in msdc_set_mclk()
899 msdc_set_timeout(host, host->timeout_ns, host->timeout_clks); in msdc_set_mclk()
900 sdr_set_bits(host->base + MSDC_INTEN, flags); in msdc_set_mclk()
907 writel(host->def_tune_para.iocon, host->base + MSDC_IOCON); in msdc_set_mclk()
908 if (host->top_base) { in msdc_set_mclk()
909 writel(host->def_tune_para.emmc_top_control, in msdc_set_mclk()
910 host->top_base + EMMC_TOP_CONTROL); in msdc_set_mclk()
911 writel(host->def_tune_para.emmc_top_cmd, in msdc_set_mclk()
912 host->top_base + EMMC_TOP_CMD); in msdc_set_mclk()
914 writel(host->def_tune_para.pad_tune, in msdc_set_mclk()
915 host->base + tune_reg); in msdc_set_mclk()
918 writel(host->saved_tune_para.iocon, host->base + MSDC_IOCON); in msdc_set_mclk()
919 writel(host->saved_tune_para.pad_cmd_tune, in msdc_set_mclk()
920 host->base + PAD_CMD_TUNE); in msdc_set_mclk()
921 if (host->top_base) { in msdc_set_mclk()
922 writel(host->saved_tune_para.emmc_top_control, in msdc_set_mclk()
923 host->top_base + EMMC_TOP_CONTROL); in msdc_set_mclk()
924 writel(host->saved_tune_para.emmc_top_cmd, in msdc_set_mclk()
925 host->top_base + EMMC_TOP_CMD); in msdc_set_mclk()
927 writel(host->saved_tune_para.pad_tune, in msdc_set_mclk()
928 host->base + tune_reg); in msdc_set_mclk()
933 host->dev_comp->hs400_tune) in msdc_set_mclk()
934 sdr_set_field(host->base + tune_reg, in msdc_set_mclk()
936 host->hs400_cmd_int_delay); in msdc_set_mclk()
937 dev_dbg(host->dev, "sclk: %d, timing: %d\n", mmc->actual_clock, in msdc_set_mclk()
941 static inline u32 msdc_cmd_find_resp(struct msdc_host *host, in msdc_cmd_find_resp() argument
969 static inline u32 msdc_cmd_prepare_raw_cmd(struct msdc_host *host, in msdc_cmd_prepare_raw_cmd() argument
972 struct mmc_host *mmc = mmc_from_priv(host); in msdc_cmd_prepare_raw_cmd()
978 u32 resp = msdc_cmd_find_resp(host, mrq, cmd); in msdc_cmd_prepare_raw_cmd()
981 host->cmd_rsp = resp; in msdc_cmd_prepare_raw_cmd()
1012 sdr_clr_bits(host->base + MSDC_CFG, MSDC_CFG_PIO); in msdc_cmd_prepare_raw_cmd()
1014 if (host->timeout_ns != data->timeout_ns || in msdc_cmd_prepare_raw_cmd()
1015 host->timeout_clks != data->timeout_clks) in msdc_cmd_prepare_raw_cmd()
1016 msdc_set_timeout(host, data->timeout_ns, in msdc_cmd_prepare_raw_cmd()
1019 writel(data->blocks, host->base + SDC_BLK_NUM); in msdc_cmd_prepare_raw_cmd()
1024 static void msdc_start_data(struct msdc_host *host, struct mmc_request *mrq, in msdc_start_data() argument
1029 WARN_ON(host->data); in msdc_start_data()
1030 host->data = data; in msdc_start_data()
1033 mod_delayed_work(system_wq, &host->req_timeout, DAT_TIMEOUT); in msdc_start_data()
1034 msdc_dma_setup(host, &host->dma, data); in msdc_start_data()
1035 sdr_set_bits(host->base + MSDC_INTEN, data_ints_mask); in msdc_start_data()
1036 sdr_set_field(host->base + MSDC_DMA_CTRL, MSDC_DMA_CTRL_START, 1); in msdc_start_data()
1037 dev_dbg(host->dev, "DMA start\n"); in msdc_start_data()
1038 dev_dbg(host->dev, "%s: cmd=%d DMA data: %d blocks; read=%d\n", in msdc_start_data()
1042 static int msdc_auto_cmd_done(struct msdc_host *host, int events, in msdc_auto_cmd_done() argument
1047 rsp[0] = readl(host->base + SDC_ACMD_RESP); in msdc_auto_cmd_done()
1052 msdc_reset_hw(host); in msdc_auto_cmd_done()
1055 host->error |= REQ_STOP_EIO; in msdc_auto_cmd_done()
1058 host->error |= REQ_STOP_TMO; in msdc_auto_cmd_done()
1060 dev_err(host->dev, in msdc_auto_cmd_done()
1070 * Host controller may lost interrupt in some special case.
1074 static void msdc_recheck_sdio_irq(struct msdc_host *host) in msdc_recheck_sdio_irq() argument
1076 struct mmc_host *mmc = mmc_from_priv(host); in msdc_recheck_sdio_irq()
1080 reg_inten = readl(host->base + MSDC_INTEN); in msdc_recheck_sdio_irq()
1082 reg_int = readl(host->base + MSDC_INT); in msdc_recheck_sdio_irq()
1083 reg_ps = readl(host->base + MSDC_PS); in msdc_recheck_sdio_irq()
1086 __msdc_enable_sdio_irq(host, 0); in msdc_recheck_sdio_irq()
1093 static void msdc_track_cmd_data(struct msdc_host *host, in msdc_track_cmd_data() argument
1096 if (host->error) in msdc_track_cmd_data()
1097 dev_dbg(host->dev, "%s: cmd=%d arg=%08X; host->error=0x%08X\n", in msdc_track_cmd_data()
1098 __func__, cmd->opcode, cmd->arg, host->error); in msdc_track_cmd_data()
1101 static void msdc_request_done(struct msdc_host *host, struct mmc_request *mrq) in msdc_request_done() argument
1106 ret = cancel_delayed_work(&host->req_timeout); in msdc_request_done()
1111 spin_lock_irqsave(&host->lock, flags); in msdc_request_done()
1112 host->mrq = NULL; in msdc_request_done()
1113 spin_unlock_irqrestore(&host->lock, flags); in msdc_request_done()
1115 msdc_track_cmd_data(host, mrq->cmd, mrq->data); in msdc_request_done()
1117 msdc_unprepare_data(host, mrq); in msdc_request_done()
1118 if (host->error) in msdc_request_done()
1119 msdc_reset_hw(host); in msdc_request_done()
1120 mmc_request_done(mmc_from_priv(host), mrq); in msdc_request_done()
1121 if (host->dev_comp->recheck_sdio_irq) in msdc_request_done()
1122 msdc_recheck_sdio_irq(host); in msdc_request_done()
1126 static bool msdc_cmd_done(struct msdc_host *host, int events, in msdc_cmd_done() argument
1137 msdc_auto_cmd_done(host, events, mrq->sbc); in msdc_cmd_done()
1146 spin_lock_irqsave(&host->lock, flags); in msdc_cmd_done()
1147 done = !host->cmd; in msdc_cmd_done()
1148 host->cmd = NULL; in msdc_cmd_done()
1149 spin_unlock_irqrestore(&host->lock, flags); in msdc_cmd_done()
1154 sdr_clr_bits(host->base + MSDC_INTEN, cmd_ints_mask); in msdc_cmd_done()
1158 rsp[0] = readl(host->base + SDC_RESP3); in msdc_cmd_done()
1159 rsp[1] = readl(host->base + SDC_RESP2); in msdc_cmd_done()
1160 rsp[2] = readl(host->base + SDC_RESP1); in msdc_cmd_done()
1161 rsp[3] = readl(host->base + SDC_RESP0); in msdc_cmd_done()
1163 rsp[0] = readl(host->base + SDC_RESP0); in msdc_cmd_done()
1176 msdc_reset_hw(host); in msdc_cmd_done()
1179 host->error |= REQ_CMD_EIO; in msdc_cmd_done()
1182 host->error |= REQ_CMD_TMO; in msdc_cmd_done()
1186 dev_dbg(host->dev, in msdc_cmd_done()
1191 msdc_cmd_next(host, mrq, cmd); in msdc_cmd_done()
1196 * is correct before issue a request. but host design do below
1199 static inline bool msdc_cmd_is_ready(struct msdc_host *host, in msdc_cmd_is_ready() argument
1205 while ((readl(host->base + SDC_STS) & SDC_STS_CMDBUSY) && in msdc_cmd_is_ready()
1208 if (readl(host->base + SDC_STS) & SDC_STS_CMDBUSY) { in msdc_cmd_is_ready()
1209 dev_err(host->dev, "CMD bus busy detected\n"); in msdc_cmd_is_ready()
1210 host->error |= REQ_CMD_BUSY; in msdc_cmd_is_ready()
1211 msdc_cmd_done(host, MSDC_INT_CMDTMO, mrq, cmd); in msdc_cmd_is_ready()
1218 while ((readl(host->base + SDC_STS) & SDC_STS_SDCBUSY) && in msdc_cmd_is_ready()
1221 if (readl(host->base + SDC_STS) & SDC_STS_SDCBUSY) { in msdc_cmd_is_ready()
1222 dev_err(host->dev, "Controller busy detected\n"); in msdc_cmd_is_ready()
1223 host->error |= REQ_CMD_BUSY; in msdc_cmd_is_ready()
1224 msdc_cmd_done(host, MSDC_INT_CMDTMO, mrq, cmd); in msdc_cmd_is_ready()
1231 static void msdc_start_command(struct msdc_host *host, in msdc_start_command() argument
1237 WARN_ON(host->cmd); in msdc_start_command()
1238 host->cmd = cmd; in msdc_start_command()
1240 mod_delayed_work(system_wq, &host->req_timeout, DAT_TIMEOUT); in msdc_start_command()
1241 if (!msdc_cmd_is_ready(host, mrq, cmd)) in msdc_start_command()
1244 if ((readl(host->base + MSDC_FIFOCS) & MSDC_FIFOCS_TXCNT) >> 16 || in msdc_start_command()
1245 readl(host->base + MSDC_FIFOCS) & MSDC_FIFOCS_RXCNT) { in msdc_start_command()
1246 dev_err(host->dev, "TX/RX FIFO non-empty before start of IO. Reset\n"); in msdc_start_command()
1247 msdc_reset_hw(host); in msdc_start_command()
1251 rawcmd = msdc_cmd_prepare_raw_cmd(host, mrq, cmd); in msdc_start_command()
1253 spin_lock_irqsave(&host->lock, flags); in msdc_start_command()
1254 sdr_set_bits(host->base + MSDC_INTEN, cmd_ints_mask); in msdc_start_command()
1255 spin_unlock_irqrestore(&host->lock, flags); in msdc_start_command()
1257 writel(cmd->arg, host->base + SDC_ARG); in msdc_start_command()
1258 writel(rawcmd, host->base + SDC_CMD); in msdc_start_command()
1261 static void msdc_cmd_next(struct msdc_host *host, in msdc_cmd_next() argument
1269 msdc_request_done(host, mrq); in msdc_cmd_next()
1271 msdc_start_command(host, mrq, mrq->cmd); in msdc_cmd_next()
1273 msdc_request_done(host, mrq); in msdc_cmd_next()
1275 msdc_start_data(host, mrq, cmd, cmd->data); in msdc_cmd_next()
1280 struct msdc_host *host = mmc_priv(mmc); in msdc_ops_request() local
1282 host->error = 0; in msdc_ops_request()
1283 WARN_ON(host->mrq); in msdc_ops_request()
1284 host->mrq = mrq; in msdc_ops_request()
1287 msdc_prepare_data(host, mrq); in msdc_ops_request()
1295 msdc_start_command(host, mrq, mrq->sbc); in msdc_ops_request()
1297 msdc_start_command(host, mrq, mrq->cmd); in msdc_ops_request()
1302 struct msdc_host *host = mmc_priv(mmc); in msdc_pre_req() local
1308 msdc_prepare_data(host, mrq); in msdc_pre_req()
1315 struct msdc_host *host = mmc_priv(mmc); in msdc_post_req() local
1323 msdc_unprepare_data(host, mrq); in msdc_post_req()
1327 static void msdc_data_xfer_next(struct msdc_host *host, in msdc_data_xfer_next() argument
1332 msdc_start_command(host, mrq, mrq->stop); in msdc_data_xfer_next()
1334 msdc_request_done(host, mrq); in msdc_data_xfer_next()
1337 static bool msdc_data_xfer_done(struct msdc_host *host, u32 events, in msdc_data_xfer_done() argument
1348 spin_lock_irqsave(&host->lock, flags); in msdc_data_xfer_done()
1349 done = !host->data; in msdc_data_xfer_done()
1351 host->data = NULL; in msdc_data_xfer_done()
1352 spin_unlock_irqrestore(&host->lock, flags); in msdc_data_xfer_done()
1358 dev_dbg(host->dev, "DMA status: 0x%8X\n", in msdc_data_xfer_done()
1359 readl(host->base + MSDC_DMA_CFG)); in msdc_data_xfer_done()
1360 sdr_set_field(host->base + MSDC_DMA_CTRL, MSDC_DMA_CTRL_STOP, in msdc_data_xfer_done()
1362 while (readl(host->base + MSDC_DMA_CFG) & MSDC_DMA_CFG_STS) in msdc_data_xfer_done()
1364 sdr_clr_bits(host->base + MSDC_INTEN, data_ints_mask); in msdc_data_xfer_done()
1365 dev_dbg(host->dev, "DMA stop\n"); in msdc_data_xfer_done()
1370 dev_dbg(host->dev, "interrupt events: %x\n", events); in msdc_data_xfer_done()
1371 msdc_reset_hw(host); in msdc_data_xfer_done()
1372 host->error |= REQ_DAT_ERR; in msdc_data_xfer_done()
1380 dev_dbg(host->dev, "%s: cmd=%d; blocks=%d", in msdc_data_xfer_done()
1382 dev_dbg(host->dev, "data_error=%d xfer_size=%d\n", in msdc_data_xfer_done()
1386 msdc_data_xfer_next(host, mrq, data); in msdc_data_xfer_done()
1392 static void msdc_set_buswidth(struct msdc_host *host, u32 width) in msdc_set_buswidth() argument
1394 u32 val = readl(host->base + SDC_CFG); in msdc_set_buswidth()
1411 writel(val, host->base + SDC_CFG); in msdc_set_buswidth()
1412 dev_dbg(host->dev, "Bus Width = %d", width); in msdc_set_buswidth()
1417 struct msdc_host *host = mmc_priv(mmc); in msdc_ops_switch_volt() local
1423 dev_err(host->dev, "Unsupported signal voltage!\n"); in msdc_ops_switch_volt()
1429 dev_dbg(host->dev, "Regulator set error %d (%d)\n", in msdc_ops_switch_volt()
1436 pinctrl_select_state(host->pinctrl, host->pins_uhs); in msdc_ops_switch_volt()
1438 pinctrl_select_state(host->pinctrl, host->pins_default); in msdc_ops_switch_volt()
1445 struct msdc_host *host = mmc_priv(mmc); in msdc_card_busy() local
1446 u32 status = readl(host->base + MSDC_PS); in msdc_card_busy()
1454 struct msdc_host *host = container_of(work, struct msdc_host, in msdc_request_timeout() local
1458 dev_err(host->dev, "%s: aborting cmd/data/mrq\n", __func__); in msdc_request_timeout()
1459 if (host->mrq) { in msdc_request_timeout()
1460 dev_err(host->dev, "%s: aborting mrq=%p cmd=%d\n", __func__, in msdc_request_timeout()
1461 host->mrq, host->mrq->cmd->opcode); in msdc_request_timeout()
1462 if (host->cmd) { in msdc_request_timeout()
1463 dev_err(host->dev, "%s: aborting cmd=%d\n", in msdc_request_timeout()
1464 __func__, host->cmd->opcode); in msdc_request_timeout()
1465 msdc_cmd_done(host, MSDC_INT_CMDTMO, host->mrq, in msdc_request_timeout()
1466 host->cmd); in msdc_request_timeout()
1467 } else if (host->data) { in msdc_request_timeout()
1468 dev_err(host->dev, "%s: abort data: cmd%d; %d blocks\n", in msdc_request_timeout()
1469 __func__, host->mrq->cmd->opcode, in msdc_request_timeout()
1470 host->data->blocks); in msdc_request_timeout()
1471 msdc_data_xfer_done(host, MSDC_INT_DATTMO, host->mrq, in msdc_request_timeout()
1472 host->data); in msdc_request_timeout()
1477 static void __msdc_enable_sdio_irq(struct msdc_host *host, int enb) in __msdc_enable_sdio_irq() argument
1480 sdr_set_bits(host->base + MSDC_INTEN, MSDC_INTEN_SDIOIRQ); in __msdc_enable_sdio_irq()
1481 sdr_set_bits(host->base + SDC_CFG, SDC_CFG_SDIOIDE); in __msdc_enable_sdio_irq()
1482 if (host->dev_comp->recheck_sdio_irq) in __msdc_enable_sdio_irq()
1483 msdc_recheck_sdio_irq(host); in __msdc_enable_sdio_irq()
1485 sdr_clr_bits(host->base + MSDC_INTEN, MSDC_INTEN_SDIOIRQ); in __msdc_enable_sdio_irq()
1486 sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_SDIOIDE); in __msdc_enable_sdio_irq()
1493 struct msdc_host *host = mmc_priv(mmc); in msdc_enable_sdio_irq() local
1495 spin_lock_irqsave(&host->lock, flags); in msdc_enable_sdio_irq()
1496 __msdc_enable_sdio_irq(host, enb); in msdc_enable_sdio_irq()
1497 spin_unlock_irqrestore(&host->lock, flags); in msdc_enable_sdio_irq()
1500 pm_runtime_get_noresume(host->dev); in msdc_enable_sdio_irq()
1502 pm_runtime_put_noidle(host->dev); in msdc_enable_sdio_irq()
1505 static irqreturn_t msdc_cmdq_irq(struct msdc_host *host, u32 intsts) in msdc_cmdq_irq() argument
1507 struct mmc_host *mmc = mmc_from_priv(host); in msdc_cmdq_irq()
1512 dev_err(host->dev, "%s: CMD CRC ERR", __func__); in msdc_cmdq_irq()
1515 dev_err(host->dev, "%s: CMD TIMEOUT ERR", __func__); in msdc_cmdq_irq()
1520 dev_err(host->dev, "%s: DATA CRC ERR", __func__); in msdc_cmdq_irq()
1523 dev_err(host->dev, "%s: DATA TIMEOUT ERR", __func__); in msdc_cmdq_irq()
1527 dev_err(host->dev, "cmd_err = %d, dat_err =%d, intsts = 0x%x", in msdc_cmdq_irq()
1536 struct msdc_host *host = (struct msdc_host *) dev_id; in msdc_irq() local
1537 struct mmc_host *mmc = mmc_from_priv(host); in msdc_irq()
1546 spin_lock_irqsave(&host->lock, flags); in msdc_irq()
1547 events = readl(host->base + MSDC_INT); in msdc_irq()
1548 event_mask = readl(host->base + MSDC_INTEN); in msdc_irq()
1550 __msdc_enable_sdio_irq(host, 0); in msdc_irq()
1552 writel(events & event_mask, host->base + MSDC_INT); in msdc_irq()
1554 mrq = host->mrq; in msdc_irq()
1555 cmd = host->cmd; in msdc_irq()
1556 data = host->data; in msdc_irq()
1557 spin_unlock_irqrestore(&host->lock, flags); in msdc_irq()
1563 if (host->internal_cd) in msdc_irq()
1573 msdc_cmdq_irq(host, events); in msdc_irq()
1575 writel(events, host->base + MSDC_INT); in msdc_irq()
1580 dev_err(host->dev, in msdc_irq()
1587 dev_dbg(host->dev, "%s: events=%08X\n", __func__, events); in msdc_irq()
1590 msdc_cmd_done(host, events, mrq, cmd); in msdc_irq()
1592 msdc_data_xfer_done(host, events, mrq, data); in msdc_irq()
1598 static void msdc_init_hw(struct msdc_host *host) in msdc_init_hw() argument
1601 u32 tune_reg = host->dev_comp->pad_tune_reg; in msdc_init_hw()
1603 if (host->reset) { in msdc_init_hw()
1604 reset_control_assert(host->reset); in msdc_init_hw()
1606 reset_control_deassert(host->reset); in msdc_init_hw()
1610 sdr_set_bits(host->base + MSDC_CFG, MSDC_CFG_MODE | MSDC_CFG_CKPDN); in msdc_init_hw()
1613 msdc_reset_hw(host); in msdc_init_hw()
1616 writel(0, host->base + MSDC_INTEN); in msdc_init_hw()
1617 val = readl(host->base + MSDC_INT); in msdc_init_hw()
1618 writel(val, host->base + MSDC_INT); in msdc_init_hw()
1621 if (host->internal_cd) { in msdc_init_hw()
1622 sdr_set_field(host->base + MSDC_PS, MSDC_PS_CDDEBOUNCE, in msdc_init_hw()
1624 sdr_set_bits(host->base + MSDC_PS, MSDC_PS_CDEN); in msdc_init_hw()
1625 sdr_set_bits(host->base + MSDC_INTEN, MSDC_INTEN_CDSC); in msdc_init_hw()
1626 sdr_set_bits(host->base + SDC_CFG, SDC_CFG_INSWKUP); in msdc_init_hw()
1628 sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_INSWKUP); in msdc_init_hw()
1629 sdr_clr_bits(host->base + MSDC_PS, MSDC_PS_CDEN); in msdc_init_hw()
1630 sdr_clr_bits(host->base + MSDC_INTEN, MSDC_INTEN_CDSC); in msdc_init_hw()
1633 if (host->top_base) { in msdc_init_hw()
1634 writel(0, host->top_base + EMMC_TOP_CONTROL); in msdc_init_hw()
1635 writel(0, host->top_base + EMMC_TOP_CMD); in msdc_init_hw()
1637 writel(0, host->base + tune_reg); in msdc_init_hw()
1639 writel(0, host->base + MSDC_IOCON); in msdc_init_hw()
1640 sdr_set_field(host->base + MSDC_IOCON, MSDC_IOCON_DDLSEL, 0); in msdc_init_hw()
1641 writel(0x403c0046, host->base + MSDC_PATCH_BIT); in msdc_init_hw()
1642 sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_CKGEN_MSDC_DLY_SEL, 1); in msdc_init_hw()
1643 writel(0xffff4089, host->base + MSDC_PATCH_BIT1); in msdc_init_hw()
1644 sdr_set_bits(host->base + EMMC50_CFG0, EMMC50_CFG_CFCSTS_SEL); in msdc_init_hw()
1646 if (host->dev_comp->stop_clk_fix) { in msdc_init_hw()
1647 sdr_set_field(host->base + MSDC_PATCH_BIT1, in msdc_init_hw()
1649 sdr_clr_bits(host->base + SDC_FIFO_CFG, in msdc_init_hw()
1651 sdr_clr_bits(host->base + SDC_FIFO_CFG, in msdc_init_hw()
1655 if (host->dev_comp->busy_check) in msdc_init_hw()
1656 sdr_clr_bits(host->base + MSDC_PATCH_BIT1, (1 << 7)); in msdc_init_hw()
1658 if (host->dev_comp->async_fifo) { in msdc_init_hw()
1659 sdr_set_field(host->base + MSDC_PATCH_BIT2, in msdc_init_hw()
1661 if (host->dev_comp->enhance_rx) { in msdc_init_hw()
1662 if (host->top_base) in msdc_init_hw()
1663 sdr_set_bits(host->top_base + EMMC_TOP_CONTROL, in msdc_init_hw()
1666 sdr_set_bits(host->base + SDC_ADV_CFG0, in msdc_init_hw()
1669 sdr_set_field(host->base + MSDC_PATCH_BIT2, in msdc_init_hw()
1671 sdr_set_field(host->base + MSDC_PATCH_BIT2, in msdc_init_hw()
1675 sdr_clr_bits(host->base + MSDC_PATCH_BIT2, in msdc_init_hw()
1677 sdr_set_bits(host->base + MSDC_PATCH_BIT2, in msdc_init_hw()
1681 if (host->dev_comp->support_64g) in msdc_init_hw()
1682 sdr_set_bits(host->base + MSDC_PATCH_BIT2, in msdc_init_hw()
1684 if (host->dev_comp->data_tune) { in msdc_init_hw()
1685 if (host->top_base) { in msdc_init_hw()
1686 sdr_set_bits(host->top_base + EMMC_TOP_CONTROL, in msdc_init_hw()
1688 sdr_clr_bits(host->top_base + EMMC_TOP_CONTROL, in msdc_init_hw()
1690 sdr_set_bits(host->top_base + EMMC_TOP_CMD, in msdc_init_hw()
1693 sdr_set_bits(host->base + tune_reg, in msdc_init_hw()
1699 if (host->top_base) in msdc_init_hw()
1700 sdr_set_bits(host->top_base + EMMC_TOP_CONTROL, in msdc_init_hw()
1703 sdr_set_bits(host->base + tune_reg, in msdc_init_hw()
1710 sdr_set_bits(host->base + SDC_CFG, SDC_CFG_SDIO); in msdc_init_hw()
1713 sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_SDIOIDE); in msdc_init_hw()
1714 sdr_set_bits(host->base + SDC_ADV_CFG0, SDC_DAT1_IRQ_TRIGGER); in msdc_init_hw()
1717 sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC, 3); in msdc_init_hw()
1719 host->def_tune_para.iocon = readl(host->base + MSDC_IOCON); in msdc_init_hw()
1720 host->saved_tune_para.iocon = readl(host->base + MSDC_IOCON); in msdc_init_hw()
1721 if (host->top_base) { in msdc_init_hw()
1722 host->def_tune_para.emmc_top_control = in msdc_init_hw()
1723 readl(host->top_base + EMMC_TOP_CONTROL); in msdc_init_hw()
1724 host->def_tune_para.emmc_top_cmd = in msdc_init_hw()
1725 readl(host->top_base + EMMC_TOP_CMD); in msdc_init_hw()
1726 host->saved_tune_para.emmc_top_control = in msdc_init_hw()
1727 readl(host->top_base + EMMC_TOP_CONTROL); in msdc_init_hw()
1728 host->saved_tune_para.emmc_top_cmd = in msdc_init_hw()
1729 readl(host->top_base + EMMC_TOP_CMD); in msdc_init_hw()
1731 host->def_tune_para.pad_tune = readl(host->base + tune_reg); in msdc_init_hw()
1732 host->saved_tune_para.pad_tune = readl(host->base + tune_reg); in msdc_init_hw()
1734 dev_dbg(host->dev, "init hardware done!"); in msdc_init_hw()
1737 static void msdc_deinit_hw(struct msdc_host *host) in msdc_deinit_hw() argument
1741 if (host->internal_cd) { in msdc_deinit_hw()
1743 sdr_clr_bits(host->base + MSDC_PS, MSDC_PS_CDEN); in msdc_deinit_hw()
1744 sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_INSWKUP); in msdc_deinit_hw()
1748 writel(0, host->base + MSDC_INTEN); in msdc_deinit_hw()
1750 val = readl(host->base + MSDC_INT); in msdc_deinit_hw()
1751 writel(val, host->base + MSDC_INT); in msdc_deinit_hw()
1755 static void msdc_init_gpd_bd(struct msdc_host *host, struct msdc_dma *dma) in msdc_init_gpd_bd() argument
1770 if (host->dev_comp->support_64g) in msdc_init_gpd_bd()
1775 if (host->dev_comp->support_64g) in msdc_init_gpd_bd()
1782 if (host->dev_comp->support_64g) in msdc_init_gpd_bd()
1789 struct msdc_host *host = mmc_priv(mmc); in msdc_ops_set_ios() local
1792 msdc_set_buswidth(host, ios->bus_width); in msdc_ops_set_ios()
1798 msdc_init_hw(host); in msdc_ops_set_ios()
1802 dev_err(host->dev, "Failed to set vmmc power!\n"); in msdc_ops_set_ios()
1808 if (!IS_ERR(mmc->supply.vqmmc) && !host->vqmmc_enabled) { in msdc_ops_set_ios()
1811 dev_err(host->dev, "Failed to set vqmmc power!\n"); in msdc_ops_set_ios()
1813 host->vqmmc_enabled = true; in msdc_ops_set_ios()
1820 if (!IS_ERR(mmc->supply.vqmmc) && host->vqmmc_enabled) { in msdc_ops_set_ios()
1822 host->vqmmc_enabled = false; in msdc_ops_set_ios()
1829 if (host->mclk != ios->clock || host->timing != ios->timing) in msdc_ops_set_ios()
1830 msdc_set_mclk(host, ios->timing, ios->clock); in msdc_ops_set_ios()
1850 static struct msdc_delay_phase get_best_delay(struct msdc_host *host, u32 delay) in get_best_delay() argument
1858 dev_err(host->dev, "phase error: [map:%x]\n", delay); in get_best_delay()
1879 dev_info(host->dev, "phase: [map:%x] [maxlen:%d] [final:%d]\n", in get_best_delay()
1888 static inline void msdc_set_cmd_delay(struct msdc_host *host, u32 value) in msdc_set_cmd_delay() argument
1890 u32 tune_reg = host->dev_comp->pad_tune_reg; in msdc_set_cmd_delay()
1892 if (host->top_base) in msdc_set_cmd_delay()
1893 sdr_set_field(host->top_base + EMMC_TOP_CMD, PAD_CMD_RXDLY, in msdc_set_cmd_delay()
1896 sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_CMDRDLY, in msdc_set_cmd_delay()
1900 static inline void msdc_set_data_delay(struct msdc_host *host, u32 value) in msdc_set_data_delay() argument
1902 u32 tune_reg = host->dev_comp->pad_tune_reg; in msdc_set_data_delay()
1904 if (host->top_base) in msdc_set_data_delay()
1905 sdr_set_field(host->top_base + EMMC_TOP_CONTROL, in msdc_set_data_delay()
1908 sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_DATRRDLY, in msdc_set_data_delay()
1914 struct msdc_host *host = mmc_priv(mmc); in msdc_tune_response() local
1920 u32 tune_reg = host->dev_comp->pad_tune_reg; in msdc_tune_response()
1926 sdr_set_field(host->base + tune_reg, in msdc_tune_response()
1928 host->hs200_cmd_int_delay); in msdc_tune_response()
1930 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in msdc_tune_response()
1932 msdc_set_cmd_delay(host, i); in msdc_tune_response()
1948 final_rise_delay = get_best_delay(host, rise_delay); in msdc_tune_response()
1954 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in msdc_tune_response()
1956 msdc_set_cmd_delay(host, i); in msdc_tune_response()
1972 final_fall_delay = get_best_delay(host, fall_delay); in msdc_tune_response()
1979 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in msdc_tune_response()
1982 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in msdc_tune_response()
1985 msdc_set_cmd_delay(host, final_delay); in msdc_tune_response()
1987 if (host->dev_comp->async_fifo || host->hs200_cmd_int_delay) in msdc_tune_response()
1991 sdr_set_field(host->base + tune_reg, in msdc_tune_response()
1997 dev_dbg(host->dev, "Final internal delay: 0x%x\n", internal_delay); in msdc_tune_response()
1998 internal_delay_phase = get_best_delay(host, internal_delay); in msdc_tune_response()
1999 sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_CMDRRDLY, in msdc_tune_response()
2002 dev_dbg(host->dev, "Final cmd pad delay: %x\n", final_delay); in msdc_tune_response()
2008 struct msdc_host *host = mmc_priv(mmc); in hs400_tune_response() local
2016 sdr_set_bits(host->base + PAD_CMD_TUNE, BIT(0)); in hs400_tune_response()
2017 sdr_set_field(host->base + MSDC_PATCH_BIT1, MSDC_PATCH_BIT1_CMDTA, 2); in hs400_tune_response()
2021 sdr_set_field(host->base + MSDC_PAD_TUNE, in hs400_tune_response()
2023 host->hs200_cmd_int_delay); in hs400_tune_response()
2025 if (host->hs400_cmd_resp_sel_rising) in hs400_tune_response()
2026 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in hs400_tune_response()
2028 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in hs400_tune_response()
2030 sdr_set_field(host->base + PAD_CMD_TUNE, in hs400_tune_response()
2047 final_cmd_delay = get_best_delay(host, cmd_delay); in hs400_tune_response()
2048 sdr_set_field(host->base + PAD_CMD_TUNE, PAD_CMD_TUNE_RX_DLY3, in hs400_tune_response()
2052 dev_dbg(host->dev, "Final cmd pad delay: %x\n", final_delay); in hs400_tune_response()
2058 struct msdc_host *host = mmc_priv(mmc); in msdc_tune_data() local
2064 sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_INT_DAT_LATCH_CK_SEL, in msdc_tune_data()
2065 host->latch_ck); in msdc_tune_data()
2066 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL); in msdc_tune_data()
2067 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL); in msdc_tune_data()
2069 msdc_set_data_delay(host, i); in msdc_tune_data()
2074 final_rise_delay = get_best_delay(host, rise_delay); in msdc_tune_data()
2080 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL); in msdc_tune_data()
2081 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL); in msdc_tune_data()
2083 msdc_set_data_delay(host, i); in msdc_tune_data()
2088 final_fall_delay = get_best_delay(host, fall_delay); in msdc_tune_data()
2093 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL); in msdc_tune_data()
2094 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL); in msdc_tune_data()
2097 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL); in msdc_tune_data()
2098 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL); in msdc_tune_data()
2101 msdc_set_data_delay(host, final_delay); in msdc_tune_data()
2103 dev_dbg(host->dev, "Final data pad delay: %x\n", final_delay); in msdc_tune_data()
2113 struct msdc_host *host = mmc_priv(mmc); in msdc_tune_together() local
2119 sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_INT_DAT_LATCH_CK_SEL, in msdc_tune_together()
2120 host->latch_ck); in msdc_tune_together()
2122 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in msdc_tune_together()
2123 sdr_clr_bits(host->base + MSDC_IOCON, in msdc_tune_together()
2126 msdc_set_cmd_delay(host, i); in msdc_tune_together()
2127 msdc_set_data_delay(host, i); in msdc_tune_together()
2132 final_rise_delay = get_best_delay(host, rise_delay); in msdc_tune_together()
2138 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in msdc_tune_together()
2139 sdr_set_bits(host->base + MSDC_IOCON, in msdc_tune_together()
2142 msdc_set_cmd_delay(host, i); in msdc_tune_together()
2143 msdc_set_data_delay(host, i); in msdc_tune_together()
2148 final_fall_delay = get_best_delay(host, fall_delay); in msdc_tune_together()
2153 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in msdc_tune_together()
2154 sdr_clr_bits(host->base + MSDC_IOCON, in msdc_tune_together()
2158 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in msdc_tune_together()
2159 sdr_set_bits(host->base + MSDC_IOCON, in msdc_tune_together()
2164 msdc_set_cmd_delay(host, final_delay); in msdc_tune_together()
2165 msdc_set_data_delay(host, final_delay); in msdc_tune_together()
2167 dev_dbg(host->dev, "Final pad delay: %x\n", final_delay); in msdc_tune_together()
2173 struct msdc_host *host = mmc_priv(mmc); in msdc_execute_tuning() local
2175 u32 tune_reg = host->dev_comp->pad_tune_reg; in msdc_execute_tuning()
2177 if (host->dev_comp->data_tune && host->dev_comp->async_fifo) { in msdc_execute_tuning()
2179 if (host->hs400_mode) { in msdc_execute_tuning()
2180 sdr_clr_bits(host->base + MSDC_IOCON, in msdc_execute_tuning()
2182 msdc_set_data_delay(host, 0); in msdc_execute_tuning()
2186 if (host->hs400_mode && in msdc_execute_tuning()
2187 host->dev_comp->hs400_tune) in msdc_execute_tuning()
2192 dev_err(host->dev, "Tune response fail!\n"); in msdc_execute_tuning()
2195 if (host->hs400_mode == false) { in msdc_execute_tuning()
2198 dev_err(host->dev, "Tune data fail!\n"); in msdc_execute_tuning()
2202 host->saved_tune_para.iocon = readl(host->base + MSDC_IOCON); in msdc_execute_tuning()
2203 host->saved_tune_para.pad_tune = readl(host->base + tune_reg); in msdc_execute_tuning()
2204 host->saved_tune_para.pad_cmd_tune = readl(host->base + PAD_CMD_TUNE); in msdc_execute_tuning()
2205 if (host->top_base) { in msdc_execute_tuning()
2206 host->saved_tune_para.emmc_top_control = readl(host->top_base + in msdc_execute_tuning()
2208 host->saved_tune_para.emmc_top_cmd = readl(host->top_base + in msdc_execute_tuning()
2216 struct msdc_host *host = mmc_priv(mmc); in msdc_prepare_hs400_tuning() local
2217 host->hs400_mode = true; in msdc_prepare_hs400_tuning()
2219 if (host->top_base) in msdc_prepare_hs400_tuning()
2220 writel(host->hs400_ds_delay, in msdc_prepare_hs400_tuning()
2221 host->top_base + EMMC50_PAD_DS_TUNE); in msdc_prepare_hs400_tuning()
2223 writel(host->hs400_ds_delay, host->base + PAD_DS_TUNE); in msdc_prepare_hs400_tuning()
2225 sdr_clr_bits(host->base + MSDC_PATCH_BIT2, MSDC_PATCH_BIT2_CFGCRCSTS); in msdc_prepare_hs400_tuning()
2227 sdr_set_field(host->base + EMMC50_CFG3, EMMC50_CFG3_OUTS_WR, 2); in msdc_prepare_hs400_tuning()
2234 struct msdc_host *host = mmc_priv(mmc); in msdc_hw_reset() local
2236 sdr_set_bits(host->base + EMMC_IOCON, 1); in msdc_hw_reset()
2238 sdr_clr_bits(host->base + EMMC_IOCON, 1); in msdc_hw_reset()
2244 struct msdc_host *host = mmc_priv(mmc); in msdc_ack_sdio_irq() local
2246 spin_lock_irqsave(&host->lock, flags); in msdc_ack_sdio_irq()
2247 __msdc_enable_sdio_irq(host, 1); in msdc_ack_sdio_irq()
2248 spin_unlock_irqrestore(&host->lock, flags); in msdc_ack_sdio_irq()
2253 struct msdc_host *host = mmc_priv(mmc); in msdc_get_cd() local
2259 if (!host->internal_cd) in msdc_get_cd()
2262 val = readl(host->base + MSDC_PS) & MSDC_PS_CDSTS; in msdc_get_cd()
2271 struct msdc_host *host = mmc_priv(mmc); in msdc_cqe_enable() local
2274 writel(MSDC_INT_CMDQ, host->base + MSDC_INTEN); in msdc_cqe_enable()
2276 sdr_set_bits(host->base + MSDC_PATCH_BIT1, MSDC_PB1_BUSY_CHECK_SEL); in msdc_cqe_enable()
2278 msdc_set_busy_timeout(host, 20 * 1000000000ULL, 0); in msdc_cqe_enable()
2280 msdc_set_timeout(host, 1000000000ULL, 0); in msdc_cqe_enable()
2285 struct msdc_host *host = mmc_priv(mmc); in msdc_cqe_disable() local
2288 sdr_clr_bits(host->base + MSDC_INTEN, MSDC_INT_CMDQ); in msdc_cqe_disable()
2290 sdr_clr_bits(host->base + MSDC_PATCH_BIT1, MSDC_PB1_BUSY_CHECK_SEL); in msdc_cqe_disable()
2293 sdr_set_field(host->base + MSDC_DMA_CTRL, in msdc_cqe_disable()
2295 msdc_reset_hw(host); in msdc_cqe_disable()
2343 struct msdc_host *host) in msdc_of_property_parse() argument
2346 &host->latch_ck); in msdc_of_property_parse()
2349 &host->hs400_ds_delay); in msdc_of_property_parse()
2352 &host->hs200_cmd_int_delay); in msdc_of_property_parse()
2355 &host->hs400_cmd_int_delay); in msdc_of_property_parse()
2359 host->hs400_cmd_resp_sel_rising = true; in msdc_of_property_parse()
2361 host->hs400_cmd_resp_sel_rising = false; in msdc_of_property_parse()
2365 host->cqhci = true; in msdc_of_property_parse()
2367 host->cqhci = false; in msdc_of_property_parse()
2373 struct msdc_host *host; in msdc_drv_probe() local
2382 /* Allocate MMC host for this device */ in msdc_drv_probe()
2387 host = mmc_priv(mmc); in msdc_drv_probe()
2392 host->base = devm_platform_ioremap_resource(pdev, 0); in msdc_drv_probe()
2393 if (IS_ERR(host->base)) { in msdc_drv_probe()
2394 ret = PTR_ERR(host->base); in msdc_drv_probe()
2400 host->top_base = devm_ioremap_resource(&pdev->dev, res); in msdc_drv_probe()
2401 if (IS_ERR(host->top_base)) in msdc_drv_probe()
2402 host->top_base = NULL; in msdc_drv_probe()
2409 host->src_clk = devm_clk_get(&pdev->dev, "source"); in msdc_drv_probe()
2410 if (IS_ERR(host->src_clk)) { in msdc_drv_probe()
2411 ret = PTR_ERR(host->src_clk); in msdc_drv_probe()
2415 host->h_clk = devm_clk_get(&pdev->dev, "hclk"); in msdc_drv_probe()
2416 if (IS_ERR(host->h_clk)) { in msdc_drv_probe()
2417 ret = PTR_ERR(host->h_clk); in msdc_drv_probe()
2421 host->bus_clk = devm_clk_get(&pdev->dev, "bus_clk"); in msdc_drv_probe()
2422 if (IS_ERR(host->bus_clk)) in msdc_drv_probe()
2423 host->bus_clk = NULL; in msdc_drv_probe()
2425 host->src_clk_cg = devm_clk_get(&pdev->dev, "source_cg"); in msdc_drv_probe()
2426 if (IS_ERR(host->src_clk_cg)) in msdc_drv_probe()
2427 host->src_clk_cg = NULL; in msdc_drv_probe()
2429 host->reset = devm_reset_control_get_optional_exclusive(&pdev->dev, in msdc_drv_probe()
2431 if (IS_ERR(host->reset)) in msdc_drv_probe()
2432 return PTR_ERR(host->reset); in msdc_drv_probe()
2434 host->irq = platform_get_irq(pdev, 0); in msdc_drv_probe()
2435 if (host->irq < 0) { in msdc_drv_probe()
2440 host->pinctrl = devm_pinctrl_get(&pdev->dev); in msdc_drv_probe()
2441 if (IS_ERR(host->pinctrl)) { in msdc_drv_probe()
2442 ret = PTR_ERR(host->pinctrl); in msdc_drv_probe()
2447 host->pins_default = pinctrl_lookup_state(host->pinctrl, "default"); in msdc_drv_probe()
2448 if (IS_ERR(host->pins_default)) { in msdc_drv_probe()
2449 ret = PTR_ERR(host->pins_default); in msdc_drv_probe()
2454 host->pins_uhs = pinctrl_lookup_state(host->pinctrl, "state_uhs"); in msdc_drv_probe()
2455 if (IS_ERR(host->pins_uhs)) { in msdc_drv_probe()
2456 ret = PTR_ERR(host->pins_uhs); in msdc_drv_probe()
2461 msdc_of_property_parse(pdev, host); in msdc_drv_probe()
2463 host->dev = &pdev->dev; in msdc_drv_probe()
2464 host->dev_comp = of_device_get_match_data(&pdev->dev); in msdc_drv_probe()
2465 host->src_clk_freq = clk_get_rate(host->src_clk); in msdc_drv_probe()
2466 /* Set host parameters to mmc */ in msdc_drv_probe()
2468 if (host->dev_comp->clk_div_bits == 8) in msdc_drv_probe()
2469 mmc->f_min = DIV_ROUND_UP(host->src_clk_freq, 4 * 255); in msdc_drv_probe()
2471 mmc->f_min = DIV_ROUND_UP(host->src_clk_freq, 4 * 4095); in msdc_drv_probe()
2475 host->dev_comp->use_internal_cd) { in msdc_drv_probe()
2480 host->internal_cd = true; in msdc_drv_probe()
2487 if (host->cqhci) in msdc_drv_probe()
2491 if (host->dev_comp->support_64g) in msdc_drv_probe()
2498 if (host->dev_comp->support_64g) in msdc_drv_probe()
2499 host->dma_mask = DMA_BIT_MASK(36); in msdc_drv_probe()
2501 host->dma_mask = DMA_BIT_MASK(32); in msdc_drv_probe()
2502 mmc_dev(mmc)->dma_mask = &host->dma_mask; in msdc_drv_probe()
2505 host->cq_host = devm_kzalloc(mmc->parent, in msdc_drv_probe()
2506 sizeof(*host->cq_host), in msdc_drv_probe()
2508 if (!host->cq_host) { in msdc_drv_probe()
2512 host->cq_host->caps |= CQHCI_TASK_DESC_SZ_128; in msdc_drv_probe()
2513 host->cq_host->mmio = host->base + 0x800; in msdc_drv_probe()
2514 host->cq_host->ops = &msdc_cmdq_ops; in msdc_drv_probe()
2515 ret = cqhci_init(host->cq_host, mmc, true); in msdc_drv_probe()
2524 host->timeout_clks = 3 * 1048576; in msdc_drv_probe()
2525 host->dma.gpd = dma_alloc_coherent(&pdev->dev, in msdc_drv_probe()
2527 &host->dma.gpd_addr, GFP_KERNEL); in msdc_drv_probe()
2528 host->dma.bd = dma_alloc_coherent(&pdev->dev, in msdc_drv_probe()
2530 &host->dma.bd_addr, GFP_KERNEL); in msdc_drv_probe()
2531 if (!host->dma.gpd || !host->dma.bd) { in msdc_drv_probe()
2535 msdc_init_gpd_bd(host, &host->dma); in msdc_drv_probe()
2536 INIT_DELAYED_WORK(&host->req_timeout, msdc_request_timeout); in msdc_drv_probe()
2537 spin_lock_init(&host->lock); in msdc_drv_probe()
2540 msdc_ungate_clock(host); in msdc_drv_probe()
2541 msdc_init_hw(host); in msdc_drv_probe()
2543 ret = devm_request_irq(&pdev->dev, host->irq, msdc_irq, in msdc_drv_probe()
2544 IRQF_TRIGGER_NONE, pdev->name, host); in msdc_drv_probe()
2548 pm_runtime_set_active(host->dev); in msdc_drv_probe()
2549 pm_runtime_set_autosuspend_delay(host->dev, MTK_MMC_AUTOSUSPEND_DELAY); in msdc_drv_probe()
2550 pm_runtime_use_autosuspend(host->dev); in msdc_drv_probe()
2551 pm_runtime_enable(host->dev); in msdc_drv_probe()
2559 pm_runtime_disable(host->dev); in msdc_drv_probe()
2562 msdc_deinit_hw(host); in msdc_drv_probe()
2563 msdc_gate_clock(host); in msdc_drv_probe()
2565 if (host->dma.gpd) in msdc_drv_probe()
2568 host->dma.gpd, host->dma.gpd_addr); in msdc_drv_probe()
2569 if (host->dma.bd) in msdc_drv_probe()
2572 host->dma.bd, host->dma.bd_addr); in msdc_drv_probe()
2582 struct msdc_host *host; in msdc_drv_remove() local
2585 host = mmc_priv(mmc); in msdc_drv_remove()
2587 pm_runtime_get_sync(host->dev); in msdc_drv_remove()
2591 msdc_deinit_hw(host); in msdc_drv_remove()
2592 msdc_gate_clock(host); in msdc_drv_remove()
2594 pm_runtime_disable(host->dev); in msdc_drv_remove()
2595 pm_runtime_put_noidle(host->dev); in msdc_drv_remove()
2598 host->dma.gpd, host->dma.gpd_addr); in msdc_drv_remove()
2600 host->dma.bd, host->dma.bd_addr); in msdc_drv_remove()
2607 static void msdc_save_reg(struct msdc_host *host) in msdc_save_reg() argument
2609 u32 tune_reg = host->dev_comp->pad_tune_reg; in msdc_save_reg()
2611 host->save_para.msdc_cfg = readl(host->base + MSDC_CFG); in msdc_save_reg()
2612 host->save_para.iocon = readl(host->base + MSDC_IOCON); in msdc_save_reg()
2613 host->save_para.sdc_cfg = readl(host->base + SDC_CFG); in msdc_save_reg()
2614 host->save_para.patch_bit0 = readl(host->base + MSDC_PATCH_BIT); in msdc_save_reg()
2615 host->save_para.patch_bit1 = readl(host->base + MSDC_PATCH_BIT1); in msdc_save_reg()
2616 host->save_para.patch_bit2 = readl(host->base + MSDC_PATCH_BIT2); in msdc_save_reg()
2617 host->save_para.pad_ds_tune = readl(host->base + PAD_DS_TUNE); in msdc_save_reg()
2618 host->save_para.pad_cmd_tune = readl(host->base + PAD_CMD_TUNE); in msdc_save_reg()
2619 host->save_para.emmc50_cfg0 = readl(host->base + EMMC50_CFG0); in msdc_save_reg()
2620 host->save_para.emmc50_cfg3 = readl(host->base + EMMC50_CFG3); in msdc_save_reg()
2621 host->save_para.sdc_fifo_cfg = readl(host->base + SDC_FIFO_CFG); in msdc_save_reg()
2622 if (host->top_base) { in msdc_save_reg()
2623 host->save_para.emmc_top_control = in msdc_save_reg()
2624 readl(host->top_base + EMMC_TOP_CONTROL); in msdc_save_reg()
2625 host->save_para.emmc_top_cmd = in msdc_save_reg()
2626 readl(host->top_base + EMMC_TOP_CMD); in msdc_save_reg()
2627 host->save_para.emmc50_pad_ds_tune = in msdc_save_reg()
2628 readl(host->top_base + EMMC50_PAD_DS_TUNE); in msdc_save_reg()
2630 host->save_para.pad_tune = readl(host->base + tune_reg); in msdc_save_reg()
2634 static void msdc_restore_reg(struct msdc_host *host) in msdc_restore_reg() argument
2636 struct mmc_host *mmc = mmc_from_priv(host); in msdc_restore_reg()
2637 u32 tune_reg = host->dev_comp->pad_tune_reg; in msdc_restore_reg()
2639 writel(host->save_para.msdc_cfg, host->base + MSDC_CFG); in msdc_restore_reg()
2640 writel(host->save_para.iocon, host->base + MSDC_IOCON); in msdc_restore_reg()
2641 writel(host->save_para.sdc_cfg, host->base + SDC_CFG); in msdc_restore_reg()
2642 writel(host->save_para.patch_bit0, host->base + MSDC_PATCH_BIT); in msdc_restore_reg()
2643 writel(host->save_para.patch_bit1, host->base + MSDC_PATCH_BIT1); in msdc_restore_reg()
2644 writel(host->save_para.patch_bit2, host->base + MSDC_PATCH_BIT2); in msdc_restore_reg()
2645 writel(host->save_para.pad_ds_tune, host->base + PAD_DS_TUNE); in msdc_restore_reg()
2646 writel(host->save_para.pad_cmd_tune, host->base + PAD_CMD_TUNE); in msdc_restore_reg()
2647 writel(host->save_para.emmc50_cfg0, host->base + EMMC50_CFG0); in msdc_restore_reg()
2648 writel(host->save_para.emmc50_cfg3, host->base + EMMC50_CFG3); in msdc_restore_reg()
2649 writel(host->save_para.sdc_fifo_cfg, host->base + SDC_FIFO_CFG); in msdc_restore_reg()
2650 if (host->top_base) { in msdc_restore_reg()
2651 writel(host->save_para.emmc_top_control, in msdc_restore_reg()
2652 host->top_base + EMMC_TOP_CONTROL); in msdc_restore_reg()
2653 writel(host->save_para.emmc_top_cmd, in msdc_restore_reg()
2654 host->top_base + EMMC_TOP_CMD); in msdc_restore_reg()
2655 writel(host->save_para.emmc50_pad_ds_tune, in msdc_restore_reg()
2656 host->top_base + EMMC50_PAD_DS_TUNE); in msdc_restore_reg()
2658 writel(host->save_para.pad_tune, host->base + tune_reg); in msdc_restore_reg()
2662 __msdc_enable_sdio_irq(host, 1); in msdc_restore_reg()
2668 struct msdc_host *host = mmc_priv(mmc); in msdc_runtime_suspend() local
2670 msdc_save_reg(host); in msdc_runtime_suspend()
2671 msdc_gate_clock(host); in msdc_runtime_suspend()
2678 struct msdc_host *host = mmc_priv(mmc); in msdc_runtime_resume() local
2680 msdc_ungate_clock(host); in msdc_runtime_resume()
2681 msdc_restore_reg(host); in msdc_runtime_resume()