mmc/host/mmci.h

1 /* SPDX-License-Identifier: GPL-2.0-only */
3  *  linux/drivers/mmc/host/mmci.h - ARM PrimeCell MMCI PL180/1 driver
24  * The STM32 sdmmc does not have PWR_UP/OD/ROD
58 /* Modified on STM32 sdmmc */
93 /* Command register in STM32 sdmmc versions */
131 /* Control register extensions in STM32 versions */
165 /* Extended status bits for the STM32 variants */
186 /* Extended clear bits for the STM32 variants */
217 /* Extended status bits for the STM32 variants */
224 /* STM32 sdmmc registers for IDMA (Internal DMA) */
265  * struct variant_data - MMCI variant-specific quirks
282  * @st_clkdiv: true if using a ST-specific clock divider algorithm
283  * @stm32_clkdiv: true if using a STM32-specific clock divider algorithm
290  * @dma_power_of_2: DMA only works with blocks that are a power of 2.
309  * @qcom_dml: enables qcom specific dma glue for dma transfers.
317  * @dma_lli: true if variant has dma link list feature.
318  * @stm32_idmabsize_mask: stm32 sdmmc idma buffer size.
442 #define dma_inprogress(host)	((host)->dma_in_progress)
449 	return (ffs(host->data->blksz) - 1) << 4;  in mmci_dctrl_blksz()