Lines Matching full:host
3 * linux/drivers/mmc/host/mmci.c - ARM PrimeCell MMCI PL180/1 driver
23 #include <linux/mmc/host.h>
47 static void mmci_variant_init(struct mmci_host *host);
48 static void ux500_variant_init(struct mmci_host *host);
49 static void ux500v2_variant_init(struct mmci_host *host);
337 struct mmci_host *host = mmc_priv(mmc); in mmci_card_busy() local
341 spin_lock_irqsave(&host->lock, flags); in mmci_card_busy()
342 if (readl(host->base + MMCISTATUS) & host->variant->busy_detect_flag) in mmci_card_busy()
344 spin_unlock_irqrestore(&host->lock, flags); in mmci_card_busy()
349 static void mmci_reg_delay(struct mmci_host *host) in mmci_reg_delay() argument
358 if (host->cclk < 25000000) in mmci_reg_delay()
365 * This must be called with host->lock held
367 void mmci_write_clkreg(struct mmci_host *host, u32 clk) in mmci_write_clkreg() argument
369 if (host->clk_reg != clk) { in mmci_write_clkreg()
370 host->clk_reg = clk; in mmci_write_clkreg()
371 writel(clk, host->base + MMCICLOCK); in mmci_write_clkreg()
376 * This must be called with host->lock held
378 void mmci_write_pwrreg(struct mmci_host *host, u32 pwr) in mmci_write_pwrreg() argument
380 if (host->pwr_reg != pwr) { in mmci_write_pwrreg()
381 host->pwr_reg = pwr; in mmci_write_pwrreg()
382 writel(pwr, host->base + MMCIPOWER); in mmci_write_pwrreg()
387 * This must be called with host->lock held
389 static void mmci_write_datactrlreg(struct mmci_host *host, u32 datactrl) in mmci_write_datactrlreg() argument
392 datactrl |= host->datactrl_reg & host->variant->busy_dpsm_flag; in mmci_write_datactrlreg()
394 if (host->datactrl_reg != datactrl) { in mmci_write_datactrlreg()
395 host->datactrl_reg = datactrl; in mmci_write_datactrlreg()
396 writel(datactrl, host->base + MMCIDATACTRL); in mmci_write_datactrlreg()
401 * This must be called with host->lock held
403 static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired) in mmci_set_clkreg() argument
405 struct variant_data *variant = host->variant; in mmci_set_clkreg()
409 host->cclk = 0; in mmci_set_clkreg()
413 host->cclk = host->mclk; in mmci_set_clkreg()
414 } else if (desired >= host->mclk) { in mmci_set_clkreg()
418 host->cclk = host->mclk; in mmci_set_clkreg()
426 clk = DIV_ROUND_UP(host->mclk, desired) - 2; in mmci_set_clkreg()
429 host->cclk = host->mclk / (clk + 2); in mmci_set_clkreg()
435 clk = host->mclk / (2 * desired) - 1; in mmci_set_clkreg()
438 host->cclk = host->mclk / (2 * (clk + 1)); in mmci_set_clkreg()
448 host->mmc->actual_clock = host->cclk; in mmci_set_clkreg()
450 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) in mmci_set_clkreg()
452 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) in mmci_set_clkreg()
455 if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50 || in mmci_set_clkreg()
456 host->mmc->ios.timing == MMC_TIMING_MMC_DDR52) in mmci_set_clkreg()
459 mmci_write_clkreg(host, clk); in mmci_set_clkreg()
462 static void mmci_dma_release(struct mmci_host *host) in mmci_dma_release() argument
464 if (host->ops && host->ops->dma_release) in mmci_dma_release()
465 host->ops->dma_release(host); in mmci_dma_release()
467 host->use_dma = false; in mmci_dma_release()
470 static void mmci_dma_setup(struct mmci_host *host) in mmci_dma_setup() argument
472 if (!host->ops || !host->ops->dma_setup) in mmci_dma_setup()
475 if (host->ops->dma_setup(host)) in mmci_dma_setup()
479 host->next_cookie = 1; in mmci_dma_setup()
481 host->use_dma = true; in mmci_dma_setup()
487 static int mmci_validate_data(struct mmci_host *host, in mmci_validate_data() argument
490 struct variant_data *variant = host->variant; in mmci_validate_data()
495 dev_err(mmc_dev(host->mmc), in mmci_validate_data()
500 if (host->ops && host->ops->validate_data) in mmci_validate_data()
501 return host->ops->validate_data(host, data); in mmci_validate_data()
506 static int mmci_prep_data(struct mmci_host *host, struct mmc_data *data, bool next) in mmci_prep_data() argument
510 if (!host->ops || !host->ops->prep_data) in mmci_prep_data()
513 err = host->ops->prep_data(host, data, next); in mmci_prep_data()
516 data->host_cookie = ++host->next_cookie < 0 ? in mmci_prep_data()
517 1 : host->next_cookie; in mmci_prep_data()
522 static void mmci_unprep_data(struct mmci_host *host, struct mmc_data *data, in mmci_unprep_data() argument
525 if (host->ops && host->ops->unprep_data) in mmci_unprep_data()
526 host->ops->unprep_data(host, data, err); in mmci_unprep_data()
531 static void mmci_get_next_data(struct mmci_host *host, struct mmc_data *data) in mmci_get_next_data() argument
533 WARN_ON(data->host_cookie && data->host_cookie != host->next_cookie); in mmci_get_next_data()
535 if (host->ops && host->ops->get_next_data) in mmci_get_next_data()
536 host->ops->get_next_data(host, data); in mmci_get_next_data()
539 static int mmci_dma_start(struct mmci_host *host, unsigned int datactrl) in mmci_dma_start() argument
541 struct mmc_data *data = host->data; in mmci_dma_start()
544 if (!host->use_dma) in mmci_dma_start()
547 ret = mmci_prep_data(host, data, false); in mmci_dma_start()
551 if (!host->ops || !host->ops->dma_start) in mmci_dma_start()
555 dev_vdbg(mmc_dev(host->mmc), in mmci_dma_start()
559 ret = host->ops->dma_start(host, &datactrl); in mmci_dma_start()
564 mmci_write_datactrlreg(host, datactrl); in mmci_dma_start()
571 writel(readl(host->base + MMCIMASK0) | MCI_DATAENDMASK, in mmci_dma_start()
572 host->base + MMCIMASK0); in mmci_dma_start()
576 static void mmci_dma_finalize(struct mmci_host *host, struct mmc_data *data) in mmci_dma_finalize() argument
578 if (!host->use_dma) in mmci_dma_finalize()
581 if (host->ops && host->ops->dma_finalize) in mmci_dma_finalize()
582 host->ops->dma_finalize(host, data); in mmci_dma_finalize()
585 static void mmci_dma_error(struct mmci_host *host) in mmci_dma_error() argument
587 if (!host->use_dma) in mmci_dma_error()
590 if (host->ops && host->ops->dma_error) in mmci_dma_error()
591 host->ops->dma_error(host); in mmci_dma_error()
595 mmci_request_end(struct mmci_host *host, struct mmc_request *mrq) in mmci_request_end() argument
597 writel(0, host->base + MMCICOMMAND); in mmci_request_end()
599 BUG_ON(host->data); in mmci_request_end()
601 host->mrq = NULL; in mmci_request_end()
602 host->cmd = NULL; in mmci_request_end()
604 mmc_request_done(host->mmc, mrq); in mmci_request_end()
607 static void mmci_set_mask1(struct mmci_host *host, unsigned int mask) in mmci_set_mask1() argument
609 void __iomem *base = host->base; in mmci_set_mask1()
610 struct variant_data *variant = host->variant; in mmci_set_mask1()
612 if (host->singleirq) { in mmci_set_mask1()
624 host->mask1_reg = mask; in mmci_set_mask1()
627 static void mmci_stop_data(struct mmci_host *host) in mmci_stop_data() argument
629 mmci_write_datactrlreg(host, 0); in mmci_stop_data()
630 mmci_set_mask1(host, 0); in mmci_stop_data()
631 host->data = NULL; in mmci_stop_data()
634 static void mmci_init_sg(struct mmci_host *host, struct mmc_data *data) in mmci_init_sg() argument
643 sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); in mmci_init_sg()
646 static u32 mmci_get_dctrl_cfg(struct mmci_host *host) in mmci_get_dctrl_cfg() argument
648 return MCI_DPSM_ENABLE | mmci_dctrl_blksz(host); in mmci_get_dctrl_cfg()
651 static u32 ux500v2_get_dctrl_cfg(struct mmci_host *host) in ux500v2_get_dctrl_cfg() argument
653 return MCI_DPSM_ENABLE | (host->data->blksz << 16); in ux500v2_get_dctrl_cfg()
656 static bool ux500_busy_complete(struct mmci_host *host, u32 status, u32 err_msk) in ux500_busy_complete() argument
658 void __iomem *base = host->base; in ux500_busy_complete()
664 * store the status in host->busy_status. in ux500_busy_complete()
673 if (!host->busy_status && !(status & err_msk) && in ux500_busy_complete()
674 (readl(base + MMCISTATUS) & host->variant->busy_detect_flag)) { in ux500_busy_complete()
676 host->variant->busy_detect_mask, in ux500_busy_complete()
679 host->busy_status = status & (MCI_CMDSENT | MCI_CMDRESPEND); in ux500_busy_complete()
694 if (host->busy_status && in ux500_busy_complete()
695 (status & host->variant->busy_detect_flag)) { in ux500_busy_complete()
696 writel(host->variant->busy_detect_mask, base + MMCICLEAR); in ux500_busy_complete()
706 if (host->busy_status) { in ux500_busy_complete()
707 writel(host->variant->busy_detect_mask, base + MMCICLEAR); in ux500_busy_complete()
710 ~host->variant->busy_detect_mask, base + MMCIMASK0); in ux500_busy_complete()
711 host->busy_status = 0; in ux500_busy_complete()
736 int mmci_dmae_setup(struct mmci_host *host) in mmci_dmae_setup() argument
741 dmae = devm_kzalloc(mmc_dev(host->mmc), sizeof(*dmae), GFP_KERNEL); in mmci_dmae_setup()
745 host->dma_priv = dmae; in mmci_dmae_setup()
747 dmae->rx_channel = dma_request_chan(mmc_dev(host->mmc), "rx"); in mmci_dmae_setup()
754 dmae->tx_channel = dma_request_chan(mmc_dev(host->mmc), "tx"); in mmci_dmae_setup()
757 dev_warn(mmc_dev(host->mmc), in mmci_dmae_setup()
780 dev_info(mmc_dev(host->mmc), "DMA channels RX %s, TX %s\n", in mmci_dmae_setup()
791 if (max_seg_size < host->mmc->max_seg_size) in mmci_dmae_setup()
792 host->mmc->max_seg_size = max_seg_size; in mmci_dmae_setup()
798 if (max_seg_size < host->mmc->max_seg_size) in mmci_dmae_setup()
799 host->mmc->max_seg_size = max_seg_size; in mmci_dmae_setup()
803 mmci_dmae_release(host); in mmci_dmae_setup()
814 void mmci_dmae_release(struct mmci_host *host) in mmci_dmae_release() argument
816 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_release()
825 static void mmci_dma_unmap(struct mmci_host *host, struct mmc_data *data) in mmci_dma_unmap() argument
827 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dma_unmap()
839 void mmci_dmae_error(struct mmci_host *host) in mmci_dmae_error() argument
841 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_error()
843 if (!dma_inprogress(host)) in mmci_dmae_error()
846 dev_err(mmc_dev(host->mmc), "error during DMA transfer!\n"); in mmci_dmae_error()
848 host->dma_in_progress = false; in mmci_dmae_error()
851 host->data->host_cookie = 0; in mmci_dmae_error()
853 mmci_dma_unmap(host, host->data); in mmci_dmae_error()
856 void mmci_dmae_finalize(struct mmci_host *host, struct mmc_data *data) in mmci_dmae_finalize() argument
858 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_finalize()
862 if (!dma_inprogress(host)) in mmci_dmae_finalize()
867 status = readl(host->base + MMCISTATUS); in mmci_dmae_finalize()
880 mmci_dma_error(host); in mmci_dmae_finalize()
884 mmci_dma_unmap(host, data); in mmci_dmae_finalize()
892 dev_err(mmc_dev(host->mmc), "buggy DMA detected. Taking evasive action.\n"); in mmci_dmae_finalize()
893 mmci_dma_release(host); in mmci_dmae_finalize()
896 host->dma_in_progress = false; in mmci_dmae_finalize()
902 static int _mmci_dmae_prep_data(struct mmci_host *host, struct mmc_data *data, in _mmci_dmae_prep_data() argument
906 struct mmci_dmae_priv *dmae = host->dma_priv; in _mmci_dmae_prep_data()
907 struct variant_data *variant = host->variant; in _mmci_dmae_prep_data()
909 .src_addr = host->phybase + MMCIFIFO, in _mmci_dmae_prep_data()
910 .dst_addr = host->phybase + MMCIFIFO, in _mmci_dmae_prep_data()
948 if (host->variant->dma_power_of_2 && !is_power_of_2(data->blksz)) in _mmci_dmae_prep_data()
957 if (host->variant->qcom_dml) in _mmci_dmae_prep_data()
977 int mmci_dmae_prep_data(struct mmci_host *host, in mmci_dmae_prep_data() argument
981 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_prep_data()
984 if (!host->use_dma) in mmci_dmae_prep_data()
988 return _mmci_dmae_prep_data(host, data, &nd->chan, &nd->desc); in mmci_dmae_prep_data()
994 return _mmci_dmae_prep_data(host, data, &dmae->cur, in mmci_dmae_prep_data()
998 int mmci_dmae_start(struct mmci_host *host, unsigned int *datactrl) in mmci_dmae_start() argument
1000 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_start()
1003 host->dma_in_progress = true; in mmci_dmae_start()
1006 host->dma_in_progress = false; in mmci_dmae_start()
1016 void mmci_dmae_get_next_data(struct mmci_host *host, struct mmc_data *data) in mmci_dmae_get_next_data() argument
1018 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_get_next_data()
1021 if (!host->use_dma) in mmci_dmae_get_next_data()
1032 void mmci_dmae_unprep_data(struct mmci_host *host, in mmci_dmae_unprep_data() argument
1036 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_unprep_data()
1038 if (!host->use_dma) in mmci_dmae_unprep_data()
1041 mmci_dma_unmap(host, data); in mmci_dmae_unprep_data()
1056 host->dma_in_progress = false; in mmci_dmae_unprep_data()
1082 static void mmci_variant_init(struct mmci_host *host) in mmci_variant_init() argument
1084 host->ops = &mmci_variant_ops; in mmci_variant_init()
1087 static void ux500_variant_init(struct mmci_host *host) in ux500_variant_init() argument
1089 host->ops = &mmci_variant_ops; in ux500_variant_init()
1090 host->ops->busy_complete = ux500_busy_complete; in ux500_variant_init()
1093 static void ux500v2_variant_init(struct mmci_host *host) in ux500v2_variant_init() argument
1095 host->ops = &mmci_variant_ops; in ux500v2_variant_init()
1096 host->ops->busy_complete = ux500_busy_complete; in ux500v2_variant_init()
1097 host->ops->get_datactrl_cfg = ux500v2_get_dctrl_cfg; in ux500v2_variant_init()
1102 struct mmci_host *host = mmc_priv(mmc); in mmci_pre_request() local
1110 if (mmci_validate_data(host, data)) in mmci_pre_request()
1113 mmci_prep_data(host, data, true); in mmci_pre_request()
1119 struct mmci_host *host = mmc_priv(mmc); in mmci_post_request() local
1125 mmci_unprep_data(host, data, err); in mmci_post_request()
1128 static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) in mmci_start_data() argument
1130 struct variant_data *variant = host->variant; in mmci_start_data()
1135 dev_dbg(mmc_dev(host->mmc), "blksz %04x blks %04x flags %08x\n", in mmci_start_data()
1138 host->data = data; in mmci_start_data()
1139 host->size = data->blksz * data->blocks; in mmci_start_data()
1142 clks = (unsigned long long)data->timeout_ns * host->cclk; in mmci_start_data()
1147 base = host->base; in mmci_start_data()
1149 writel(host->size, base + MMCIDATALENGTH); in mmci_start_data()
1151 datactrl = host->ops->get_datactrl_cfg(host); in mmci_start_data()
1152 datactrl |= host->data->flags & MMC_DATA_READ ? MCI_DPSM_DIRECTION : 0; in mmci_start_data()
1154 if (host->mmc->card && mmc_card_sdio(host->mmc->card)) { in mmci_start_data()
1166 (host->size < 8 || in mmci_start_data()
1167 (host->size <= 8 && host->mclk > 50000000))) in mmci_start_data()
1168 clk = host->clk_reg & ~variant->clkreg_enable; in mmci_start_data()
1170 clk = host->clk_reg | variant->clkreg_enable; in mmci_start_data()
1172 mmci_write_clkreg(host, clk); in mmci_start_data()
1175 if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50 || in mmci_start_data()
1176 host->mmc->ios.timing == MMC_TIMING_MMC_DDR52) in mmci_start_data()
1183 if (!mmci_dma_start(host, datactrl)) in mmci_start_data()
1187 mmci_init_sg(host, data); in mmci_start_data()
1197 if (host->size < variant->fifohalfsize) in mmci_start_data()
1207 mmci_write_datactrlreg(host, datactrl); in mmci_start_data()
1209 mmci_set_mask1(host, irqmask); in mmci_start_data()
1213 mmci_start_command(struct mmci_host *host, struct mmc_command *cmd, u32 c) in mmci_start_command() argument
1215 void __iomem *base = host->base; in mmci_start_command()
1218 dev_dbg(mmc_dev(host->mmc), "op %02x arg %08x flags %08x\n", in mmci_start_command()
1221 if (readl(base + MMCICOMMAND) & host->variant->cmdreg_cpsm_enable) { in mmci_start_command()
1223 mmci_reg_delay(host); in mmci_start_command()
1226 if (host->variant->cmdreg_stop && in mmci_start_command()
1228 c |= host->variant->cmdreg_stop; in mmci_start_command()
1230 c |= cmd->opcode | host->variant->cmdreg_cpsm_enable; in mmci_start_command()
1233 c |= host->variant->cmdreg_lrsp_crc; in mmci_start_command()
1235 c |= host->variant->cmdreg_srsp_crc; in mmci_start_command()
1237 c |= host->variant->cmdreg_srsp; in mmci_start_command()
1240 if (host->variant->busy_timeout && cmd->flags & MMC_RSP_BUSY) { in mmci_start_command()
1244 clks = (unsigned long long)cmd->busy_timeout * host->cclk; in mmci_start_command()
1246 writel_relaxed(clks, host->base + MMCIDATATIMER); in mmci_start_command()
1249 if (host->ops->pre_sig_volt_switch && cmd->opcode == SD_SWITCH_VOLTAGE) in mmci_start_command()
1250 host->ops->pre_sig_volt_switch(host); in mmci_start_command()
1256 c |= host->variant->data_cmd_enable; in mmci_start_command()
1258 host->cmd = cmd; in mmci_start_command()
1264 static void mmci_stop_command(struct mmci_host *host) in mmci_stop_command() argument
1266 host->stop_abort.error = 0; in mmci_stop_command()
1267 mmci_start_command(host, &host->stop_abort, 0); in mmci_stop_command()
1271 mmci_data_irq(struct mmci_host *host, struct mmc_data *data, in mmci_data_irq() argument
1281 status_err = status & (host->variant->start_err | in mmci_data_irq()
1289 mmci_dma_error(host); in mmci_data_irq()
1294 * on the MMC bus, not on the host side. On reads, this in mmci_data_irq()
1298 if (!host->variant->datacnt_useless) { in mmci_data_irq()
1299 remain = readl(host->base + MMCIDATACNT); in mmci_data_irq()
1305 dev_dbg(mmc_dev(host->mmc), "MCI ERROR IRQ, status 0x%08x at 0x%08x\n", in mmci_data_irq()
1318 if (success > host->variant->fifosize) in mmci_data_irq()
1319 success -= host->variant->fifosize; in mmci_data_irq()
1328 dev_err(mmc_dev(host->mmc), "stray MCI_DATABLOCKEND interrupt\n"); in mmci_data_irq()
1331 mmci_dma_finalize(host, data); in mmci_data_irq()
1333 mmci_stop_data(host); in mmci_data_irq()
1340 if (host->variant->cmdreg_stop && data->error) in mmci_data_irq()
1341 mmci_stop_command(host); in mmci_data_irq()
1343 mmci_request_end(host, data->mrq); in mmci_data_irq()
1344 } else if (host->mrq->sbc && !data->error) { in mmci_data_irq()
1345 mmci_request_end(host, data->mrq); in mmci_data_irq()
1347 mmci_start_command(host, data->stop, 0); in mmci_data_irq()
1353 mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd, in mmci_cmd_irq() argument
1357 void __iomem *base = host->base; in mmci_cmd_irq()
1363 sbc = (cmd == host->mrq->sbc); in mmci_cmd_irq()
1371 if (host->variant->busy_timeout && busy_resp) in mmci_cmd_irq()
1374 if (!((status | host->busy_status) & in mmci_cmd_irq()
1379 if (busy_resp && host->variant->busy_detect) in mmci_cmd_irq()
1380 if (!host->ops->busy_complete(host, status, err_msk)) in mmci_cmd_irq()
1383 host->cmd = NULL; in mmci_cmd_irq()
1389 } else if (host->variant->busy_timeout && busy_resp && in mmci_cmd_irq()
1392 host->irq_action = IRQ_WAKE_THREAD; in mmci_cmd_irq()
1401 if (host->data) { in mmci_cmd_irq()
1403 mmci_dma_error(host); in mmci_cmd_irq()
1405 mmci_stop_data(host); in mmci_cmd_irq()
1406 if (host->variant->cmdreg_stop && cmd->error) { in mmci_cmd_irq()
1407 mmci_stop_command(host); in mmci_cmd_irq()
1412 if (host->irq_action != IRQ_WAKE_THREAD) in mmci_cmd_irq()
1413 mmci_request_end(host, host->mrq); in mmci_cmd_irq()
1416 mmci_start_command(host, host->mrq->cmd, 0); in mmci_cmd_irq()
1417 } else if (!host->variant->datactrl_first && in mmci_cmd_irq()
1419 mmci_start_data(host, cmd->data); in mmci_cmd_irq()
1423 static int mmci_get_rx_fifocnt(struct mmci_host *host, u32 status, int remain) in mmci_get_rx_fifocnt() argument
1425 return remain - (readl(host->base + MMCIFIFOCNT) << 2); in mmci_get_rx_fifocnt()
1428 static int mmci_qcom_get_rx_fifocnt(struct mmci_host *host, u32 status, int r) in mmci_qcom_get_rx_fifocnt() argument
1435 return host->variant->fifohalfsize; in mmci_qcom_get_rx_fifocnt()
1442 static int mmci_pio_read(struct mmci_host *host, char *buffer, unsigned int remain) in mmci_pio_read() argument
1444 void __iomem *base = host->base; in mmci_pio_read()
1446 u32 status = readl(host->base + MMCISTATUS); in mmci_pio_read()
1447 int host_remain = host->size; in mmci_pio_read()
1450 int count = host->get_rx_fifocnt(host, status, host_remain); in mmci_pio_read()
1490 static int mmci_pio_write(struct mmci_host *host, char *buffer, unsigned int remain, u32 status) in mmci_pio_write() argument
1492 struct variant_data *variant = host->variant; in mmci_pio_write()
1493 void __iomem *base = host->base; in mmci_pio_write()
1530 struct mmci_host *host = dev_id; in mmci_pio_irq() local
1531 struct sg_mapping_iter *sg_miter = &host->sg_miter; in mmci_pio_irq()
1532 struct variant_data *variant = host->variant; in mmci_pio_irq()
1533 void __iomem *base = host->base; in mmci_pio_irq()
1538 dev_dbg(mmc_dev(host->mmc), "irq1 (pio) %08x\n", status); in mmci_pio_irq()
1562 len = mmci_pio_read(host, buffer, remain); in mmci_pio_irq()
1564 len = mmci_pio_write(host, buffer, remain, status); in mmci_pio_irq()
1568 host->size -= len; in mmci_pio_irq()
1583 if (status & MCI_RXACTIVE && host->size < variant->fifohalfsize) in mmci_pio_irq()
1584 mmci_set_mask1(host, MCI_RXDATAAVLBLMASK); in mmci_pio_irq()
1592 if (host->size == 0) { in mmci_pio_irq()
1593 mmci_set_mask1(host, 0); in mmci_pio_irq()
1605 struct mmci_host *host = dev_id; in mmci_irq() local
1608 spin_lock(&host->lock); in mmci_irq()
1609 host->irq_action = IRQ_HANDLED; in mmci_irq()
1612 status = readl(host->base + MMCISTATUS); in mmci_irq()
1614 if (host->singleirq) { in mmci_irq()
1615 if (status & host->mask1_reg) in mmci_irq()
1618 status &= ~host->variant->irq_pio_mask; in mmci_irq()
1625 status &= readl(host->base + MMCIMASK0); in mmci_irq()
1626 if (host->variant->busy_detect) in mmci_irq()
1627 writel(status & ~host->variant->busy_detect_mask, in mmci_irq()
1628 host->base + MMCICLEAR); in mmci_irq()
1630 writel(status, host->base + MMCICLEAR); in mmci_irq()
1632 dev_dbg(mmc_dev(host->mmc), "irq0 (data+cmd) %08x\n", status); in mmci_irq()
1634 if (host->variant->reversed_irq_handling) { in mmci_irq()
1635 mmci_data_irq(host, host->data, status); in mmci_irq()
1636 mmci_cmd_irq(host, host->cmd, status); in mmci_irq()
1638 mmci_cmd_irq(host, host->cmd, status); in mmci_irq()
1639 mmci_data_irq(host, host->data, status); in mmci_irq()
1646 if (host->variant->busy_detect_flag) in mmci_irq()
1647 status &= ~host->variant->busy_detect_flag; in mmci_irq()
1651 spin_unlock(&host->lock); in mmci_irq()
1653 return host->irq_action; in mmci_irq()
1664 struct mmci_host *host = dev_id; in mmci_irq_thread() local
1667 if (host->rst) { in mmci_irq_thread()
1668 reset_control_assert(host->rst); in mmci_irq_thread()
1670 reset_control_deassert(host->rst); in mmci_irq_thread()
1673 spin_lock_irqsave(&host->lock, flags); in mmci_irq_thread()
1674 writel(host->clk_reg, host->base + MMCICLOCK); in mmci_irq_thread()
1675 writel(host->pwr_reg, host->base + MMCIPOWER); in mmci_irq_thread()
1676 writel(MCI_IRQENABLE | host->variant->start_err, in mmci_irq_thread()
1677 host->base + MMCIMASK0); in mmci_irq_thread()
1679 host->irq_action = IRQ_HANDLED; in mmci_irq_thread()
1680 mmci_request_end(host, host->mrq); in mmci_irq_thread()
1681 spin_unlock_irqrestore(&host->lock, flags); in mmci_irq_thread()
1683 return host->irq_action; in mmci_irq_thread()
1688 struct mmci_host *host = mmc_priv(mmc); in mmci_request() local
1691 WARN_ON(host->mrq != NULL); in mmci_request()
1693 mrq->cmd->error = mmci_validate_data(host, mrq->data); in mmci_request()
1699 spin_lock_irqsave(&host->lock, flags); in mmci_request()
1701 host->mrq = mrq; in mmci_request()
1704 mmci_get_next_data(host, mrq->data); in mmci_request()
1707 (host->variant->datactrl_first || mrq->data->flags & MMC_DATA_READ)) in mmci_request()
1708 mmci_start_data(host, mrq->data); in mmci_request()
1711 mmci_start_command(host, mrq->sbc, 0); in mmci_request()
1713 mmci_start_command(host, mrq->cmd, 0); in mmci_request()
1715 spin_unlock_irqrestore(&host->lock, flags); in mmci_request()
1720 struct mmci_host *host = mmc_priv(mmc); in mmci_set_max_busy_timeout() local
1723 if (!host->variant->busy_detect) in mmci_set_max_busy_timeout()
1726 if (host->variant->busy_timeout && mmc->actual_clock) in mmci_set_max_busy_timeout()
1734 struct mmci_host *host = mmc_priv(mmc); in mmci_set_ios() local
1735 struct variant_data *variant = host->variant; in mmci_set_ios()
1740 if (host->plat->ios_handler && in mmci_set_ios()
1741 host->plat->ios_handler(mmc_dev(mmc), ios)) in mmci_set_ios()
1749 if (!IS_ERR(mmc->supply.vqmmc) && host->vqmmc_enabled) { in mmci_set_ios()
1751 host->vqmmc_enabled = false; in mmci_set_ios()
1768 if (!IS_ERR(mmc->supply.vqmmc) && !host->vqmmc_enabled) { in mmci_set_ios()
1774 host->vqmmc_enabled = true; in mmci_set_ios()
1787 pwr |= host->pwr_reg_add; in mmci_set_ios()
1806 pinctrl_select_state(host->pinctrl, host->pins_opendrain); in mmci_set_ios()
1818 if (host->variant->explicit_mclk_control && in mmci_set_ios()
1819 ios->clock != host->clock_cache) { in mmci_set_ios()
1820 ret = clk_set_rate(host->clk, ios->clock); in mmci_set_ios()
1822 dev_err(mmc_dev(host->mmc), in mmci_set_ios()
1825 host->mclk = clk_get_rate(host->clk); in mmci_set_ios()
1827 host->clock_cache = ios->clock; in mmci_set_ios()
1829 spin_lock_irqsave(&host->lock, flags); in mmci_set_ios()
1831 if (host->ops && host->ops->set_clkreg) in mmci_set_ios()
1832 host->ops->set_clkreg(host, ios->clock); in mmci_set_ios()
1834 mmci_set_clkreg(host, ios->clock); in mmci_set_ios()
1838 if (host->ops && host->ops->set_pwrreg) in mmci_set_ios()
1839 host->ops->set_pwrreg(host, pwr); in mmci_set_ios()
1841 mmci_write_pwrreg(host, pwr); in mmci_set_ios()
1843 mmci_reg_delay(host); in mmci_set_ios()
1845 spin_unlock_irqrestore(&host->lock, flags); in mmci_set_ios()
1850 struct mmci_host *host = mmc_priv(mmc); in mmci_get_cd() local
1851 struct mmci_platform_data *plat = host->plat; in mmci_get_cd()
1858 status = plat->status(mmc_dev(host->mmc)); in mmci_get_cd()
1865 struct mmci_host *host = mmc_priv(mmc); in mmci_sig_volt_switch() local
1870 if (!ret && host->ops && host->ops->post_sig_volt_switch) in mmci_sig_volt_switch()
1871 ret = host->ops->post_sig_volt_switch(host, ios); in mmci_sig_volt_switch()
1893 struct mmci_host *host = mmc_priv(mmc); in mmci_of_parse() local
1900 host->pwr_reg_add |= MCI_ST_DATA0DIREN; in mmci_of_parse()
1902 host->pwr_reg_add |= MCI_ST_DATA2DIREN; in mmci_of_parse()
1904 host->pwr_reg_add |= MCI_ST_DATA31DIREN; in mmci_of_parse()
1906 host->pwr_reg_add |= MCI_ST_DATA74DIREN; in mmci_of_parse()
1908 host->pwr_reg_add |= MCI_ST_CMDDIREN; in mmci_of_parse()
1910 host->pwr_reg_add |= MCI_ST_FBCLKEN; in mmci_of_parse()
1912 host->pwr_reg_add |= MCI_STM32_DIRPOL; in mmci_of_parse()
1914 host->clk_reg_add |= MCI_STM32_CLK_NEGEDGE; in mmci_of_parse()
1916 host->clk_reg_add |= MCI_STM32_CLK_SELCKIN; in mmci_of_parse()
1932 struct mmci_host *host; in mmci_probe() local
1956 host = mmc_priv(mmc); in mmci_probe()
1957 host->mmc = mmc; in mmci_probe()
1958 host->mmc_ops = &mmci_ops; in mmci_probe()
1966 host->pinctrl = devm_pinctrl_get(&dev->dev); in mmci_probe()
1967 if (IS_ERR(host->pinctrl)) { in mmci_probe()
1969 ret = PTR_ERR(host->pinctrl); in mmci_probe()
1973 host->pins_opendrain = pinctrl_lookup_state(host->pinctrl, in mmci_probe()
1975 if (IS_ERR(host->pins_opendrain)) { in mmci_probe()
1977 ret = PTR_ERR(host->pins_opendrain); in mmci_probe()
1982 host->hw_designer = amba_manf(dev); in mmci_probe()
1983 host->hw_revision = amba_rev(dev); in mmci_probe()
1984 dev_dbg(mmc_dev(mmc), "designer ID = 0x%02x\n", host->hw_designer); in mmci_probe()
1985 dev_dbg(mmc_dev(mmc), "revision = 0x%01x\n", host->hw_revision); in mmci_probe()
1987 host->clk = devm_clk_get(&dev->dev, NULL); in mmci_probe()
1988 if (IS_ERR(host->clk)) { in mmci_probe()
1989 ret = PTR_ERR(host->clk); in mmci_probe()
1993 ret = clk_prepare_enable(host->clk); in mmci_probe()
1998 host->get_rx_fifocnt = mmci_qcom_get_rx_fifocnt; in mmci_probe()
2000 host->get_rx_fifocnt = mmci_get_rx_fifocnt; in mmci_probe()
2002 host->plat = plat; in mmci_probe()
2003 host->variant = variant; in mmci_probe()
2004 host->mclk = clk_get_rate(host->clk); in mmci_probe()
2010 if (host->mclk > variant->f_max) { in mmci_probe()
2011 ret = clk_set_rate(host->clk, variant->f_max); in mmci_probe()
2014 host->mclk = clk_get_rate(host->clk); in mmci_probe()
2016 host->mclk); in mmci_probe()
2019 host->phybase = dev->res.start; in mmci_probe()
2020 host->base = devm_ioremap_resource(&dev->dev, &dev->res); in mmci_probe()
2021 if (IS_ERR(host->base)) { in mmci_probe()
2022 ret = PTR_ERR(host->base); in mmci_probe()
2027 variant->init(host); in mmci_probe()
2036 mmc->f_min = DIV_ROUND_UP(host->mclk, 257); in mmci_probe()
2038 mmc->f_min = DIV_ROUND_UP(host->mclk, 2046); in mmci_probe()
2040 mmc->f_min = clk_round_rate(host->clk, 100000); in mmci_probe()
2042 mmc->f_min = DIV_ROUND_UP(host->mclk, 512); in mmci_probe()
2052 min(host->mclk, mmc->f_max); in mmci_probe()
2055 fmax : min(host->mclk, fmax); in mmci_probe()
2060 host->rst = devm_reset_control_get_optional_exclusive(&dev->dev, NULL); in mmci_probe()
2061 if (IS_ERR(host->rst)) { in mmci_probe()
2062 ret = PTR_ERR(host->rst); in mmci_probe()
2089 mmci_write_datactrlreg(host, in mmci_probe()
2090 host->variant->busy_dpsm_flag); in mmci_probe()
2095 host->stop_abort.opcode = MMC_STOP_TRANSMISSION; in mmci_probe()
2096 host->stop_abort.arg = 0; in mmci_probe()
2097 host->stop_abort.flags = MMC_RSP_R1B | MMC_CMD_AC; in mmci_probe()
2131 spin_lock_init(&host->lock); in mmci_probe()
2133 writel(0, host->base + MMCIMASK0); in mmci_probe()
2136 writel(0, host->base + MMCIMASK1); in mmci_probe()
2138 writel(0xfff, host->base + MMCICLEAR); in mmci_probe()
2159 DRIVER_NAME " (cmd)", host); in mmci_probe()
2164 host->singleirq = true; in mmci_probe()
2167 IRQF_SHARED, DRIVER_NAME " (pio)", host); in mmci_probe()
2172 writel(MCI_IRQENABLE | variant->start_err, host->base + MMCIMASK0); in mmci_probe()
2181 mmci_dma_setup(host); in mmci_probe()
2192 clk_disable_unprepare(host->clk); in mmci_probe()
2203 struct mmci_host *host = mmc_priv(mmc); in mmci_remove() local
2204 struct variant_data *variant = host->variant; in mmci_remove()
2214 writel(0, host->base + MMCIMASK0); in mmci_remove()
2217 writel(0, host->base + MMCIMASK1); in mmci_remove()
2219 writel(0, host->base + MMCICOMMAND); in mmci_remove()
2220 writel(0, host->base + MMCIDATACTRL); in mmci_remove()
2222 mmci_dma_release(host); in mmci_remove()
2223 clk_disable_unprepare(host->clk); in mmci_remove()
2231 static void mmci_save(struct mmci_host *host) in mmci_save() argument
2235 spin_lock_irqsave(&host->lock, flags); in mmci_save()
2237 writel(0, host->base + MMCIMASK0); in mmci_save()
2238 if (host->variant->pwrreg_nopower) { in mmci_save()
2239 writel(0, host->base + MMCIDATACTRL); in mmci_save()
2240 writel(0, host->base + MMCIPOWER); in mmci_save()
2241 writel(0, host->base + MMCICLOCK); in mmci_save()
2243 mmci_reg_delay(host); in mmci_save()
2245 spin_unlock_irqrestore(&host->lock, flags); in mmci_save()
2248 static void mmci_restore(struct mmci_host *host) in mmci_restore() argument
2252 spin_lock_irqsave(&host->lock, flags); in mmci_restore()
2254 if (host->variant->pwrreg_nopower) { in mmci_restore()
2255 writel(host->clk_reg, host->base + MMCICLOCK); in mmci_restore()
2256 writel(host->datactrl_reg, host->base + MMCIDATACTRL); in mmci_restore()
2257 writel(host->pwr_reg, host->base + MMCIPOWER); in mmci_restore()
2259 writel(MCI_IRQENABLE | host->variant->start_err, in mmci_restore()
2260 host->base + MMCIMASK0); in mmci_restore()
2261 mmci_reg_delay(host); in mmci_restore()
2263 spin_unlock_irqrestore(&host->lock, flags); in mmci_restore()
2272 struct mmci_host *host = mmc_priv(mmc); in mmci_runtime_suspend() local
2274 mmci_save(host); in mmci_runtime_suspend()
2275 clk_disable_unprepare(host->clk); in mmci_runtime_suspend()
2287 struct mmci_host *host = mmc_priv(mmc); in mmci_runtime_resume() local
2288 clk_prepare_enable(host->clk); in mmci_runtime_resume()
2289 mmci_restore(host); in mmci_runtime_resume()