Lines Matching +full:mmc +full:-
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * davinci_mmc.c - TI DaVinci MMC/SD/SDIO driver
16 #include <linux/mmc/host.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/mmc/mmc.h>
25 #include <linux/mmc/slot-gpio.h>
28 #include <linux/platform_data/mmc-davinci.h>
38 #define DAVINCI_MMCTOR 0x14 /* Response Time-Out Register */
39 #define DAVINCI_MMCTOD 0x18 /* Data Read Time-Out Register */
145 #define MAX_CCNT ((1 << 16) - 1)
171 struct mmc_host *mmc; member
203 /* Version of the MMC/SD controller */
219 host->buffer_bytes_left = sg_dma_len(host->sg); in mmc_davinci_sg_to_buf()
220 host->buffer = sg_virt(host->sg); in mmc_davinci_sg_to_buf()
221 if (host->buffer_bytes_left > host->bytes_left) in mmc_davinci_sg_to_buf()
222 host->buffer_bytes_left = host->bytes_left; in mmc_davinci_sg_to_buf()
231 if (host->buffer_bytes_left == 0) { in davinci_fifo_data_trans()
232 host->sg = sg_next(host->data->sg); in davinci_fifo_data_trans()
236 p = host->buffer; in davinci_fifo_data_trans()
237 if (n > host->buffer_bytes_left) in davinci_fifo_data_trans()
238 n = host->buffer_bytes_left; in davinci_fifo_data_trans()
239 host->buffer_bytes_left -= n; in davinci_fifo_data_trans()
240 host->bytes_left -= n; in davinci_fifo_data_trans()
246 if (host->data_dir == DAVINCI_MMC_DATADIR_WRITE) { in davinci_fifo_data_trans()
248 writel(*((u32 *)p), host->base + DAVINCI_MMCDXR); in davinci_fifo_data_trans()
252 iowrite8_rep(host->base + DAVINCI_MMCDXR, p, (n & 3)); in davinci_fifo_data_trans()
257 *((u32 *)p) = readl(host->base + DAVINCI_MMCDRR); in davinci_fifo_data_trans()
261 ioread8_rep(host->base + DAVINCI_MMCDRR, p, (n & 3)); in davinci_fifo_data_trans()
265 host->buffer = p; in davinci_fifo_data_trans()
274 dev_dbg(mmc_dev(host->mmc), "CMD%d, arg 0x%08x%s\n", in mmc_davinci_start_command()
275 cmd->opcode, cmd->arg, in mmc_davinci_start_command()
294 host->cmd = cmd; in mmc_davinci_start_command()
315 dev_dbg(mmc_dev(host->mmc), "unknown resp_type %04x\n", in mmc_davinci_start_command()
321 cmd_reg |= cmd->opcode; in mmc_davinci_start_command()
324 if (host->do_dma) in mmc_davinci_start_command()
327 if (host->version == MMC_CTLR_VERSION_2 && host->data != NULL && in mmc_davinci_start_command()
328 host->data_dir == DAVINCI_MMC_DATADIR_READ) in mmc_davinci_start_command()
332 if (cmd->data) in mmc_davinci_start_command()
336 if (host->data_dir == DAVINCI_MMC_DATADIR_WRITE) in mmc_davinci_start_command()
339 if (host->bus_mode == MMC_BUSMODE_PUSHPULL) in mmc_davinci_start_command()
343 writel(0x1FFF, host->base + DAVINCI_MMCTOR); in mmc_davinci_start_command()
347 if (host->data_dir == DAVINCI_MMC_DATADIR_WRITE) { in mmc_davinci_start_command()
350 if (!host->do_dma) in mmc_davinci_start_command()
352 } else if (host->data_dir == DAVINCI_MMC_DATADIR_READ) { in mmc_davinci_start_command()
355 if (!host->do_dma) in mmc_davinci_start_command()
360 * Before non-DMA WRITE commands the controller needs priming: in mmc_davinci_start_command()
363 if (!host->do_dma && (host->data_dir == DAVINCI_MMC_DATADIR_WRITE)) in mmc_davinci_start_command()
366 writel(cmd->arg, host->base + DAVINCI_MMCARGHL); in mmc_davinci_start_command()
367 writel(cmd_reg, host->base + DAVINCI_MMCCMD); in mmc_davinci_start_command()
369 host->active_request = true; in mmc_davinci_start_command()
371 if (!host->do_dma && host->bytes_left <= poll_threshold) { in mmc_davinci_start_command()
374 while (host->active_request && count--) { in mmc_davinci_start_command()
380 if (host->active_request) in mmc_davinci_start_command()
381 writel(im_val, host->base + DAVINCI_MMCIM); in mmc_davinci_start_command()
384 /*----------------------------------------------------------------------*/
392 if (host->data_dir == DAVINCI_MMC_DATADIR_READ) in davinci_abort_dma()
393 sync_dev = host->dma_rx; in davinci_abort_dma()
395 sync_dev = host->dma_tx; in davinci_abort_dma()
407 if (host->data_dir == DAVINCI_MMC_DATADIR_WRITE) { in mmc_davinci_send_dma_request()
410 .dst_addr = host->mem_res->start + DAVINCI_MMCDXR, in mmc_davinci_send_dma_request()
415 chan = host->dma_tx; in mmc_davinci_send_dma_request()
416 dmaengine_slave_config(host->dma_tx, &dma_tx_conf); in mmc_davinci_send_dma_request()
418 desc = dmaengine_prep_slave_sg(host->dma_tx, in mmc_davinci_send_dma_request()
419 data->sg, in mmc_davinci_send_dma_request()
420 host->sg_len, in mmc_davinci_send_dma_request()
424 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_send_dma_request()
426 ret = -1; in mmc_davinci_send_dma_request()
432 .src_addr = host->mem_res->start + DAVINCI_MMCDRR, in mmc_davinci_send_dma_request()
437 chan = host->dma_rx; in mmc_davinci_send_dma_request()
438 dmaengine_slave_config(host->dma_rx, &dma_rx_conf); in mmc_davinci_send_dma_request()
440 desc = dmaengine_prep_slave_sg(host->dma_rx, in mmc_davinci_send_dma_request()
441 data->sg, in mmc_davinci_send_dma_request()
442 host->sg_len, in mmc_davinci_send_dma_request()
446 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_send_dma_request()
448 ret = -1; in mmc_davinci_send_dma_request()
464 int mask = rw_threshold - 1; in mmc_davinci_start_dma_transfer()
467 host->sg_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len, in mmc_davinci_start_dma_transfer()
471 for (i = 0; i < host->sg_len; i++) { in mmc_davinci_start_dma_transfer()
472 if (sg_dma_len(data->sg + i) & mask) { in mmc_davinci_start_dma_transfer()
473 dma_unmap_sg(mmc_dev(host->mmc), in mmc_davinci_start_dma_transfer()
474 data->sg, data->sg_len, in mmc_davinci_start_dma_transfer()
476 return -1; in mmc_davinci_start_dma_transfer()
480 host->do_dma = 1; in mmc_davinci_start_dma_transfer()
488 if (!host->use_dma) in davinci_release_dma_channels()
491 dma_release_channel(host->dma_tx); in davinci_release_dma_channels()
492 dma_release_channel(host->dma_rx); in davinci_release_dma_channels()
497 host->dma_tx = dma_request_chan(mmc_dev(host->mmc), "tx"); in davinci_acquire_dma_channels()
498 if (IS_ERR(host->dma_tx)) { in davinci_acquire_dma_channels()
499 dev_err(mmc_dev(host->mmc), "Can't get dma_tx channel\n"); in davinci_acquire_dma_channels()
500 return PTR_ERR(host->dma_tx); in davinci_acquire_dma_channels()
503 host->dma_rx = dma_request_chan(mmc_dev(host->mmc), "rx"); in davinci_acquire_dma_channels()
504 if (IS_ERR(host->dma_rx)) { in davinci_acquire_dma_channels()
505 dev_err(mmc_dev(host->mmc), "Can't get dma_rx channel\n"); in davinci_acquire_dma_channels()
506 dma_release_channel(host->dma_tx); in davinci_acquire_dma_channels()
507 return PTR_ERR(host->dma_rx); in davinci_acquire_dma_channels()
513 /*----------------------------------------------------------------------*/
520 struct mmc_data *data = req->data; in mmc_davinci_prepare_data()
522 if (host->version == MMC_CTLR_VERSION_2) in mmc_davinci_prepare_data()
525 host->data = data; in mmc_davinci_prepare_data()
527 host->data_dir = DAVINCI_MMC_DATADIR_NONE; in mmc_davinci_prepare_data()
528 writel(0, host->base + DAVINCI_MMCBLEN); in mmc_davinci_prepare_data()
529 writel(0, host->base + DAVINCI_MMCNBLK); in mmc_davinci_prepare_data()
533 dev_dbg(mmc_dev(host->mmc), "%s, %d blocks of %d bytes\n", in mmc_davinci_prepare_data()
534 (data->flags & MMC_DATA_WRITE) ? "write" : "read", in mmc_davinci_prepare_data()
535 data->blocks, data->blksz); in mmc_davinci_prepare_data()
536 dev_dbg(mmc_dev(host->mmc), " DTO %d cycles + %d ns\n", in mmc_davinci_prepare_data()
537 data->timeout_clks, data->timeout_ns); in mmc_davinci_prepare_data()
538 timeout = data->timeout_clks + in mmc_davinci_prepare_data()
539 (data->timeout_ns / host->ns_in_one_cycle); in mmc_davinci_prepare_data()
543 writel(timeout, host->base + DAVINCI_MMCTOD); in mmc_davinci_prepare_data()
544 writel(data->blocks, host->base + DAVINCI_MMCNBLK); in mmc_davinci_prepare_data()
545 writel(data->blksz, host->base + DAVINCI_MMCBLEN); in mmc_davinci_prepare_data()
548 if (data->flags & MMC_DATA_WRITE) { in mmc_davinci_prepare_data()
549 host->data_dir = DAVINCI_MMC_DATADIR_WRITE; in mmc_davinci_prepare_data()
551 host->base + DAVINCI_MMCFIFOCTL); in mmc_davinci_prepare_data()
553 host->base + DAVINCI_MMCFIFOCTL); in mmc_davinci_prepare_data()
555 host->data_dir = DAVINCI_MMC_DATADIR_READ; in mmc_davinci_prepare_data()
557 host->base + DAVINCI_MMCFIFOCTL); in mmc_davinci_prepare_data()
559 host->base + DAVINCI_MMCFIFOCTL); in mmc_davinci_prepare_data()
562 host->buffer = NULL; in mmc_davinci_prepare_data()
563 host->bytes_left = data->blocks * data->blksz; in mmc_davinci_prepare_data()
573 if (host->use_dma && (host->bytes_left & (rw_threshold - 1)) == 0 in mmc_davinci_prepare_data()
576 host->bytes_left = 0; in mmc_davinci_prepare_data()
579 host->sg_len = data->sg_len; in mmc_davinci_prepare_data()
580 host->sg = host->data->sg; in mmc_davinci_prepare_data()
585 static void mmc_davinci_request(struct mmc_host *mmc, struct mmc_request *req) in mmc_davinci_request() argument
587 struct mmc_davinci_host *host = mmc_priv(mmc); in mmc_davinci_request()
595 mmcst1 = readl(host->base + DAVINCI_MMCST1); in mmc_davinci_request()
601 dev_err(mmc_dev(host->mmc), "still BUSY? bad ... \n"); in mmc_davinci_request()
602 req->cmd->error = -ETIMEDOUT; in mmc_davinci_request()
603 mmc_request_done(mmc, req); in mmc_davinci_request()
607 host->do_dma = 0; in mmc_davinci_request()
609 mmc_davinci_start_command(host, req->cmd); in mmc_davinci_request()
617 mmc_pclk = host->mmc_input_clk; in calculate_freq_for_card()
620 / (2 * mmc_req_freq)) - 1; in calculate_freq_for_card()
631 host->ns_in_one_cycle = (1000000) / (((mmc_pclk in calculate_freq_for_card()
634 host->ns_in_one_cycle = (1000000) / (((mmc_pclk in calculate_freq_for_card()
640 static void calculate_clk_divider(struct mmc_host *mmc, struct mmc_ios *ios) in calculate_clk_divider() argument
644 struct mmc_davinci_host *host = mmc_priv(mmc); in calculate_clk_divider()
646 if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) { in calculate_clk_divider()
653 / (2 * MMCSD_INIT_CLOCK)) - 1; in calculate_clk_divider()
658 temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKRT_MASK; in calculate_clk_divider()
660 writel(temp, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()
663 host->ns_in_one_cycle = (1000000) / (MMCSD_INIT_CLOCK/1000); in calculate_clk_divider()
666 mmc_push_pull_freq = calculate_freq_for_card(host, ios->clock); in calculate_clk_divider()
671 temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKEN; in calculate_clk_divider()
672 writel(temp, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()
676 temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKRT_MASK; in calculate_clk_divider()
678 writel(temp, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()
680 writel(temp | MMCCLK_CLKEN, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()
686 static void mmc_davinci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) in mmc_davinci_set_ios() argument
688 struct mmc_davinci_host *host = mmc_priv(mmc); in mmc_davinci_set_ios()
689 struct platform_device *pdev = to_platform_device(mmc->parent); in mmc_davinci_set_ios()
690 struct davinci_mmc_config *config = pdev->dev.platform_data; in mmc_davinci_set_ios()
692 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_set_ios()
694 ios->clock, ios->bus_mode, ios->power_mode, in mmc_davinci_set_ios()
695 ios->vdd); in mmc_davinci_set_ios()
697 switch (ios->power_mode) { in mmc_davinci_set_ios()
699 if (config && config->set_power) in mmc_davinci_set_ios()
700 config->set_power(pdev->id, false); in mmc_davinci_set_ios()
703 if (config && config->set_power) in mmc_davinci_set_ios()
704 config->set_power(pdev->id, true); in mmc_davinci_set_ios()
708 switch (ios->bus_width) { in mmc_davinci_set_ios()
710 dev_dbg(mmc_dev(host->mmc), "Enabling 8 bit mode\n"); in mmc_davinci_set_ios()
711 writel((readl(host->base + DAVINCI_MMCCTL) & in mmc_davinci_set_ios()
713 host->base + DAVINCI_MMCCTL); in mmc_davinci_set_ios()
716 dev_dbg(mmc_dev(host->mmc), "Enabling 4 bit mode\n"); in mmc_davinci_set_ios()
717 if (host->version == MMC_CTLR_VERSION_2) in mmc_davinci_set_ios()
718 writel((readl(host->base + DAVINCI_MMCCTL) & in mmc_davinci_set_ios()
720 host->base + DAVINCI_MMCCTL); in mmc_davinci_set_ios()
722 writel(readl(host->base + DAVINCI_MMCCTL) | in mmc_davinci_set_ios()
724 host->base + DAVINCI_MMCCTL); in mmc_davinci_set_ios()
727 dev_dbg(mmc_dev(host->mmc), "Enabling 1 bit mode\n"); in mmc_davinci_set_ios()
728 if (host->version == MMC_CTLR_VERSION_2) in mmc_davinci_set_ios()
729 writel(readl(host->base + DAVINCI_MMCCTL) & in mmc_davinci_set_ios()
731 host->base + DAVINCI_MMCCTL); in mmc_davinci_set_ios()
733 writel(readl(host->base + DAVINCI_MMCCTL) & in mmc_davinci_set_ios()
735 host->base + DAVINCI_MMCCTL); in mmc_davinci_set_ios()
739 calculate_clk_divider(mmc, ios); in mmc_davinci_set_ios()
741 host->bus_mode = ios->bus_mode; in mmc_davinci_set_ios()
742 if (ios->power_mode == MMC_POWER_UP) { in mmc_davinci_set_ios()
747 writel(0, host->base + DAVINCI_MMCARGHL); in mmc_davinci_set_ios()
748 writel(MMCCMD_INITCK, host->base + DAVINCI_MMCCMD); in mmc_davinci_set_ios()
750 u32 tmp = readl(host->base + DAVINCI_MMCST0); in mmc_davinci_set_ios()
759 dev_warn(mmc_dev(host->mmc), "powerup timeout\n"); in mmc_davinci_set_ios()
768 host->data = NULL; in mmc_davinci_xfer_done()
770 if (host->mmc->caps & MMC_CAP_SDIO_IRQ) { in mmc_davinci_xfer_done()
772 * SDIO Interrupt Detection work-around as suggested by in mmc_davinci_xfer_done()
776 if (host->sdio_int && !(readl(host->base + DAVINCI_SDIOST0) & in mmc_davinci_xfer_done()
778 writel(SDIOIST_IOINT, host->base + DAVINCI_SDIOIST); in mmc_davinci_xfer_done()
779 mmc_signal_sdio_irq(host->mmc); in mmc_davinci_xfer_done()
783 if (host->do_dma) { in mmc_davinci_xfer_done()
786 dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, in mmc_davinci_xfer_done()
788 host->do_dma = false; in mmc_davinci_xfer_done()
790 host->data_dir = DAVINCI_MMC_DATADIR_NONE; in mmc_davinci_xfer_done()
792 if (!data->stop || (host->cmd && host->cmd->error)) { in mmc_davinci_xfer_done()
793 mmc_request_done(host->mmc, data->mrq); in mmc_davinci_xfer_done()
794 writel(0, host->base + DAVINCI_MMCIM); in mmc_davinci_xfer_done()
795 host->active_request = false; in mmc_davinci_xfer_done()
797 mmc_davinci_start_command(host, data->stop); in mmc_davinci_xfer_done()
803 host->cmd = NULL; in mmc_davinci_cmd_done()
805 if (cmd->flags & MMC_RSP_PRESENT) { in mmc_davinci_cmd_done()
806 if (cmd->flags & MMC_RSP_136) { in mmc_davinci_cmd_done()
808 cmd->resp[3] = readl(host->base + DAVINCI_MMCRSP01); in mmc_davinci_cmd_done()
809 cmd->resp[2] = readl(host->base + DAVINCI_MMCRSP23); in mmc_davinci_cmd_done()
810 cmd->resp[1] = readl(host->base + DAVINCI_MMCRSP45); in mmc_davinci_cmd_done()
811 cmd->resp[0] = readl(host->base + DAVINCI_MMCRSP67); in mmc_davinci_cmd_done()
814 cmd->resp[0] = readl(host->base + DAVINCI_MMCRSP67); in mmc_davinci_cmd_done()
818 if (host->data == NULL || cmd->error) { in mmc_davinci_cmd_done()
819 if (cmd->error == -ETIMEDOUT) in mmc_davinci_cmd_done()
820 cmd->mrq->cmd->retries = 0; in mmc_davinci_cmd_done()
821 mmc_request_done(host->mmc, cmd->mrq); in mmc_davinci_cmd_done()
822 writel(0, host->base + DAVINCI_MMCIM); in mmc_davinci_cmd_done()
823 host->active_request = false; in mmc_davinci_cmd_done()
832 temp = readl(host->base + DAVINCI_MMCCTL); in mmc_davinci_reset_ctrl()
838 writel(temp, host->base + DAVINCI_MMCCTL); in mmc_davinci_reset_ctrl()
854 status = readl(host->base + DAVINCI_SDIOIST); in mmc_davinci_sdio_irq()
856 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_sdio_irq()
858 writel(status | SDIOIST_IOINT, host->base + DAVINCI_SDIOIST); in mmc_davinci_sdio_irq()
859 mmc_signal_sdio_irq(host->mmc); in mmc_davinci_sdio_irq()
870 struct mmc_data *data = host->data; in mmc_davinci_irq()
872 if (host->cmd == NULL && host->data == NULL) { in mmc_davinci_irq()
873 status = readl(host->base + DAVINCI_MMCST0); in mmc_davinci_irq()
874 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_irq()
877 writel(0, host->base + DAVINCI_MMCIM); in mmc_davinci_irq()
881 status = readl(host->base + DAVINCI_MMCST0); in mmc_davinci_irq()
889 * non-dma. in mmc_davinci_irq()
891 if (host->bytes_left && (status & (MMCST0_DXRDY | MMCST0_DRRDY))) { in mmc_davinci_irq()
901 im_val = readl(host->base + DAVINCI_MMCIM); in mmc_davinci_irq()
902 writel(0, host->base + DAVINCI_MMCIM); in mmc_davinci_irq()
906 status = readl(host->base + DAVINCI_MMCST0); in mmc_davinci_irq()
908 } while (host->bytes_left && in mmc_davinci_irq()
915 * status is race-prone. in mmc_davinci_irq()
917 writel(im_val, host->base + DAVINCI_MMCIM); in mmc_davinci_irq()
923 if ((host->do_dma == 0) && (host->bytes_left > 0)) { in mmc_davinci_irq()
927 davinci_fifo_data_trans(host, host->bytes_left); in mmc_davinci_irq()
930 data->bytes_xfered = data->blocks * data->blksz; in mmc_davinci_irq()
932 dev_err(mmc_dev(host->mmc), in mmc_davinci_irq()
933 "DATDNE with no host->data\n"); in mmc_davinci_irq()
939 data->error = -ETIMEDOUT; in mmc_davinci_irq()
942 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_irq()
951 data->error = -EILSEQ; in mmc_davinci_irq()
957 * case and the two three-bit patterns in various SD specs in mmc_davinci_irq()
961 u32 temp = readb(host->base + DAVINCI_MMCDRSP); in mmc_davinci_irq()
964 data->error = -ETIMEDOUT; in mmc_davinci_irq()
966 dev_dbg(mmc_dev(host->mmc), "data %s %s error\n", in mmc_davinci_irq()
968 (data->error == -ETIMEDOUT) ? "timeout" : "CRC"); in mmc_davinci_irq()
975 if (host->cmd) { in mmc_davinci_irq()
976 dev_dbg(mmc_dev(host->mmc), in mmc_davinci_irq()
978 host->cmd->opcode, qstatus); in mmc_davinci_irq()
979 host->cmd->error = -ETIMEDOUT; in mmc_davinci_irq()
990 dev_dbg(mmc_dev(host->mmc), "Command CRC error\n"); in mmc_davinci_irq()
991 if (host->cmd) { in mmc_davinci_irq()
992 host->cmd->error = -EILSEQ; in mmc_davinci_irq()
999 end_command = host->cmd ? 1 : 0; in mmc_davinci_irq()
1003 mmc_davinci_cmd_done(host, host->cmd); in mmc_davinci_irq()
1009 static int mmc_davinci_get_cd(struct mmc_host *mmc) in mmc_davinci_get_cd() argument
1011 struct platform_device *pdev = to_platform_device(mmc->parent); in mmc_davinci_get_cd()
1012 struct davinci_mmc_config *config = pdev->dev.platform_data; in mmc_davinci_get_cd()
1014 if (config && config->get_cd) in mmc_davinci_get_cd()
1015 return config->get_cd(pdev->id); in mmc_davinci_get_cd()
1017 return mmc_gpio_get_cd(mmc); in mmc_davinci_get_cd()
1020 static int mmc_davinci_get_ro(struct mmc_host *mmc) in mmc_davinci_get_ro() argument
1022 struct platform_device *pdev = to_platform_device(mmc->parent); in mmc_davinci_get_ro()
1023 struct davinci_mmc_config *config = pdev->dev.platform_data; in mmc_davinci_get_ro()
1025 if (config && config->get_ro) in mmc_davinci_get_ro()
1026 return config->get_ro(pdev->id); in mmc_davinci_get_ro()
1028 return mmc_gpio_get_ro(mmc); in mmc_davinci_get_ro()
1031 static void mmc_davinci_enable_sdio_irq(struct mmc_host *mmc, int enable) in mmc_davinci_enable_sdio_irq() argument
1033 struct mmc_davinci_host *host = mmc_priv(mmc); in mmc_davinci_enable_sdio_irq()
1036 if (!(readl(host->base + DAVINCI_SDIOST0) & SDIOST0_DAT1_HI)) { in mmc_davinci_enable_sdio_irq()
1037 writel(SDIOIST_IOINT, host->base + DAVINCI_SDIOIST); in mmc_davinci_enable_sdio_irq()
1038 mmc_signal_sdio_irq(host->mmc); in mmc_davinci_enable_sdio_irq()
1040 host->sdio_int = true; in mmc_davinci_enable_sdio_irq()
1041 writel(readl(host->base + DAVINCI_SDIOIEN) | in mmc_davinci_enable_sdio_irq()
1042 SDIOIEN_IOINTEN, host->base + DAVINCI_SDIOIEN); in mmc_davinci_enable_sdio_irq()
1045 host->sdio_int = false; in mmc_davinci_enable_sdio_irq()
1046 writel(readl(host->base + DAVINCI_SDIOIEN) & ~SDIOIEN_IOINTEN, in mmc_davinci_enable_sdio_irq()
1047 host->base + DAVINCI_SDIOIEN); in mmc_davinci_enable_sdio_irq()
1059 /*----------------------------------------------------------------------*/
1067 struct mmc_host *mmc; in mmc_davinci_cpufreq_transition() local
1071 mmc = host->mmc; in mmc_davinci_cpufreq_transition()
1072 mmc_pclk = clk_get_rate(host->clk); in mmc_davinci_cpufreq_transition()
1075 spin_lock_irqsave(&mmc->lock, flags); in mmc_davinci_cpufreq_transition()
1076 host->mmc_input_clk = mmc_pclk; in mmc_davinci_cpufreq_transition()
1077 calculate_clk_divider(mmc, &mmc->ios); in mmc_davinci_cpufreq_transition()
1078 spin_unlock_irqrestore(&mmc->lock, flags); in mmc_davinci_cpufreq_transition()
1086 host->freq_transition.notifier_call = mmc_davinci_cpufreq_transition; in mmc_davinci_cpufreq_register()
1088 return cpufreq_register_notifier(&host->freq_transition, in mmc_davinci_cpufreq_register()
1094 cpufreq_unregister_notifier(&host->freq_transition, in mmc_davinci_cpufreq_deregister()
1112 writel(0, host->base + DAVINCI_MMCCLK); in init_mmcsd_host()
1113 writel(MMCCLK_CLKEN, host->base + DAVINCI_MMCCLK); in init_mmcsd_host()
1115 writel(0x1FFF, host->base + DAVINCI_MMCTOR); in init_mmcsd_host()
1116 writel(0xFFFF, host->base + DAVINCI_MMCTOD); in init_mmcsd_host()
1123 .name = "dm6441-mmc",
1126 .name = "da830-mmc",
1135 .compatible = "ti,dm6441-mmc",
1139 .compatible = "ti,da830-mmc",
1146 static int mmc_davinci_parse_pdata(struct mmc_host *mmc) in mmc_davinci_parse_pdata() argument
1148 struct platform_device *pdev = to_platform_device(mmc->parent); in mmc_davinci_parse_pdata()
1149 struct davinci_mmc_config *pdata = pdev->dev.platform_data; in mmc_davinci_parse_pdata()
1154 return -EINVAL; in mmc_davinci_parse_pdata()
1156 host = mmc_priv(mmc); in mmc_davinci_parse_pdata()
1158 return -EINVAL; in mmc_davinci_parse_pdata()
1160 if (pdata && pdata->nr_sg) in mmc_davinci_parse_pdata()
1161 host->nr_sg = pdata->nr_sg - 1; in mmc_davinci_parse_pdata()
1163 if (pdata && (pdata->wires == 4 || pdata->wires == 0)) in mmc_davinci_parse_pdata()
1164 mmc->caps |= MMC_CAP_4_BIT_DATA; in mmc_davinci_parse_pdata()
1166 if (pdata && (pdata->wires == 8)) in mmc_davinci_parse_pdata()
1167 mmc->caps |= (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA); in mmc_davinci_parse_pdata()
1169 mmc->f_min = 312500; in mmc_davinci_parse_pdata()
1170 mmc->f_max = 25000000; in mmc_davinci_parse_pdata()
1171 if (pdata && pdata->max_freq) in mmc_davinci_parse_pdata()
1172 mmc->f_max = pdata->max_freq; in mmc_davinci_parse_pdata()
1173 if (pdata && pdata->caps) in mmc_davinci_parse_pdata()
1174 mmc->caps |= pdata->caps; in mmc_davinci_parse_pdata()
1177 ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0); in mmc_davinci_parse_pdata()
1178 if (ret == -EPROBE_DEFER) in mmc_davinci_parse_pdata()
1181 mmc->caps |= MMC_CAP_NEEDS_POLL; in mmc_davinci_parse_pdata()
1183 ret = mmc_gpiod_request_ro(mmc, "wp", 0, 0); in mmc_davinci_parse_pdata()
1184 if (ret == -EPROBE_DEFER) in mmc_davinci_parse_pdata()
1194 struct mmc_host *mmc = NULL; in davinci_mmcsd_probe() local
1202 return -ENODEV; in davinci_mmcsd_probe()
1208 mem = devm_request_mem_region(&pdev->dev, r->start, mem_size, in davinci_mmcsd_probe()
1209 pdev->name); in davinci_mmcsd_probe()
1211 return -EBUSY; in davinci_mmcsd_probe()
1213 mmc = mmc_alloc_host(sizeof(struct mmc_davinci_host), &pdev->dev); in davinci_mmcsd_probe()
1214 if (!mmc) in davinci_mmcsd_probe()
1215 return -ENOMEM; in davinci_mmcsd_probe()
1217 host = mmc_priv(mmc); in davinci_mmcsd_probe()
1218 host->mmc = mmc; /* Important */ in davinci_mmcsd_probe()
1220 host->mem_res = mem; in davinci_mmcsd_probe()
1221 host->base = devm_ioremap(&pdev->dev, mem->start, mem_size); in davinci_mmcsd_probe()
1222 if (!host->base) { in davinci_mmcsd_probe()
1223 ret = -ENOMEM; in davinci_mmcsd_probe()
1227 host->clk = devm_clk_get(&pdev->dev, NULL); in davinci_mmcsd_probe()
1228 if (IS_ERR(host->clk)) { in davinci_mmcsd_probe()
1229 ret = PTR_ERR(host->clk); in davinci_mmcsd_probe()
1232 ret = clk_prepare_enable(host->clk); in davinci_mmcsd_probe()
1236 host->mmc_input_clk = clk_get_rate(host->clk); in davinci_mmcsd_probe()
1238 match = of_match_device(davinci_mmc_dt_ids, &pdev->dev); in davinci_mmcsd_probe()
1240 pdev->id_entry = match->data; in davinci_mmcsd_probe()
1241 ret = mmc_of_parse(mmc); in davinci_mmcsd_probe()
1243 dev_err_probe(&pdev->dev, ret, in davinci_mmcsd_probe()
1248 ret = mmc_davinci_parse_pdata(mmc); in davinci_mmcsd_probe()
1250 dev_err(&pdev->dev, in davinci_mmcsd_probe()
1255 if (host->nr_sg > MAX_NR_SG || !host->nr_sg) in davinci_mmcsd_probe()
1256 host->nr_sg = MAX_NR_SG; in davinci_mmcsd_probe()
1260 host->use_dma = use_dma; in davinci_mmcsd_probe()
1261 host->mmc_irq = irq; in davinci_mmcsd_probe()
1262 host->sdio_irq = platform_get_irq(pdev, 1); in davinci_mmcsd_probe()
1264 if (host->use_dma) { in davinci_mmcsd_probe()
1266 if (ret == -EPROBE_DEFER) in davinci_mmcsd_probe()
1269 host->use_dma = 0; in davinci_mmcsd_probe()
1272 mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY; in davinci_mmcsd_probe()
1276 host->version = id_entry->driver_data; in davinci_mmcsd_probe()
1278 mmc->ops = &mmc_davinci_ops; in davinci_mmcsd_probe()
1279 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; in davinci_mmcsd_probe()
1285 mmc->max_segs = MAX_NR_SG; in davinci_mmcsd_probe()
1288 mmc->max_seg_size = MAX_CCNT * rw_threshold; in davinci_mmcsd_probe()
1290 /* MMC/SD controller limits for multiblock requests */ in davinci_mmcsd_probe()
1291 mmc->max_blk_size = 4095; /* BLEN is 12 bits */ in davinci_mmcsd_probe()
1292 mmc->max_blk_count = 65535; /* NBLK is 16 bits */ in davinci_mmcsd_probe()
1293 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; in davinci_mmcsd_probe()
1295 dev_dbg(mmc_dev(host->mmc), "max_segs=%d\n", mmc->max_segs); in davinci_mmcsd_probe()
1296 dev_dbg(mmc_dev(host->mmc), "max_blk_size=%d\n", mmc->max_blk_size); in davinci_mmcsd_probe()
1297 dev_dbg(mmc_dev(host->mmc), "max_req_size=%d\n", mmc->max_req_size); in davinci_mmcsd_probe()
1298 dev_dbg(mmc_dev(host->mmc), "max_seg_size=%d\n", mmc->max_seg_size); in davinci_mmcsd_probe()
1304 dev_err(&pdev->dev, "failed to register cpufreq\n"); in davinci_mmcsd_probe()
1308 ret = mmc_add_host(mmc); in davinci_mmcsd_probe()
1312 ret = devm_request_irq(&pdev->dev, irq, mmc_davinci_irq, 0, in davinci_mmcsd_probe()
1313 mmc_hostname(mmc), host); in davinci_mmcsd_probe()
1317 if (host->sdio_irq >= 0) { in davinci_mmcsd_probe()
1318 ret = devm_request_irq(&pdev->dev, host->sdio_irq, in davinci_mmcsd_probe()
1320 mmc_hostname(mmc), host); in davinci_mmcsd_probe()
1322 mmc->caps |= MMC_CAP_SDIO_IRQ; in davinci_mmcsd_probe()
1325 rename_region(mem, mmc_hostname(mmc)); in davinci_mmcsd_probe()
1327 dev_info(mmc_dev(host->mmc), "Using %s, %d-bit mode\n", in davinci_mmcsd_probe()
1328 host->use_dma ? "DMA" : "PIO", in davinci_mmcsd_probe()
1329 (mmc->caps & MMC_CAP_4_BIT_DATA) ? 4 : 1); in davinci_mmcsd_probe()
1334 mmc_remove_host(mmc); in davinci_mmcsd_probe()
1341 clk_disable_unprepare(host->clk); in davinci_mmcsd_probe()
1345 mmc_free_host(mmc); in davinci_mmcsd_probe()
1354 mmc_remove_host(host->mmc); in davinci_mmcsd_remove()
1357 clk_disable_unprepare(host->clk); in davinci_mmcsd_remove()
1358 mmc_free_host(host->mmc); in davinci_mmcsd_remove()
1368 writel(0, host->base + DAVINCI_MMCIM); in davinci_mmcsd_suspend()
1370 clk_disable(host->clk); in davinci_mmcsd_suspend()
1379 clk_enable(host->clk); in davinci_mmcsd_resume()
1411 MODULE_DESCRIPTION("MMC/SD driver for Davinci MMC controller");