1 // SPDX-License-Identifier: GPL-2.0
4  * Copyright 2016-2019 HabanaLabs, Ltd.
21  * hl_pci_bars_map() - Map PCI BARs.
24  * @is_wc: Array with flag per BAR whether a write-combined mapping is needed.
28  * Return: 0 on success, non-zero for failure.
33 	struct pci_dev *pdev = hdev->pdev;  in hl_pci_bars_map()
38 		dev_err(hdev->dev, "Cannot obtain PCI resources\n");  in hl_pci_bars_map()
43 		bar = i * 2; /* 64-bit BARs */  in hl_pci_bars_map()
44 		hdev->pcie_bar[bar] = is_wc[i] ?  in hl_pci_bars_map()
47 		if (!hdev->pcie_bar[bar]) {  in hl_pci_bars_map()
48 			dev_err(hdev->dev, "pci_ioremap%s_bar failed for %s\n",  in hl_pci_bars_map()
50 			rc = -ENODEV;  in hl_pci_bars_map()
58 	for (i = 2 ; i >= 0 ; i--) {  in hl_pci_bars_map()
59 		bar = i * 2; /* 64-bit BARs */  in hl_pci_bars_map()
60 		if (hdev->pcie_bar[bar])  in hl_pci_bars_map()
61 			iounmap(hdev->pcie_bar[bar]);  in hl_pci_bars_map()
70  * hl_pci_bars_unmap() - Unmap PCI BARS.
77 	struct pci_dev *pdev = hdev->pdev;  in hl_pci_bars_unmap()
80 	for (i = 2 ; i >= 0 ; i--) {  in hl_pci_bars_unmap()
81 		bar = i * 2; /* 64-bit BARs */  in hl_pci_bars_unmap()
82 		iounmap(hdev->pcie_bar[bar]);  in hl_pci_bars_unmap()
89  * hl_pci_elbi_write() - Write through the ELBI interface.
94  * Return: 0 on success, negative value for failure.
98 	struct pci_dev *pdev = hdev->pdev;  in hl_pci_elbi_write()
103 	if (hdev->pldm)  in hl_pci_elbi_write()
134 		dev_err(hdev->dev, "Error writing to ELBI\n");  in hl_pci_elbi_write()
135 		return -EIO;  in hl_pci_elbi_write()
139 		dev_err(hdev->dev, "ELBI write didn't finish in time\n");  in hl_pci_elbi_write()
140 		return -EIO;  in hl_pci_elbi_write()
143 	dev_err(hdev->dev, "ELBI write has undefined bits in status\n");  in hl_pci_elbi_write()
144 	return -EIO;  in hl_pci_elbi_write()
148  * hl_pci_iatu_write() - iatu write routine.
153  * Return: 0 on success, negative value for failure.
157 	struct asic_fixed_properties *prop = &hdev->asic_prop;  in hl_pci_iatu_write()
163 	rc = hl_pci_elbi_write(hdev, prop->pcie_aux_dbi_reg_addr, 0x00300000);  in hl_pci_iatu_write()
164 	rc |= hl_pci_elbi_write(hdev, prop->pcie_dbi_base_address + dbi_offset,  in hl_pci_iatu_write()
168 		return -EIO;  in hl_pci_iatu_write()
174  * hl_pci_reset_link_through_bridge() - Reset PCI link.
179 	struct pci_dev *pdev = hdev->pdev;  in hl_pci_reset_link_through_bridge()
183 	parent_port = pdev->bus->self;  in hl_pci_reset_link_through_bridge()
195  * hl_pci_set_inbound_region() - Configure inbound region
202  * Return: 0 on success, negative value for failure.
207 	struct asic_fixed_properties *prop = &hdev->asic_prop;  in hl_pci_set_inbound_region()
215 	if (pci_region->mode == PCI_ADDRESS_MATCH_MODE) {  in hl_pci_set_inbound_region()
216 		bar_phys_base = hdev->pcie_bar_phys[pci_region->bar];  in hl_pci_set_inbound_region()
217 		region_base = bar_phys_base + pci_region->offset_in_bar;  in hl_pci_set_inbound_region()
218 		region_end_address = region_base + pci_region->size - 1;  in hl_pci_set_inbound_region()
230 			lower_32_bits(pci_region->addr));  in hl_pci_set_inbound_region()
232 			upper_32_bits(pci_region->addr));  in hl_pci_set_inbound_region()
238 			pci_region->mode);  in hl_pci_set_inbound_region()
241 	if (pci_region->mode == PCI_BAR_MATCH_MODE)  in hl_pci_set_inbound_region()
243 				pci_region->bar);  in hl_pci_set_inbound_region()
248 	rc |= hl_pci_elbi_write(hdev, prop->pcie_aux_dbi_reg_addr, 0);  in hl_pci_set_inbound_region()
249 	rc |= hl_pci_elbi_write(hdev, prop->pcie_aux_dbi_reg_addr + 4, 0);  in hl_pci_set_inbound_region()
252 		dev_err(hdev->dev, "failed to map bar %u to 0x%08llx\n",  in hl_pci_set_inbound_region()
253 				pci_region->bar, pci_region->addr);  in hl_pci_set_inbound_region()
259  * hl_pci_set_outbound_region() - Configure outbound region 0
265  * Return: 0 on success, negative value for failure.
270 	struct asic_fixed_properties *prop = &hdev->asic_prop;  in hl_pci_set_outbound_region()
276 			pci_region->addr + pci_region->size - 1;  in hl_pci_set_outbound_region()
278 				lower_32_bits(pci_region->addr));  in hl_pci_set_outbound_region()
280 				upper_32_bits(pci_region->addr));  in hl_pci_set_outbound_region()
285 	if ((hdev->power9_64bit_dma_enable) && (hdev->dma_mask == 64))  in hl_pci_set_outbound_region()
298 	rc |= hl_pci_elbi_write(hdev, prop->pcie_aux_dbi_reg_addr, 0);  in hl_pci_set_outbound_region()
299 	rc |= hl_pci_elbi_write(hdev, prop->pcie_aux_dbi_reg_addr + 4, 0);  in hl_pci_set_outbound_region()
305  * hl_pci_set_dma_mask() - Set DMA masks for the device.
309  * value. If it doesn't succeed, it tries to set it to a fall-back value
311  * Return: 0 on success, non-zero for failure.
315 	struct pci_dev *pdev = hdev->pdev;  in hl_pci_set_dma_mask()
319 	rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(hdev->dma_mask));  in hl_pci_set_dma_mask()
321 		dev_err(hdev->dev,  in hl_pci_set_dma_mask()
323 			hdev->dma_mask, rc);  in hl_pci_set_dma_mask()
327 	rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(hdev->dma_mask));  in hl_pci_set_dma_mask()
329 		dev_err(hdev->dev,  in hl_pci_set_dma_mask()
331 			hdev->dma_mask, rc);  in hl_pci_set_dma_mask()
339  * hl_pci_init() - PCI initialization code.
348  * Return: 0 on success, non-zero for failure.
353 	struct pci_dev *pdev = hdev->pdev;  in hl_pci_init()
356 	if (hdev->reset_pcilink)  in hl_pci_init()
361 		dev_err(hdev->dev, "can't enable PCI device\n");  in hl_pci_init()
367 	rc = hdev->asic_funcs->pci_bars_map(hdev);  in hl_pci_init()
369 		dev_err(hdev->dev, "Failed to initialize PCI BARs\n");  in hl_pci_init()
373 	rc = hdev->asic_funcs->init_iatu(hdev);  in hl_pci_init()
375 		dev_err(hdev->dev, "Failed to initialize iATU\n");  in hl_pci_init()
384 	 * version to determine whether we run with a security-enabled firmware  in hl_pci_init()
404  * hl_fw_fini() - PCI finalization code.
413 	pci_clear_master(hdev->pdev);  in hl_pci_fini()
414 	pci_disable_device(hdev->pdev);  in hl_pci_fini()