Lines Matching +full:reg +full:- +full:shift
1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <dt-bindings/memory/tegra30-mc.h>
44 .reg = 0x228,
48 .reg = 0x2e8,
49 .shift = 0,
58 .reg = 0x228,
62 .reg = 0x2f4,
63 .shift = 0,
72 .reg = 0x228,
76 .reg = 0x2e8,
77 .shift = 16,
86 .reg = 0x228,
90 .reg = 0x2f4,
91 .shift = 16,
100 .reg = 0x228,
104 .reg = 0x2ec,
105 .shift = 0,
114 .reg = 0x228,
118 .reg = 0x2f8,
119 .shift = 0,
128 .reg = 0x228,
132 .reg = 0x2ec,
133 .shift = 16,
142 .reg = 0x228,
146 .reg = 0x2f8,
147 .shift = 16,
156 .reg = 0x228,
160 .reg = 0x300,
161 .shift = 0,
170 .reg = 0x228,
174 .reg = 0x308,
175 .shift = 0,
184 .reg = 0x228,
188 .reg = 0x308,
189 .shift = 16,
198 .reg = 0x228,
202 .reg = 0x328,
203 .shift = 0,
212 .reg = 0x228,
216 .reg = 0x364,
217 .shift = 0,
226 .reg = 0x228,
230 .reg = 0x2e0,
231 .shift = 0,
240 .reg = 0x228,
244 .reg = 0x2e4,
245 .shift = 0,
254 .reg = 0x228,
258 .reg = 0x2f0,
259 .shift = 0,
268 .reg = 0x228,
272 .reg = 0x2fc,
273 .shift = 0,
282 .reg = 0x228,
286 .reg = 0x334,
287 .shift = 0,
296 .reg = 0x228,
300 .reg = 0x33c,
301 .shift = 0,
310 .reg = 0x228,
314 .reg = 0x30c,
315 .shift = 0,
324 .reg = 0x228,
328 .reg = 0x318,
329 .shift = 0,
338 .reg = 0x228,
342 .reg = 0x310,
343 .shift = 0,
352 .reg = 0x228,
356 .reg = 0x310,
357 .shift = 16,
366 .reg = 0x228,
370 .reg = 0x334,
371 .shift = 16,
380 .reg = 0x228,
384 .reg = 0x33c,
385 .shift = 16,
394 .reg = 0x228,
398 .reg = 0x328,
399 .shift = 16,
408 .reg = 0x228,
412 .reg = 0x32c,
413 .shift = 0,
422 .reg = 0x228,
426 .reg = 0x32c,
427 .shift = 16,
436 .reg = 0x228,
440 .reg = 0x344,
441 .shift = 0,
450 .reg = 0x228,
454 .reg = 0x344,
455 .shift = 16,
464 .reg = 0x228,
468 .reg = 0x350,
469 .shift = 0,
478 .reg = 0x22c,
482 .reg = 0x338,
483 .shift = 0,
492 .reg = 0x22c,
496 .reg = 0x340,
497 .shift = 0,
506 .reg = 0x22c,
510 .reg = 0x354,
511 .shift = 0,
520 .reg = 0x22c,
524 .reg = 0x354,
525 .shift = 16,
534 .reg = 0x22c,
538 .reg = 0x358,
539 .shift = 0,
548 .reg = 0x22c,
552 .reg = 0x358,
553 .shift = 16,
562 .reg = 0x324,
563 .shift = 0,
572 .reg = 0x320,
573 .shift = 0,
582 .reg = 0x22c,
586 .reg = 0x300,
587 .shift = 16,
596 .reg = 0x22c,
600 .reg = 0x304,
601 .shift = 0,
610 .reg = 0x22c,
614 .reg = 0x304,
615 .shift = 16,
624 .reg = 0x22c,
628 .reg = 0x330,
629 .shift = 0,
638 .reg = 0x22c,
642 .reg = 0x364,
643 .shift = 16,
652 .reg = 0x22c,
656 .reg = 0x368,
657 .shift = 0,
666 .reg = 0x22c,
670 .reg = 0x368,
671 .shift = 16,
680 .reg = 0x22c,
684 .reg = 0x36c,
685 .shift = 0,
694 .reg = 0x22c,
698 .reg = 0x30c,
699 .shift = 16,
708 .reg = 0x22c,
712 .reg = 0x2e0,
713 .shift = 16,
722 .reg = 0x22c,
726 .reg = 0x2e4,
727 .shift = 16,
736 .reg = 0x22c,
740 .reg = 0x338,
741 .shift = 16,
750 .reg = 0x22c,
754 .reg = 0x340,
755 .shift = 16,
764 .reg = 0x22c,
768 .reg = 0x318,
769 .shift = 16,
778 .reg = 0x22c,
782 .reg = 0x314,
783 .shift = 0,
792 .reg = 0x22c,
796 .reg = 0x31c,
797 .shift = 0,
806 .reg = 0x324,
807 .shift = 16,
816 .reg = 0x320,
817 .shift = 16,
826 .reg = 0x22c,
830 .reg = 0x330,
831 .shift = 16,
840 .reg = 0x22c,
844 .reg = 0x348,
845 .shift = 0,
854 .reg = 0x22c,
858 .reg = 0x348,
859 .shift = 16,
868 .reg = 0x22c,
872 .reg = 0x350,
873 .shift = 16,
882 .reg = 0x22c,
886 .reg = 0x35c,
887 .shift = 0,
896 .reg = 0x22c,
900 .reg = 0x35c,
901 .shift = 16,
910 .reg = 0x230,
914 .reg = 0x360,
915 .shift = 0,
924 .reg = 0x230,
928 .reg = 0x360,
929 .shift = 16,
937 { .name = "dc", .swgroup = TEGRA_SWGROUP_DC, .reg = 0x240 },
938 { .name = "dcb", .swgroup = TEGRA_SWGROUP_DCB, .reg = 0x244 },
939 { .name = "epp", .swgroup = TEGRA_SWGROUP_EPP, .reg = 0x248 },
940 { .name = "g2", .swgroup = TEGRA_SWGROUP_G2, .reg = 0x24c },
941 { .name = "mpe", .swgroup = TEGRA_SWGROUP_MPE, .reg = 0x264 },
942 { .name = "vi", .swgroup = TEGRA_SWGROUP_VI, .reg = 0x280 },
943 { .name = "afi", .swgroup = TEGRA_SWGROUP_AFI, .reg = 0x238 },
944 { .name = "avpc", .swgroup = TEGRA_SWGROUP_AVPC, .reg = 0x23c },
945 { .name = "nv", .swgroup = TEGRA_SWGROUP_NV, .reg = 0x268 },
946 { .name = "nv2", .swgroup = TEGRA_SWGROUP_NV2, .reg = 0x26c },
947 { .name = "hda", .swgroup = TEGRA_SWGROUP_HDA, .reg = 0x254 },
948 { .name = "hc", .swgroup = TEGRA_SWGROUP_HC, .reg = 0x250 },
949 { .name = "ppcs", .swgroup = TEGRA_SWGROUP_PPCS, .reg = 0x270 },
950 { .name = "sata", .swgroup = TEGRA_SWGROUP_SATA, .reg = 0x278 },
951 { .name = "vde", .swgroup = TEGRA_SWGROUP_VDE, .reg = 0x27c },
952 { .name = "isp", .swgroup = TEGRA_SWGROUP_ISP, .reg = 0x258 },