Lines Matching +full:reg +full:- +full:shift
1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <dt-bindings/memory/tegra114-mc.h>
23 .reg = 0x228,
27 .reg = 0x2e8,
28 .shift = 0,
37 .reg = 0x228,
41 .reg = 0x2f4,
42 .shift = 0,
51 .reg = 0x228,
55 .reg = 0x2e8,
56 .shift = 16,
65 .reg = 0x228,
69 .reg = 0x2f4,
70 .shift = 16,
79 .reg = 0x228,
83 .reg = 0x2ec,
84 .shift = 0,
93 .reg = 0x228,
97 .reg = 0x2f8,
98 .shift = 0,
107 .reg = 0x228,
111 .reg = 0x300,
112 .shift = 0,
121 .reg = 0x228,
125 .reg = 0x308,
126 .shift = 0,
135 .reg = 0x228,
139 .reg = 0x308,
140 .shift = 16,
149 .reg = 0x228,
153 .reg = 0x2e4,
154 .shift = 0,
163 .reg = 0x228,
167 .reg = 0x2f0,
168 .shift = 0,
177 .reg = 0x228,
181 .reg = 0x2fc,
182 .shift = 0,
191 .reg = 0x228,
195 .reg = 0x334,
196 .shift = 0,
205 .reg = 0x228,
209 .reg = 0x33c,
210 .shift = 0,
219 .reg = 0x228,
223 .reg = 0x30c,
224 .shift = 0,
233 .reg = 0x228,
237 .reg = 0x318,
238 .shift = 0,
247 .reg = 0x228,
251 .reg = 0x310,
252 .shift = 0,
261 .reg = 0x228,
265 .reg = 0x310,
266 .shift = 16,
275 .reg = 0x228,
279 .reg = 0x334,
280 .shift = 16,
289 .reg = 0x228,
293 .reg = 0x328,
294 .shift = 0,
303 .reg = 0x228,
307 .reg = 0x344,
308 .shift = 0,
317 .reg = 0x228,
321 .reg = 0x344,
322 .shift = 16,
331 .reg = 0x22c,
335 .reg = 0x338,
336 .shift = 0,
345 .reg = 0x22c,
349 .reg = 0x354,
350 .shift = 0,
359 .reg = 0x22c,
363 .reg = 0x354,
364 .shift = 16,
373 .reg = 0x22c,
377 .reg = 0x358,
378 .shift = 0,
387 .reg = 0x22c,
391 .reg = 0x358,
392 .shift = 16,
401 .reg = 0x324,
402 .shift = 0,
411 .reg = 0x320,
412 .shift = 0,
421 .reg = 0x22c,
425 .reg = 0x300,
426 .shift = 16,
435 .reg = 0x22c,
439 .reg = 0x304,
440 .shift = 0,
449 .reg = 0x22c,
453 .reg = 0x304,
454 .shift = 16,
463 .reg = 0x22c,
467 .reg = 0x328,
468 .shift = 16,
477 .reg = 0x22c,
481 .reg = 0x364,
482 .shift = 0,
491 .reg = 0x22c,
495 .reg = 0x368,
496 .shift = 0,
505 .reg = 0x22c,
509 .reg = 0x368,
510 .shift = 16,
519 .reg = 0x22c,
523 .reg = 0x36c,
524 .shift = 0,
533 .reg = 0x22c,
537 .reg = 0x30c,
538 .shift = 16,
547 .reg = 0x22c,
551 .reg = 0x2e4,
552 .shift = 16,
561 .reg = 0x22c,
565 .reg = 0x338,
566 .shift = 16,
575 .reg = 0x22c,
579 .reg = 0x340,
580 .shift = 0,
589 .reg = 0x22c,
593 .reg = 0x318,
594 .shift = 16,
603 .reg = 0x22c,
607 .reg = 0x314,
608 .shift = 0,
617 .reg = 0x22c,
621 .reg = 0x31c,
622 .shift = 0,
631 .reg = 0x324,
632 .shift = 16,
641 .reg = 0x320,
642 .shift = 16,
651 .reg = 0x22c,
655 .reg = 0x348,
656 .shift = 0,
665 .reg = 0x22c,
669 .reg = 0x348,
670 .shift = 16,
679 .reg = 0x22c,
683 .reg = 0x35c,
684 .shift = 0,
693 .reg = 0x22c,
697 .reg = 0x35c,
698 .shift = 16,
707 .reg = 0x230,
711 .reg = 0x360,
712 .shift = 0,
721 .reg = 0x230,
725 .reg = 0x360,
726 .shift = 16,
735 .reg = 0x230,
739 .reg = 0x37c,
740 .shift = 0,
749 .reg = 0x230,
753 .reg = 0x37c,
754 .shift = 16,
763 .reg = 0x230,
767 .reg = 0x380,
768 .shift = 0,
777 .reg = 0x230,
781 .reg = 0x380,
782 .shift = 16,
791 .reg = 0x230,
795 .reg = 0x388,
796 .shift = 0,
805 .reg = 0x230,
809 .reg = 0x384,
810 .shift = 0,
819 .reg = 0x230,
823 .reg = 0x388,
824 .shift = 16,
833 .reg = 0x230,
837 .reg = 0x384,
838 .shift = 16,
847 .reg = 0x38c,
848 .shift = 0,
857 .reg = 0x38c,
858 .shift = 16,
867 .reg = 0x230,
871 .reg = 0x390,
872 .shift = 0,
881 .reg = 0x230,
885 .reg = 0x390,
886 .shift = 16,
894 { .name = "dc", .swgroup = TEGRA_SWGROUP_DC, .reg = 0x240 },
895 { .name = "dcb", .swgroup = TEGRA_SWGROUP_DCB, .reg = 0x244 },
896 { .name = "epp", .swgroup = TEGRA_SWGROUP_EPP, .reg = 0x248 },
897 { .name = "g2", .swgroup = TEGRA_SWGROUP_G2, .reg = 0x24c },
898 { .name = "avpc", .swgroup = TEGRA_SWGROUP_AVPC, .reg = 0x23c },
899 { .name = "nv", .swgroup = TEGRA_SWGROUP_NV, .reg = 0x268 },
900 { .name = "hda", .swgroup = TEGRA_SWGROUP_HDA, .reg = 0x254 },
901 { .name = "hc", .swgroup = TEGRA_SWGROUP_HC, .reg = 0x250 },
902 { .name = "msenc", .swgroup = TEGRA_SWGROUP_MSENC, .reg = 0x264 },
903 { .name = "ppcs", .swgroup = TEGRA_SWGROUP_PPCS, .reg = 0x270 },
904 { .name = "vde", .swgroup = TEGRA_SWGROUP_VDE, .reg = 0x27c },
905 { .name = "vi", .swgroup = TEGRA_SWGROUP_VI, .reg = 0x280 },
906 { .name = "isp", .swgroup = TEGRA_SWGROUP_ISP, .reg = 0x258 },
907 { .name = "xusb_host", .swgroup = TEGRA_SWGROUP_XUSB_HOST, .reg = 0x288 },
908 { .name = "xusb_dev", .swgroup = TEGRA_SWGROUP_XUSB_DEV, .reg = 0x28c },
909 { .name = "tsec", .swgroup = TEGRA_SWGROUP_TSEC, .reg = 0x294 },