Lines Matching +full:mixed +full:- +full:burst
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2005-2006 Nokia Corporation
10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
30 #include <linux/omap-gpmc.h>
34 #include <linux/platform_data/mtd-nand-omap2.h>
36 #define DEVICE_NAME "omap-gpmc"
243 /* Define chip-selects as reserved by default until probe completes */
291 * gpmc_get_clk_period - get period of selected clock domain in ps
328 return (time_ns * 1000 + tick_ps - 1) / tick_ps; in gpmc_ns_to_clk_ticks()
343 return (time_ps + tick_ps - 1) / tick_ps; in gpmc_ps_to_ticks()
385 p->time_para_granularity); in gpmc_cs_bool_timings()
387 GPMC_CONFIG2_CSEXTRADELAY, p->cs_extra_delay); in gpmc_cs_bool_timings()
389 GPMC_CONFIG3_ADVEXTRADELAY, p->adv_extra_delay); in gpmc_cs_bool_timings()
391 GPMC_CONFIG4_OEEXTRADELAY, p->oe_extra_delay); in gpmc_cs_bool_timings()
393 GPMC_CONFIG4_WEEXTRADELAY, p->we_extra_delay); in gpmc_cs_bool_timings()
396 p->cycle2cyclesamecsen); in gpmc_cs_bool_timings()
399 p->cycle2cyclediffcsen); in gpmc_cs_bool_timings()
404 * get_gpmc_timing_reg - read a timing parameter and print DTS settings for it.
416 * tick format: gpmc,name = <value> /‍* x ns -- y ns; x ticks *‍/
417 * Where x ns -- y ns result in the same tick value.
438 nr_bits = end_bit - st_bit + 1; in get_gpmc_timing_reg()
439 mask = (1 << nr_bits) - 1; in get_gpmc_timing_reg()
454 time_ns_min = gpmc_clk_ticks_to_ns(l - 1, cs, cd) + 1; in get_gpmc_timing_reg()
456 pr_info("gpmc,%s = <%u>; /* %u ns - %u ns; %i ticks%s*/\n", in get_gpmc_timing_reg()
498 * Note that gpmc,wait-pin handing wrongly assumes bit 8 is available,
506 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 4, 4, "time-para-granularity"); in gpmc_cs_show_timings()
507 GPMC_GET_RAW(GPMC_CS_CONFIG1, 8, 9, "mux-add-data"); in gpmc_cs_show_timings()
509 GPMC_CONFIG1_DEVICESIZE_MAX, "device-width"); in gpmc_cs_show_timings()
510 GPMC_GET_RAW(GPMC_CS_CONFIG1, 16, 17, "wait-pin"); in gpmc_cs_show_timings()
511 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 21, 21, "wait-on-write"); in gpmc_cs_show_timings()
512 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 22, 22, "wait-on-read"); in gpmc_cs_show_timings()
515 "burst-length"); in gpmc_cs_show_timings()
516 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 27, 27, "sync-write"); in gpmc_cs_show_timings()
517 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 28, 28, "burst-write"); in gpmc_cs_show_timings()
518 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 29, 29, "gpmc,sync-read"); in gpmc_cs_show_timings()
519 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 30, 30, "burst-read"); in gpmc_cs_show_timings()
520 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 31, 31, "burst-wrap"); in gpmc_cs_show_timings()
522 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG2, 7, 7, "cs-extra-delay"); in gpmc_cs_show_timings()
524 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG3, 7, 7, "adv-extra-delay"); in gpmc_cs_show_timings()
526 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG4, 23, 23, "we-extra-delay"); in gpmc_cs_show_timings()
527 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG4, 7, 7, "oe-extra-delay"); in gpmc_cs_show_timings()
529 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG6, 7, 7, "cycle2cycle-samecsen"); in gpmc_cs_show_timings()
530 GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG6, 6, 6, "cycle2cycle-diffcsen"); in gpmc_cs_show_timings()
533 GPMC_GET_TICKS(GPMC_CS_CONFIG2, 0, 3, "cs-on-ns"); in gpmc_cs_show_timings()
534 GPMC_GET_TICKS(GPMC_CS_CONFIG2, 8, 12, "cs-rd-off-ns"); in gpmc_cs_show_timings()
535 GPMC_GET_TICKS(GPMC_CS_CONFIG2, 16, 20, "cs-wr-off-ns"); in gpmc_cs_show_timings()
537 GPMC_GET_TICKS(GPMC_CS_CONFIG3, 0, 3, "adv-on-ns"); in gpmc_cs_show_timings()
538 GPMC_GET_TICKS(GPMC_CS_CONFIG3, 8, 12, "adv-rd-off-ns"); in gpmc_cs_show_timings()
539 GPMC_GET_TICKS(GPMC_CS_CONFIG3, 16, 20, "adv-wr-off-ns"); in gpmc_cs_show_timings()
541 GPMC_GET_TICKS(GPMC_CS_CONFIG3, 4, 6, "adv-aad-mux-on-ns"); in gpmc_cs_show_timings()
543 "adv-aad-mux-rd-off-ns"); in gpmc_cs_show_timings()
545 "adv-aad-mux-wr-off-ns"); in gpmc_cs_show_timings()
548 GPMC_GET_TICKS(GPMC_CS_CONFIG4, 0, 3, "oe-on-ns"); in gpmc_cs_show_timings()
549 GPMC_GET_TICKS(GPMC_CS_CONFIG4, 8, 12, "oe-off-ns"); in gpmc_cs_show_timings()
551 GPMC_GET_TICKS(GPMC_CS_CONFIG4, 4, 6, "oe-aad-mux-on-ns"); in gpmc_cs_show_timings()
552 GPMC_GET_TICKS(GPMC_CS_CONFIG4, 13, 15, "oe-aad-mux-off-ns"); in gpmc_cs_show_timings()
554 GPMC_GET_TICKS(GPMC_CS_CONFIG4, 16, 19, "we-on-ns"); in gpmc_cs_show_timings()
555 GPMC_GET_TICKS(GPMC_CS_CONFIG4, 24, 28, "we-off-ns"); in gpmc_cs_show_timings()
557 GPMC_GET_TICKS(GPMC_CS_CONFIG5, 0, 4, "rd-cycle-ns"); in gpmc_cs_show_timings()
558 GPMC_GET_TICKS(GPMC_CS_CONFIG5, 8, 12, "wr-cycle-ns"); in gpmc_cs_show_timings()
559 GPMC_GET_TICKS(GPMC_CS_CONFIG5, 16, 20, "access-ns"); in gpmc_cs_show_timings()
561 GPMC_GET_TICKS(GPMC_CS_CONFIG5, 24, 27, "page-burst-access-ns"); in gpmc_cs_show_timings()
563 GPMC_GET_TICKS(GPMC_CS_CONFIG6, 0, 3, "bus-turnaround-ns"); in gpmc_cs_show_timings()
564 GPMC_GET_TICKS(GPMC_CS_CONFIG6, 8, 11, "cycle2cycle-delay-ns"); in gpmc_cs_show_timings()
568 "wait-monitoring-ns", GPMC_CD_CLK); in gpmc_cs_show_timings()
571 "clk-activation-ns", GPMC_CD_FCLK); in gpmc_cs_show_timings()
573 GPMC_GET_TICKS(GPMC_CS_CONFIG6, 16, 19, "wr-data-mux-bus-ns"); in gpmc_cs_show_timings()
574 GPMC_GET_TICKS(GPMC_CS_CONFIG6, 24, 28, "wr-access-ns"); in gpmc_cs_show_timings()
583 * set_gpmc_timing_reg - set a single timing parameter for Chip Select Region.
596 * @return: 0 on success, -1 on error.
608 nr_bits = end_bit - st_bit + 1; in set_gpmc_timing_reg()
609 mask = (1 << nr_bits) - 1; in set_gpmc_timing_reg()
618 return -1; in set_gpmc_timing_reg()
623 pr_info("GPMC CS%d: %-17s: %3d ticks, %3lu ns (was %3i ticks) %3d ns\n", in set_gpmc_timing_reg()
635 * gpmc_calc_waitmonitoring_divider - calculate proper GPMCFCLKDIVIDER based on WAITMONITORINGTIME
637 * read --> don't sample bus too early
638 * write --> data is longer on bus
647 * @return: -1 on failure to scale, else proper divider > 0.
653 div += GPMC_CONFIG1_WAITMONITORINGTIME_MAX - 1; in gpmc_calc_waitmonitoring_divider()
657 return -1; in gpmc_calc_waitmonitoring_divider()
665 * gpmc_calc_divider - calculate GPMC_FCLK divider for sync_clk GPMC_CLK period.
668 * Else, returns -1.
675 return -1; in gpmc_calc_divider()
683 * gpmc_cs_set_timings - program timing parameters for Chip Select Region.
687 * @return: 0 on success, -1 on error.
695 div = gpmc_calc_divider(t->sync_clk); in gpmc_cs_set_timings()
697 return -EINVAL; in gpmc_cs_set_timings()
702 * Calculate GPMCFCLKDIVIDER independent of gpmc,sync-clk-ps in DT for in gpmc_cs_set_timings()
708 * to protect mixed synchronous and asynchronous accesses. in gpmc_cs_set_timings()
712 if (!s->sync_read && !s->sync_write && in gpmc_cs_set_timings()
713 (s->wait_on_read || s->wait_on_write) in gpmc_cs_set_timings()
715 div = gpmc_calc_waitmonitoring_divider(t->wait_monitoring); in gpmc_cs_set_timings()
719 t->wait_monitoring in gpmc_cs_set_timings()
721 return -ENXIO; in gpmc_cs_set_timings()
726 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG2, 0, 3, 0, t->cs_on, in gpmc_cs_set_timings()
728 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG2, 8, 12, 0, t->cs_rd_off, in gpmc_cs_set_timings()
730 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG2, 16, 20, 0, t->cs_wr_off, in gpmc_cs_set_timings()
733 return -ENXIO; in gpmc_cs_set_timings()
735 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG3, 0, 3, 0, t->adv_on, in gpmc_cs_set_timings()
737 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG3, 8, 12, 0, t->adv_rd_off, in gpmc_cs_set_timings()
739 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG3, 16, 20, 0, t->adv_wr_off, in gpmc_cs_set_timings()
742 return -ENXIO; in gpmc_cs_set_timings()
746 t->adv_aad_mux_on, GPMC_CD_FCLK, in gpmc_cs_set_timings()
749 t->adv_aad_mux_rd_off, GPMC_CD_FCLK, in gpmc_cs_set_timings()
752 t->adv_aad_mux_wr_off, GPMC_CD_FCLK, in gpmc_cs_set_timings()
755 return -ENXIO; in gpmc_cs_set_timings()
758 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 0, 3, 0, t->oe_on, in gpmc_cs_set_timings()
760 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 8, 12, 0, t->oe_off, in gpmc_cs_set_timings()
764 t->oe_aad_mux_on, GPMC_CD_FCLK, in gpmc_cs_set_timings()
767 t->oe_aad_mux_off, GPMC_CD_FCLK, in gpmc_cs_set_timings()
770 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 16, 19, 0, t->we_on, in gpmc_cs_set_timings()
772 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG4, 24, 28, 0, t->we_off, in gpmc_cs_set_timings()
775 return -ENXIO; in gpmc_cs_set_timings()
777 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG5, 0, 4, 0, t->rd_cycle, in gpmc_cs_set_timings()
779 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG5, 8, 12, 0, t->wr_cycle, in gpmc_cs_set_timings()
781 ret |= set_gpmc_timing_reg(cs, GPMC_CS_CONFIG5, 16, 20, 0, t->access, in gpmc_cs_set_timings()
784 t->page_burst_access, GPMC_CD_FCLK, in gpmc_cs_set_timings()
787 return -ENXIO; in gpmc_cs_set_timings()
790 t->bus_turnaround, GPMC_CD_FCLK, in gpmc_cs_set_timings()
793 t->cycle2cycle_delay, GPMC_CD_FCLK, in gpmc_cs_set_timings()
796 return -ENXIO; in gpmc_cs_set_timings()
800 t->wr_data_mux_bus, GPMC_CD_FCLK, in gpmc_cs_set_timings()
803 return -ENXIO; in gpmc_cs_set_timings()
807 t->wr_access, GPMC_CD_FCLK, in gpmc_cs_set_timings()
810 return -ENXIO; in gpmc_cs_set_timings()
815 l |= (div - 1); in gpmc_cs_set_timings()
821 t->wait_monitoring, GPMC_CD_CLK, in gpmc_cs_set_timings()
825 t->clk_activation, GPMC_CD_FCLK, in gpmc_cs_set_timings()
828 return -ENXIO; in gpmc_cs_set_timings()
835 gpmc_cs_bool_timings(cs, &t->bool_timings); in gpmc_cs_set_timings()
850 if (base & (size - 1)) in gpmc_cs_set_memconf()
851 return -EINVAL; in gpmc_cs_set_memconf()
854 mask = (1 << GPMC_SECTION_SHIFT) - size; in gpmc_cs_set_memconf()
894 *size = (1 << GPMC_SECTION_SHIFT) - (mask << GPMC_CHUNK_SHIFT); in gpmc_cs_get_memconf()
909 gpmc->flags |= GPMC_CS_RESERVED; in gpmc_cs_set_reserved()
916 return gpmc->flags & GPMC_CS_RESERVED; in gpmc_cs_reserved()
923 size = (size - 1) >> (GPMC_CHUNK_SHIFT - 1); in gpmc_mem_align()
924 order = GPMC_CHUNK_SHIFT - 1; in gpmc_mem_align()
936 struct resource *res = &gpmc->mem; in gpmc_cs_insert_mem()
941 res->start = base; in gpmc_cs_insert_mem()
942 res->end = base + size - 1; in gpmc_cs_insert_mem()
952 struct resource *res = &gpmc->mem; in gpmc_cs_delete_mem()
957 res->start = 0; in gpmc_cs_delete_mem()
958 res->end = 0; in gpmc_cs_delete_mem()
967 struct resource *res = &gpmc->mem; in gpmc_cs_request()
968 int r = -1; in gpmc_cs_request()
971 pr_err("%s: requested chip-select is disabled\n", __func__); in gpmc_cs_request()
972 return -ENODEV; in gpmc_cs_request()
976 return -ENOMEM; in gpmc_cs_request()
980 r = -EBUSY; in gpmc_cs_request()
984 r = adjust_resource(res, res->start & ~(size - 1), size); in gpmc_cs_request()
994 r = gpmc_cs_set_memconf(cs, res->start, resource_size(res)); in gpmc_cs_request()
1002 *base = res->start; in gpmc_cs_request()
1013 struct resource *res = &gpmc->mem; in gpmc_cs_free()
1017 WARN(1, "Trying to free non-reserved GPMC CS%d\n", cs); in gpmc_cs_free()
1022 if (res->flags) in gpmc_cs_free()
1030 * gpmc_configure - write request to configure gpmc
1051 return -EINVAL; in gpmc_configure()
1071 * gpmc_omap_get_nand_ops - Get the GPMC NAND interface
1085 reg->gpmc_nand_command = gpmc_base + GPMC_CS0_OFFSET + in gpmc_omap_get_nand_ops()
1087 reg->gpmc_nand_address = gpmc_base + GPMC_CS0_OFFSET + in gpmc_omap_get_nand_ops()
1089 reg->gpmc_nand_data = gpmc_base + GPMC_CS0_OFFSET + in gpmc_omap_get_nand_ops()
1091 reg->gpmc_prefetch_config1 = gpmc_base + GPMC_PREFETCH_CONFIG1; in gpmc_omap_get_nand_ops()
1092 reg->gpmc_prefetch_config2 = gpmc_base + GPMC_PREFETCH_CONFIG2; in gpmc_omap_get_nand_ops()
1093 reg->gpmc_prefetch_control = gpmc_base + GPMC_PREFETCH_CONTROL; in gpmc_omap_get_nand_ops()
1094 reg->gpmc_prefetch_status = gpmc_base + GPMC_PREFETCH_STATUS; in gpmc_omap_get_nand_ops()
1095 reg->gpmc_ecc_config = gpmc_base + GPMC_ECC_CONFIG; in gpmc_omap_get_nand_ops()
1096 reg->gpmc_ecc_control = gpmc_base + GPMC_ECC_CONTROL; in gpmc_omap_get_nand_ops()
1097 reg->gpmc_ecc_size_config = gpmc_base + GPMC_ECC_SIZE_CONFIG; in gpmc_omap_get_nand_ops()
1098 reg->gpmc_ecc1_result = gpmc_base + GPMC_ECC1_RESULT; in gpmc_omap_get_nand_ops()
1101 reg->gpmc_bch_result0[i] = gpmc_base + GPMC_ECC_BCH_RESULT_0 + in gpmc_omap_get_nand_ops()
1103 reg->gpmc_bch_result1[i] = gpmc_base + GPMC_ECC_BCH_RESULT_1 + in gpmc_omap_get_nand_ops()
1105 reg->gpmc_bch_result2[i] = gpmc_base + GPMC_ECC_BCH_RESULT_2 + in gpmc_omap_get_nand_ops()
1107 reg->gpmc_bch_result3[i] = gpmc_base + GPMC_ECC_BCH_RESULT_3 + in gpmc_omap_get_nand_ops()
1109 reg->gpmc_bch_result4[i] = gpmc_base + GPMC_ECC_BCH_RESULT_4 + in gpmc_omap_get_nand_ops()
1111 reg->gpmc_bch_result5[i] = gpmc_base + GPMC_ECC_BCH_RESULT_5 + in gpmc_omap_get_nand_ops()
1113 reg->gpmc_bch_result6[i] = gpmc_base + GPMC_ECC_BCH_RESULT_6 + in gpmc_omap_get_nand_ops()
1175 if (!s->sync_write) { in gpmc_omap_onenand_calc_sync_timings()
1208 gpmc_read_settings_dt(dev->of_node, &gpmc_s); in gpmc_omap_onenand_set_timings()
1210 info->sync_read = gpmc_s.sync_read; in gpmc_omap_onenand_set_timings()
1211 info->sync_write = gpmc_s.sync_write; in gpmc_omap_onenand_set_timings()
1212 info->burst_len = gpmc_s.burst_len; in gpmc_omap_onenand_set_timings()
1248 hwirq += 8 - GPMC_NR_NAND_IRQS; in gpmc_irq_endis()
1262 gpmc_irq_endis(p->hwirq, false); in gpmc_irq_disable()
1267 gpmc_irq_endis(p->hwirq, true); in gpmc_irq_enable()
1272 gpmc_irq_endis(d->hwirq, false); in gpmc_irq_mask()
1277 gpmc_irq_endis(d->hwirq, true); in gpmc_irq_unmask()
1289 hwirq += 8 - GPMC_NR_NAND_IRQS; in gpmc_irq_edge_config()
1302 unsigned int hwirq = d->hwirq; in gpmc_irq_ack()
1306 hwirq += 8 - GPMC_NR_NAND_IRQS; in gpmc_irq_ack()
1315 if (d->hwirq < GPMC_NR_NAND_IRQS) in gpmc_irq_set_type()
1316 return -EINVAL; in gpmc_irq_set_type()
1320 gpmc_irq_edge_config(d->hwirq, false); in gpmc_irq_set_type()
1322 gpmc_irq_edge_config(d->hwirq, true); in gpmc_irq_set_type()
1324 return -EINVAL; in gpmc_irq_set_type()
1332 struct gpmc_device *gpmc = d->host_data; in gpmc_irq_map()
1337 irq_set_chip_and_handler(virq, &gpmc->irq_chip, in gpmc_irq_map()
1340 irq_set_chip_and_handler(virq, &gpmc->irq_chip, in gpmc_irq_map()
1364 for (hwirq = 0; hwirq < gpmc->nirqs; hwirq++) { in gpmc_handle_irq()
1367 regvalx >>= 8 - GPMC_NR_NAND_IRQS; in gpmc_handle_irq()
1372 dev_warn(gpmc->dev, in gpmc_handle_irq()
1398 gpmc->irq_chip.name = "gpmc"; in gpmc_setup_irq()
1399 gpmc->irq_chip.irq_enable = gpmc_irq_enable; in gpmc_setup_irq()
1400 gpmc->irq_chip.irq_disable = gpmc_irq_disable; in gpmc_setup_irq()
1401 gpmc->irq_chip.irq_ack = gpmc_irq_ack; in gpmc_setup_irq()
1402 gpmc->irq_chip.irq_mask = gpmc_irq_mask; in gpmc_setup_irq()
1403 gpmc->irq_chip.irq_unmask = gpmc_irq_unmask; in gpmc_setup_irq()
1404 gpmc->irq_chip.irq_set_type = gpmc_irq_set_type; in gpmc_setup_irq()
1406 gpmc_irq_domain = irq_domain_add_linear(gpmc->dev->of_node, in gpmc_setup_irq()
1407 gpmc->nirqs, in gpmc_setup_irq()
1411 dev_err(gpmc->dev, "IRQ domain add failed\n"); in gpmc_setup_irq()
1412 return -ENODEV; in gpmc_setup_irq()
1415 rc = request_irq(gpmc->irq, gpmc_handle_irq, 0, "gpmc", gpmc); in gpmc_setup_irq()
1417 dev_err(gpmc->dev, "failed to request irq %d: %d\n", in gpmc_setup_irq()
1418 gpmc->irq, rc); in gpmc_setup_irq()
1430 free_irq(gpmc->irq, gpmc); in gpmc_free_irq()
1432 for (hwirq = 0; hwirq < gpmc->nirqs; hwirq++) in gpmc_free_irq()
1467 pr_warn("%s: disabling cs %d mapped at 0x%x-0x%x\n", in gpmc_mem_init()
1481 temp = (temp + div - 1) / div; in gpmc_round_ps_to_sync_clk()
1493 temp = dev_t->t_avdp_r; in gpmc_calc_sync_read_timings()
1500 temp = max_t(u32, temp, gpmc_t->clk_activation + dev_t->t_avdh); in gpmc_calc_sync_read_timings()
1501 temp = max_t(u32, gpmc_t->adv_on + gpmc_ticks_to_ps(1), temp); in gpmc_calc_sync_read_timings()
1503 gpmc_t->adv_rd_off = gpmc_round_ps_to_ticks(temp); in gpmc_calc_sync_read_timings()
1506 temp = dev_t->t_oeasu; /* XXX: remove this ? */ in gpmc_calc_sync_read_timings()
1508 temp = max_t(u32, temp, gpmc_t->clk_activation + dev_t->t_ach); in gpmc_calc_sync_read_timings()
1509 temp = max_t(u32, temp, gpmc_t->adv_rd_off + in gpmc_calc_sync_read_timings()
1510 gpmc_ticks_to_ps(dev_t->cyc_aavdh_oe)); in gpmc_calc_sync_read_timings()
1512 gpmc_t->oe_on = gpmc_round_ps_to_ticks(temp); in gpmc_calc_sync_read_timings()
1519 temp = max_t(u32, dev_t->t_iaa, dev_t->cyc_iaa * gpmc_t->sync_clk); in gpmc_calc_sync_read_timings()
1520 temp += gpmc_t->clk_activation; in gpmc_calc_sync_read_timings()
1521 if (dev_t->cyc_oe) in gpmc_calc_sync_read_timings()
1522 temp = max_t(u32, temp, gpmc_t->oe_on + in gpmc_calc_sync_read_timings()
1523 gpmc_ticks_to_ps(dev_t->cyc_oe)); in gpmc_calc_sync_read_timings()
1524 gpmc_t->access = gpmc_round_ps_to_ticks(temp); in gpmc_calc_sync_read_timings()
1526 gpmc_t->oe_off = gpmc_t->access + gpmc_ticks_to_ps(1); in gpmc_calc_sync_read_timings()
1527 gpmc_t->cs_rd_off = gpmc_t->oe_off; in gpmc_calc_sync_read_timings()
1530 temp = max_t(u32, dev_t->t_cez_r, dev_t->t_oez); in gpmc_calc_sync_read_timings()
1531 temp = gpmc_round_ps_to_sync_clk(temp, gpmc_t->sync_clk) + in gpmc_calc_sync_read_timings()
1532 gpmc_t->access; in gpmc_calc_sync_read_timings()
1534 if (dev_t->t_ce_rdyz) in gpmc_calc_sync_read_timings()
1535 temp = max_t(u32, temp, gpmc_t->cs_rd_off + dev_t->t_ce_rdyz); in gpmc_calc_sync_read_timings()
1536 gpmc_t->rd_cycle = gpmc_round_ps_to_ticks(temp); in gpmc_calc_sync_read_timings()
1548 temp = dev_t->t_avdp_w; in gpmc_calc_sync_write_timings()
1551 gpmc_t->clk_activation + dev_t->t_avdh); in gpmc_calc_sync_write_timings()
1552 temp = max_t(u32, gpmc_t->adv_on + gpmc_ticks_to_ps(1), temp); in gpmc_calc_sync_write_timings()
1554 gpmc_t->adv_wr_off = gpmc_round_ps_to_ticks(temp); in gpmc_calc_sync_write_timings()
1557 temp = max_t(u32, dev_t->t_weasu, in gpmc_calc_sync_write_timings()
1558 gpmc_t->clk_activation + dev_t->t_rdyo); in gpmc_calc_sync_write_timings()
1564 gpmc_t->adv_wr_off + dev_t->t_aavdh); in gpmc_calc_sync_write_timings()
1565 temp = max_t(u32, temp, gpmc_t->adv_wr_off + in gpmc_calc_sync_write_timings()
1566 gpmc_ticks_to_ps(dev_t->cyc_aavdh_we)); in gpmc_calc_sync_write_timings()
1568 gpmc_t->wr_data_mux_bus = gpmc_round_ps_to_ticks(temp); in gpmc_calc_sync_write_timings()
1572 gpmc_t->we_on = gpmc_round_ps_to_ticks(dev_t->t_weasu); in gpmc_calc_sync_write_timings()
1574 gpmc_t->we_on = gpmc_t->wr_data_mux_bus; in gpmc_calc_sync_write_timings()
1578 gpmc_t->wr_access = gpmc_t->access; in gpmc_calc_sync_write_timings()
1581 temp = gpmc_t->we_on + dev_t->t_wpl; in gpmc_calc_sync_write_timings()
1583 gpmc_t->wr_access + gpmc_ticks_to_ps(1)); in gpmc_calc_sync_write_timings()
1585 gpmc_t->we_on + gpmc_ticks_to_ps(dev_t->cyc_wpl)); in gpmc_calc_sync_write_timings()
1586 gpmc_t->we_off = gpmc_round_ps_to_ticks(temp); in gpmc_calc_sync_write_timings()
1588 gpmc_t->cs_wr_off = gpmc_round_ps_to_ticks(gpmc_t->we_off + in gpmc_calc_sync_write_timings()
1589 dev_t->t_wph); in gpmc_calc_sync_write_timings()
1592 temp = gpmc_round_ps_to_sync_clk(dev_t->t_cez_w, gpmc_t->sync_clk); in gpmc_calc_sync_write_timings()
1593 temp += gpmc_t->wr_access; in gpmc_calc_sync_write_timings()
1595 if (dev_t->t_ce_rdyz) in gpmc_calc_sync_write_timings()
1597 gpmc_t->cs_wr_off + dev_t->t_ce_rdyz); in gpmc_calc_sync_write_timings()
1598 gpmc_t->wr_cycle = gpmc_round_ps_to_ticks(temp); in gpmc_calc_sync_write_timings()
1610 temp = dev_t->t_avdp_r; in gpmc_calc_async_read_timings()
1612 temp = max_t(u32, gpmc_t->adv_on + gpmc_ticks_to_ps(1), temp); in gpmc_calc_async_read_timings()
1613 gpmc_t->adv_rd_off = gpmc_round_ps_to_ticks(temp); in gpmc_calc_async_read_timings()
1616 temp = dev_t->t_oeasu; in gpmc_calc_async_read_timings()
1618 temp = max_t(u32, temp, gpmc_t->adv_rd_off + dev_t->t_aavdh); in gpmc_calc_async_read_timings()
1619 gpmc_t->oe_on = gpmc_round_ps_to_ticks(temp); in gpmc_calc_async_read_timings()
1622 temp = max_t(u32, dev_t->t_iaa, /* XXX: remove t_iaa in async ? */ in gpmc_calc_async_read_timings()
1623 gpmc_t->oe_on + dev_t->t_oe); in gpmc_calc_async_read_timings()
1624 temp = max_t(u32, temp, gpmc_t->cs_on + dev_t->t_ce); in gpmc_calc_async_read_timings()
1625 temp = max_t(u32, temp, gpmc_t->adv_on + dev_t->t_aa); in gpmc_calc_async_read_timings()
1626 gpmc_t->access = gpmc_round_ps_to_ticks(temp); in gpmc_calc_async_read_timings()
1628 gpmc_t->oe_off = gpmc_t->access + gpmc_ticks_to_ps(1); in gpmc_calc_async_read_timings()
1629 gpmc_t->cs_rd_off = gpmc_t->oe_off; in gpmc_calc_async_read_timings()
1632 temp = max_t(u32, dev_t->t_rd_cycle, in gpmc_calc_async_read_timings()
1633 gpmc_t->cs_rd_off + dev_t->t_cez_r); in gpmc_calc_async_read_timings()
1634 temp = max_t(u32, temp, gpmc_t->oe_off + dev_t->t_oez); in gpmc_calc_async_read_timings()
1635 gpmc_t->rd_cycle = gpmc_round_ps_to_ticks(temp); in gpmc_calc_async_read_timings()
1647 temp = dev_t->t_avdp_w; in gpmc_calc_async_write_timings()
1649 temp = max_t(u32, gpmc_t->adv_on + gpmc_ticks_to_ps(1), temp); in gpmc_calc_async_write_timings()
1650 gpmc_t->adv_wr_off = gpmc_round_ps_to_ticks(temp); in gpmc_calc_async_write_timings()
1653 temp = dev_t->t_weasu; in gpmc_calc_async_write_timings()
1655 temp = max_t(u32, temp, gpmc_t->adv_wr_off + dev_t->t_aavdh); in gpmc_calc_async_write_timings()
1656 temp = max_t(u32, temp, gpmc_t->adv_wr_off + in gpmc_calc_async_write_timings()
1657 gpmc_ticks_to_ps(dev_t->cyc_aavdh_we)); in gpmc_calc_async_write_timings()
1659 gpmc_t->wr_data_mux_bus = gpmc_round_ps_to_ticks(temp); in gpmc_calc_async_write_timings()
1663 gpmc_t->we_on = gpmc_round_ps_to_ticks(dev_t->t_weasu); in gpmc_calc_async_write_timings()
1665 gpmc_t->we_on = gpmc_t->wr_data_mux_bus; in gpmc_calc_async_write_timings()
1668 temp = gpmc_t->we_on + dev_t->t_wpl; in gpmc_calc_async_write_timings()
1669 gpmc_t->we_off = gpmc_round_ps_to_ticks(temp); in gpmc_calc_async_write_timings()
1671 gpmc_t->cs_wr_off = gpmc_round_ps_to_ticks(gpmc_t->we_off + in gpmc_calc_async_write_timings()
1672 dev_t->t_wph); in gpmc_calc_async_write_timings()
1675 temp = max_t(u32, dev_t->t_wr_cycle, in gpmc_calc_async_write_timings()
1676 gpmc_t->cs_wr_off + dev_t->t_cez_w); in gpmc_calc_async_write_timings()
1677 gpmc_t->wr_cycle = gpmc_round_ps_to_ticks(temp); in gpmc_calc_async_write_timings()
1687 gpmc_t->sync_clk = gpmc_calc_divider(dev_t->clk) * in gpmc_calc_sync_common_timings()
1690 gpmc_t->page_burst_access = gpmc_round_ps_to_sync_clk( in gpmc_calc_sync_common_timings()
1691 dev_t->t_bacc, in gpmc_calc_sync_common_timings()
1692 gpmc_t->sync_clk); in gpmc_calc_sync_common_timings()
1694 temp = max_t(u32, dev_t->t_ces, dev_t->t_avds); in gpmc_calc_sync_common_timings()
1695 gpmc_t->clk_activation = gpmc_round_ps_to_ticks(temp); in gpmc_calc_sync_common_timings()
1697 if (gpmc_calc_divider(gpmc_t->sync_clk) != 1) in gpmc_calc_sync_common_timings()
1700 if (dev_t->ce_xdelay) in gpmc_calc_sync_common_timings()
1701 gpmc_t->bool_timings.cs_extra_delay = true; in gpmc_calc_sync_common_timings()
1702 if (dev_t->avd_xdelay) in gpmc_calc_sync_common_timings()
1703 gpmc_t->bool_timings.adv_extra_delay = true; in gpmc_calc_sync_common_timings()
1704 if (dev_t->oe_xdelay) in gpmc_calc_sync_common_timings()
1705 gpmc_t->bool_timings.oe_extra_delay = true; in gpmc_calc_sync_common_timings()
1706 if (dev_t->we_xdelay) in gpmc_calc_sync_common_timings()
1707 gpmc_t->bool_timings.we_extra_delay = true; in gpmc_calc_sync_common_timings()
1719 gpmc_t->cs_on = gpmc_round_ps_to_ticks(dev_t->t_ceasu); in gpmc_calc_common_timings()
1722 temp = dev_t->t_avdasu; in gpmc_calc_common_timings()
1723 if (dev_t->t_ce_avd) in gpmc_calc_common_timings()
1725 gpmc_t->cs_on + dev_t->t_ce_avd); in gpmc_calc_common_timings()
1726 gpmc_t->adv_on = gpmc_round_ps_to_ticks(temp); in gpmc_calc_common_timings()
1741 t->cs_on /= 1000; in gpmc_convert_ps_to_ns()
1742 t->cs_rd_off /= 1000; in gpmc_convert_ps_to_ns()
1743 t->cs_wr_off /= 1000; in gpmc_convert_ps_to_ns()
1744 t->adv_on /= 1000; in gpmc_convert_ps_to_ns()
1745 t->adv_rd_off /= 1000; in gpmc_convert_ps_to_ns()
1746 t->adv_wr_off /= 1000; in gpmc_convert_ps_to_ns()
1747 t->we_on /= 1000; in gpmc_convert_ps_to_ns()
1748 t->we_off /= 1000; in gpmc_convert_ps_to_ns()
1749 t->oe_on /= 1000; in gpmc_convert_ps_to_ns()
1750 t->oe_off /= 1000; in gpmc_convert_ps_to_ns()
1751 t->page_burst_access /= 1000; in gpmc_convert_ps_to_ns()
1752 t->access /= 1000; in gpmc_convert_ps_to_ns()
1753 t->rd_cycle /= 1000; in gpmc_convert_ps_to_ns()
1754 t->wr_cycle /= 1000; in gpmc_convert_ps_to_ns()
1755 t->bus_turnaround /= 1000; in gpmc_convert_ps_to_ns()
1756 t->cycle2cycle_delay /= 1000; in gpmc_convert_ps_to_ns()
1757 t->wait_monitoring /= 1000; in gpmc_convert_ps_to_ns()
1758 t->clk_activation /= 1000; in gpmc_convert_ps_to_ns()
1759 t->wr_access /= 1000; in gpmc_convert_ps_to_ns()
1760 t->wr_data_mux_bus /= 1000; in gpmc_convert_ps_to_ns()
1770 mux = gpmc_s->mux_add_data ? true : false; in gpmc_calc_timings()
1771 sync = (gpmc_s->sync_read || gpmc_s->sync_write); in gpmc_calc_timings()
1778 if (gpmc_s && gpmc_s->sync_read) in gpmc_calc_timings()
1783 if (gpmc_s && gpmc_s->sync_write) in gpmc_calc_timings()
1795 * gpmc_cs_program_settings - programs non-timing related settings
1796 * @cs: GPMC chip-select to program
1799 * Programs non-timing related settings for a GPMC chip-select, such as
1800 * bus-width, burst configuration, etc. Function should be called once
1801 * for each chip-select that is being used and must be called before
1810 if ((!p->device_width) || (p->device_width > GPMC_DEVWIDTH_16BIT)) { in gpmc_cs_program_settings()
1811 pr_err("%s: invalid width %d!", __func__, p->device_width); in gpmc_cs_program_settings()
1812 return -EINVAL; in gpmc_cs_program_settings()
1815 /* Address-data multiplexing not supported for NAND devices */ in gpmc_cs_program_settings()
1816 if (p->device_nand && p->mux_add_data) { in gpmc_cs_program_settings()
1818 return -EINVAL; in gpmc_cs_program_settings()
1821 if ((p->mux_add_data > GPMC_MUX_AD) || in gpmc_cs_program_settings()
1822 ((p->mux_add_data == GPMC_MUX_AAD) && in gpmc_cs_program_settings()
1825 return -EINVAL; in gpmc_cs_program_settings()
1828 /* Page/burst mode supports lengths of 4, 8 and 16 bytes */ in gpmc_cs_program_settings()
1829 if (p->burst_read || p->burst_write) { in gpmc_cs_program_settings()
1830 switch (p->burst_len) { in gpmc_cs_program_settings()
1836 pr_err("%s: invalid page/burst-length (%d)\n", in gpmc_cs_program_settings()
1837 __func__, p->burst_len); in gpmc_cs_program_settings()
1838 return -EINVAL; in gpmc_cs_program_settings()
1842 if (p->wait_pin > gpmc_nr_waitpins) { in gpmc_cs_program_settings()
1843 pr_err("%s: invalid wait-pin (%d)\n", __func__, p->wait_pin); in gpmc_cs_program_settings()
1844 return -EINVAL; in gpmc_cs_program_settings()
1847 config1 = GPMC_CONFIG1_DEVICESIZE((p->device_width - 1)); in gpmc_cs_program_settings()
1849 if (p->sync_read) in gpmc_cs_program_settings()
1851 if (p->sync_write) in gpmc_cs_program_settings()
1853 if (p->wait_on_read) in gpmc_cs_program_settings()
1855 if (p->wait_on_write) in gpmc_cs_program_settings()
1857 if (p->wait_on_read || p->wait_on_write) in gpmc_cs_program_settings()
1858 config1 |= GPMC_CONFIG1_WAIT_PIN_SEL(p->wait_pin); in gpmc_cs_program_settings()
1859 if (p->device_nand) in gpmc_cs_program_settings()
1861 if (p->mux_add_data) in gpmc_cs_program_settings()
1862 config1 |= GPMC_CONFIG1_MUXTYPE(p->mux_add_data); in gpmc_cs_program_settings()
1863 if (p->burst_read) in gpmc_cs_program_settings()
1865 if (p->burst_write) in gpmc_cs_program_settings()
1867 if (p->burst_read || p->burst_write) { in gpmc_cs_program_settings()
1868 config1 |= GPMC_CONFIG1_PAGE_LEN(p->burst_len >> 3); in gpmc_cs_program_settings()
1869 config1 |= p->burst_wrap ? GPMC_CONFIG1_WRAPBURST_SUPP : 0; in gpmc_cs_program_settings()
1879 { .compatible = "ti,omap2420-gpmc" },
1880 { .compatible = "ti,omap2430-gpmc" },
1881 { .compatible = "ti,omap3430-gpmc" }, /* omap3430 & omap3630 */
1882 { .compatible = "ti,omap4430-gpmc" }, /* omap4430 & omap4460 & omap543x */
1883 { .compatible = "ti,am3352-gpmc" }, /* am335x devices */
1891 gpmc->name = name; in gpmc_cs_set_name()
1898 return gpmc->name; in gpmc_cs_get_name()
1902 * gpmc_cs_remap - remaps a chip-select physical base address
1903 * @cs: chip-select to remap
1904 * @base: physical base address to re-map chip-select to
1906 * Re-maps a chip-select to a new physical base address specified by
1916 pr_err("%s: requested chip-select is disabled\n", __func__); in gpmc_cs_remap()
1917 return -ENODEV; in gpmc_cs_remap()
1925 base &= ~(SZ_16M - 1); in gpmc_cs_remap()
1945 * gpmc_read_settings_dt - read gpmc settings from device-tree
1946 * @np: pointer to device-tree node for a gpmc child device
1949 * Reads the GPMC settings for a GPMC child device from device-tree and
1958 p->sync_read = of_property_read_bool(np, "gpmc,sync-read"); in gpmc_read_settings_dt()
1959 p->sync_write = of_property_read_bool(np, "gpmc,sync-write"); in gpmc_read_settings_dt()
1960 of_property_read_u32(np, "gpmc,device-width", &p->device_width); in gpmc_read_settings_dt()
1961 of_property_read_u32(np, "gpmc,mux-add-data", &p->mux_add_data); in gpmc_read_settings_dt()
1963 if (!of_property_read_u32(np, "gpmc,burst-length", &p->burst_len)) { in gpmc_read_settings_dt()
1964 p->burst_wrap = of_property_read_bool(np, "gpmc,burst-wrap"); in gpmc_read_settings_dt()
1965 p->burst_read = of_property_read_bool(np, "gpmc,burst-read"); in gpmc_read_settings_dt()
1966 p->burst_write = of_property_read_bool(np, "gpmc,burst-write"); in gpmc_read_settings_dt()
1967 if (!p->burst_read && !p->burst_write) in gpmc_read_settings_dt()
1968 pr_warn("%s: page/burst-length set but not used!\n", in gpmc_read_settings_dt()
1972 if (!of_property_read_u32(np, "gpmc,wait-pin", &p->wait_pin)) { in gpmc_read_settings_dt()
1973 p->wait_on_read = of_property_read_bool(np, in gpmc_read_settings_dt()
1974 "gpmc,wait-on-read"); in gpmc_read_settings_dt()
1975 p->wait_on_write = of_property_read_bool(np, in gpmc_read_settings_dt()
1976 "gpmc,wait-on-write"); in gpmc_read_settings_dt()
1977 if (!p->wait_on_read && !p->wait_on_write) in gpmc_read_settings_dt()
1994 of_property_read_u32(np, "gpmc,sync-clk-ps", &gpmc_t->sync_clk); in gpmc_read_timings_dt()
1997 of_property_read_u32(np, "gpmc,cs-on-ns", &gpmc_t->cs_on); in gpmc_read_timings_dt()
1998 of_property_read_u32(np, "gpmc,cs-rd-off-ns", &gpmc_t->cs_rd_off); in gpmc_read_timings_dt()
1999 of_property_read_u32(np, "gpmc,cs-wr-off-ns", &gpmc_t->cs_wr_off); in gpmc_read_timings_dt()
2002 of_property_read_u32(np, "gpmc,adv-on-ns", &gpmc_t->adv_on); in gpmc_read_timings_dt()
2003 of_property_read_u32(np, "gpmc,adv-rd-off-ns", &gpmc_t->adv_rd_off); in gpmc_read_timings_dt()
2004 of_property_read_u32(np, "gpmc,adv-wr-off-ns", &gpmc_t->adv_wr_off); in gpmc_read_timings_dt()
2005 of_property_read_u32(np, "gpmc,adv-aad-mux-on-ns", in gpmc_read_timings_dt()
2006 &gpmc_t->adv_aad_mux_on); in gpmc_read_timings_dt()
2007 of_property_read_u32(np, "gpmc,adv-aad-mux-rd-off-ns", in gpmc_read_timings_dt()
2008 &gpmc_t->adv_aad_mux_rd_off); in gpmc_read_timings_dt()
2009 of_property_read_u32(np, "gpmc,adv-aad-mux-wr-off-ns", in gpmc_read_timings_dt()
2010 &gpmc_t->adv_aad_mux_wr_off); in gpmc_read_timings_dt()
2013 of_property_read_u32(np, "gpmc,we-on-ns", &gpmc_t->we_on); in gpmc_read_timings_dt()
2014 of_property_read_u32(np, "gpmc,we-off-ns", &gpmc_t->we_off); in gpmc_read_timings_dt()
2017 of_property_read_u32(np, "gpmc,oe-on-ns", &gpmc_t->oe_on); in gpmc_read_timings_dt()
2018 of_property_read_u32(np, "gpmc,oe-off-ns", &gpmc_t->oe_off); in gpmc_read_timings_dt()
2019 of_property_read_u32(np, "gpmc,oe-aad-mux-on-ns", in gpmc_read_timings_dt()
2020 &gpmc_t->oe_aad_mux_on); in gpmc_read_timings_dt()
2021 of_property_read_u32(np, "gpmc,oe-aad-mux-off-ns", in gpmc_read_timings_dt()
2022 &gpmc_t->oe_aad_mux_off); in gpmc_read_timings_dt()
2025 of_property_read_u32(np, "gpmc,page-burst-access-ns", in gpmc_read_timings_dt()
2026 &gpmc_t->page_burst_access); in gpmc_read_timings_dt()
2027 of_property_read_u32(np, "gpmc,access-ns", &gpmc_t->access); in gpmc_read_timings_dt()
2028 of_property_read_u32(np, "gpmc,rd-cycle-ns", &gpmc_t->rd_cycle); in gpmc_read_timings_dt()
2029 of_property_read_u32(np, "gpmc,wr-cycle-ns", &gpmc_t->wr_cycle); in gpmc_read_timings_dt()
2030 of_property_read_u32(np, "gpmc,bus-turnaround-ns", in gpmc_read_timings_dt()
2031 &gpmc_t->bus_turnaround); in gpmc_read_timings_dt()
2032 of_property_read_u32(np, "gpmc,cycle2cycle-delay-ns", in gpmc_read_timings_dt()
2033 &gpmc_t->cycle2cycle_delay); in gpmc_read_timings_dt()
2034 of_property_read_u32(np, "gpmc,wait-monitoring-ns", in gpmc_read_timings_dt()
2035 &gpmc_t->wait_monitoring); in gpmc_read_timings_dt()
2036 of_property_read_u32(np, "gpmc,clk-activation-ns", in gpmc_read_timings_dt()
2037 &gpmc_t->clk_activation); in gpmc_read_timings_dt()
2040 of_property_read_u32(np, "gpmc,wr-access-ns", &gpmc_t->wr_access); in gpmc_read_timings_dt()
2041 of_property_read_u32(np, "gpmc,wr-data-mux-bus-ns", in gpmc_read_timings_dt()
2042 &gpmc_t->wr_data_mux_bus); in gpmc_read_timings_dt()
2045 p = &gpmc_t->bool_timings; in gpmc_read_timings_dt()
2047 p->cycle2cyclediffcsen = in gpmc_read_timings_dt()
2048 of_property_read_bool(np, "gpmc,cycle2cycle-diffcsen"); in gpmc_read_timings_dt()
2049 p->cycle2cyclesamecsen = in gpmc_read_timings_dt()
2050 of_property_read_bool(np, "gpmc,cycle2cycle-samecsen"); in gpmc_read_timings_dt()
2051 p->we_extra_delay = of_property_read_bool(np, "gpmc,we-extra-delay"); in gpmc_read_timings_dt()
2052 p->oe_extra_delay = of_property_read_bool(np, "gpmc,oe-extra-delay"); in gpmc_read_timings_dt()
2053 p->adv_extra_delay = of_property_read_bool(np, "gpmc,adv-extra-delay"); in gpmc_read_timings_dt()
2054 p->cs_extra_delay = of_property_read_bool(np, "gpmc,cs-extra-delay"); in gpmc_read_timings_dt()
2055 p->time_para_granularity = in gpmc_read_timings_dt()
2056 of_property_read_bool(np, "gpmc,time-para-granularity"); in gpmc_read_timings_dt()
2060 * gpmc_probe_generic_child - configures the gpmc for a child device
2062 * @child: pointer to device-tree node for child device
2064 * Allocates and configures a GPMC chip-select for a child device.
2081 dev_err(&pdev->dev, "%pOF has no 'reg' property\n", in gpmc_probe_generic_child()
2083 return -ENODEV; in gpmc_probe_generic_child()
2087 dev_err(&pdev->dev, "%pOF has malformed 'reg' property\n", in gpmc_probe_generic_child()
2089 return -ENODEV; in gpmc_probe_generic_child()
2103 dev_err(&pdev->dev, "cannot request GPMC CS %d\n", cs); in gpmc_probe_generic_child()
2106 gpmc_cs_set_name(cs, child->full_name); in gpmc_probe_generic_child()
2130 * device-tree we want the NOR flash to be mapped to the in gpmc_probe_generic_child()
2131 * location specified in the device-tree blob. So remap the in gpmc_probe_generic_child()
2137 dev_err(&pdev->dev, "cannot remap GPMC CS %d to %pa\n", in gpmc_probe_generic_child()
2140 dev_info(&pdev->dev, in gpmc_probe_generic_child()
2144 dev_info(&pdev->dev, in gpmc_probe_generic_child()
2154 dev_warn(&pdev->dev, in gpmc_probe_generic_child()
2156 ret = -EINVAL; in gpmc_probe_generic_child()
2164 dev_warn(&pdev->dev, in gpmc_probe_generic_child()
2166 ret = -EINVAL; in gpmc_probe_generic_child()
2171 if (of_device_is_compatible(child, "ti,omap2-nand")) { in gpmc_probe_generic_child()
2174 of_property_read_u32(child, "nand-bus-width", &val); in gpmc_probe_generic_child()
2183 dev_err(&pdev->dev, "%pOFn: invalid 'nand-bus-width'\n", in gpmc_probe_generic_child()
2185 ret = -EINVAL; in gpmc_probe_generic_child()
2193 ret = of_property_read_u32(child, "bank-width", in gpmc_probe_generic_child()
2196 dev_err(&pdev->dev, in gpmc_probe_generic_child()
2197 "%pOF has no 'gpmc,device-width' property\n", in gpmc_probe_generic_child()
2207 waitpin_desc = gpiochip_request_own_desc(&gpmc->gpio_chip, in gpmc_probe_generic_child()
2212 dev_err(&pdev->dev, "invalid wait-pin: %d\n", wait_pin); in gpmc_probe_generic_child()
2226 dev_err(&pdev->dev, "failed to set gpmc timings for: %pOFn\n", in gpmc_probe_generic_child()
2231 /* Clear limited address i.e. enable A26-A11 */ in gpmc_probe_generic_child()
2242 if (!of_platform_device_create(child, NULL, &pdev->dev)) in gpmc_probe_generic_child()
2248 if (of_platform_default_populate(child, NULL, &pdev->dev)) in gpmc_probe_generic_child()
2255 dev_err(&pdev->dev, "failed to create gpmc child %pOFn\n", child); in gpmc_probe_generic_child()
2256 ret = -ENODEV; in gpmc_probe_generic_child()
2270 of_match_device(gpmc_dt_ids, &pdev->dev); in gpmc_probe_dt()
2275 ret = of_property_read_u32(pdev->dev.of_node, "gpmc,num-cs", in gpmc_probe_dt()
2278 pr_err("%s: number of chip-selects not defined\n", __func__); in gpmc_probe_dt()
2281 pr_err("%s: all chip-selects are disabled\n", __func__); in gpmc_probe_dt()
2282 return -EINVAL; in gpmc_probe_dt()
2284 pr_err("%s: number of supported chip-selects cannot be > %d\n", in gpmc_probe_dt()
2286 return -EINVAL; in gpmc_probe_dt()
2289 ret = of_property_read_u32(pdev->dev.of_node, "gpmc,num-waitpins", in gpmc_probe_dt()
2304 for_each_available_child_of_node(pdev->dev.of_node, child) { in gpmc_probe_dt_children()
2307 dev_err(&pdev->dev, "failed to probe DT child '%pOFn': %d\n", in gpmc_probe_dt_children()
2341 return -EINVAL; /* we're input only */ in gpmc_gpio_direction_output()
2364 gpmc->gpio_chip.parent = gpmc->dev; in gpmc_gpio_init()
2365 gpmc->gpio_chip.owner = THIS_MODULE; in gpmc_gpio_init()
2366 gpmc->gpio_chip.label = DEVICE_NAME; in gpmc_gpio_init()
2367 gpmc->gpio_chip.ngpio = gpmc_nr_waitpins; in gpmc_gpio_init()
2368 gpmc->gpio_chip.get_direction = gpmc_gpio_get_direction; in gpmc_gpio_init()
2369 gpmc->gpio_chip.direction_input = gpmc_gpio_direction_input; in gpmc_gpio_init()
2370 gpmc->gpio_chip.direction_output = gpmc_gpio_direction_output; in gpmc_gpio_init()
2371 gpmc->gpio_chip.set = gpmc_gpio_set; in gpmc_gpio_init()
2372 gpmc->gpio_chip.get = gpmc_gpio_get; in gpmc_gpio_init()
2373 gpmc->gpio_chip.base = -1; in gpmc_gpio_init()
2375 ret = devm_gpiochip_add_data(gpmc->dev, &gpmc->gpio_chip, NULL); in gpmc_gpio_init()
2377 dev_err(gpmc->dev, "could not register gpio chip: %d\n", ret); in gpmc_gpio_init()
2391 gpmc = devm_kzalloc(&pdev->dev, sizeof(*gpmc), GFP_KERNEL); in gpmc_probe()
2393 return -ENOMEM; in gpmc_probe()
2395 gpmc->dev = &pdev->dev; in gpmc_probe()
2400 return -ENOENT; in gpmc_probe()
2402 gpmc_base = devm_ioremap_resource(&pdev->dev, res); in gpmc_probe()
2408 dev_err(&pdev->dev, "Failed to get resource: irq\n"); in gpmc_probe()
2409 return -ENOENT; in gpmc_probe()
2412 gpmc->irq = res->start; in gpmc_probe()
2414 gpmc_l3_clk = devm_clk_get(&pdev->dev, "fck"); in gpmc_probe()
2416 dev_err(&pdev->dev, "Failed to get GPMC fck\n"); in gpmc_probe()
2421 dev_err(&pdev->dev, "Invalid GPMC fck clock rate\n"); in gpmc_probe()
2422 return -EINVAL; in gpmc_probe()
2425 if (pdev->dev.of_node) { in gpmc_probe()
2434 pm_runtime_enable(&pdev->dev); in gpmc_probe()
2435 pm_runtime_get_sync(&pdev->dev); in gpmc_probe()
2440 * FIXME: Once device-tree migration is complete the below flags in gpmc_probe()
2441 * should be populated based upon the device-tree compatible in gpmc_probe()
2444 * devices support the addr-addr-data multiplex protocol. in gpmc_probe()
2447 * - OMAP24xx = 2.0 in gpmc_probe()
2448 * - OMAP3xxx = 5.0 in gpmc_probe()
2449 * - OMAP44xx/54xx/AM335x = 6.0 in gpmc_probe()
2455 dev_info(gpmc->dev, "GPMC revision %d.%d\n", GPMC_REVISION_MAJOR(l), in gpmc_probe()
2463 gpmc->nirqs = GPMC_NR_NAND_IRQS + gpmc_nr_waitpins; in gpmc_probe()
2466 dev_err(gpmc->dev, "gpmc_setup_irq failed\n"); in gpmc_probe()
2476 pm_runtime_put_sync(&pdev->dev); in gpmc_probe()
2477 pm_runtime_disable(&pdev->dev); in gpmc_probe()
2488 pm_runtime_put_sync(&pdev->dev); in gpmc_remove()
2489 pm_runtime_disable(&pdev->dev); in gpmc_remove()