Lines Matching +full:24 +full:- +full:bit
1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * vsp1_regs.h -- R-Car VSP1 Registers Definitions
13 /* -----------------------------------------------------------------------------
18 #define VI6_CMD_UPDHDR BIT(4)
19 #define VI6_CMD_STRCMD BIT(0)
28 #define VI6_SRESET_SRTS(n) BIT(n)
31 #define VI6_STATUS_FLD_STD(n) BIT((n) + 28)
32 #define VI6_STATUS_SYS_ACT(n) BIT((n) + 8)
35 #define VI6_WFP_IRQ_ENB_DFEE BIT(1)
36 #define VI6_WFP_IRQ_ENB_FREE BIT(0)
39 #define VI6_WFP_IRQ_STA_DFE BIT(1)
40 #define VI6_WFP_IRQ_STA_FRE BIT(0)
43 #define VI6_DISP_IRQ_ENB_DSTE BIT(8)
44 #define VI6_DISP_IRQ_ENB_MAEE BIT(5)
45 #define VI6_DISP_IRQ_ENB_LNEE(n) BIT(n)
48 #define VI6_DISP_IRQ_STA_DST BIT(8)
49 #define VI6_DISP_IRQ_STA_MAE BIT(5)
50 #define VI6_DISP_IRQ_STA_LNE(n) BIT(n)
55 /* -----------------------------------------------------------------------------
62 #define VI6_DL_CTRL_DC2 BIT(12)
63 #define VI6_DL_CTRL_DC1 BIT(8)
64 #define VI6_DL_CTRL_DC0 BIT(4)
65 #define VI6_DL_CTRL_CFM0 BIT(2)
66 #define VI6_DL_CTRL_NH0 BIT(1)
67 #define VI6_DL_CTRL_DLE BIT(0)
72 #define VI6_DL_SWAP_LWS BIT(2)
73 #define VI6_DL_SWAP_WDS BIT(1)
74 #define VI6_DL_SWAP_BTS BIT(0)
77 #define VI6_DL_EXT_CTRL_NWE BIT(16)
80 #define VI6_DL_EXT_CTRL_DLPRI BIT(5)
81 #define VI6_DL_EXT_CTRL_EXPRI BIT(4)
82 #define VI6_DL_EXT_CTRL_EXT BIT(0)
84 #define VI6_DL_EXT_AUTOFLD_INT BIT(0)
87 #define VI6_DL_BODY_SIZE_UPD BIT(24)
91 /* -----------------------------------------------------------------------------
110 #define VI6_RPF_INFMT_VIR BIT(28)
111 #define VI6_RPF_INFMT_CIPM BIT(16)
112 #define VI6_RPF_INFMT_SPYCS BIT(15)
113 #define VI6_RPF_INFMT_SPUVS BIT(14)
123 #define VI6_RPF_INFMT_CSC BIT(8)
128 #define VI6_RPF_DSWAP_A_LLS BIT(11)
129 #define VI6_RPF_DSWAP_A_LWS BIT(10)
130 #define VI6_RPF_DSWAP_A_WDS BIT(9)
131 #define VI6_RPF_DSWAP_A_BTS BIT(8)
132 #define VI6_RPF_DSWAP_P_LLS BIT(3)
133 #define VI6_RPF_DSWAP_P_LWS BIT(2)
134 #define VI6_RPF_DSWAP_P_WDS BIT(1)
135 #define VI6_RPF_DSWAP_P_BTS BIT(0)
151 #define VI6_RPF_ALPH_SEL_IROP_MASK (0xf << 24)
152 #define VI6_RPF_ALPH_SEL_IROP_SHIFT 24
153 #define VI6_RPF_ALPH_SEL_BSEL BIT(23)
164 #define VI6_RPF_VRTCOL_SET_LAYA_MASK (0xff << 24)
165 #define VI6_RPF_VRTCOL_SET_LAYA_SHIFT 24
174 #define VI6_RPF_MSK_CTRL_MSK_EN BIT(24)
184 #define VI6_RPF_MSK_SET_MSA_MASK (0xff << 24)
185 #define VI6_RPF_MSK_SET_MSA_SHIFT 24
194 #define VI6_RPF_CKEY_CTRL_CV BIT(4)
195 #define VI6_RPF_CKEY_CTRL_SAPE1 BIT(1)
196 #define VI6_RPF_CKEY_CTRL_SAPE0 BIT(0)
200 #define VI6_RPF_CKEY_SET_AP_MASK (0xff << 24)
201 #define VI6_RPF_CKEY_SET_AP_SHIFT 24
231 /* -----------------------------------------------------------------------------
242 #define VI6_WPF_SRCRPF_VIRACT2_DIS (0 << 24)
243 #define VI6_WPF_SRCRPF_VIRACT2_SUB (1 << 24)
244 #define VI6_WPF_SRCRPF_VIRACT2_MST (2 << 24)
245 #define VI6_WPF_SRCRPF_VIRACT2_MASK (3 << 24)
253 #define VI6_WPF_SZCLIP_EN BIT(28)
260 #define VI6_WPF_OUTFMT_PDV_MASK (0xff << 24)
261 #define VI6_WPF_OUTFMT_PDV_SHIFT 24
262 #define VI6_WPF_OUTFMT_PXA BIT(23)
263 #define VI6_WPF_OUTFMT_ROT BIT(18)
264 #define VI6_WPF_OUTFMT_HFLP BIT(17)
265 #define VI6_WPF_OUTFMT_FLP BIT(16)
266 #define VI6_WPF_OUTFMT_SPYCS BIT(15)
267 #define VI6_WPF_OUTFMT_SPUVS BIT(14)
276 #define VI6_WPF_OUTFMT_CSC BIT(8)
281 #define VI6_WPF_DSWAP_P_LLS BIT(3)
282 #define VI6_WPF_DSWAP_P_LWS BIT(2)
283 #define VI6_WPF_DSWAP_P_WDS BIT(1)
284 #define VI6_WPF_DSWAP_P_BTS BIT(0)
287 #define VI6_WPF_RNDCTRL_CBRM BIT(28)
288 #define VI6_WPF_RNDCTRL_ABRM_TRUNC (0 << 24)
289 #define VI6_WPF_RNDCTRL_ABRM_ROUND (1 << 24)
290 #define VI6_WPF_RNDCTRL_ABRM_THRESH (2 << 24)
291 #define VI6_WPF_RNDCTRL_ABRM_MASK (3 << 24)
300 #define VI6_WPF_ROT_CTRL_LN16 BIT(17)
311 #define VI6_WPF_WRBCK_CTRL_WBMD BIT(0)
313 /* -----------------------------------------------------------------------------
320 #define VI6_UIF_DISCOM_DOCMCR_CMPRU BIT(16)
321 #define VI6_UIF_DISCOM_DOCMCR_CMPR BIT(0)
324 #define VI6_UIF_DISCOM_DOCMSTR_CMPPRE BIT(1)
325 #define VI6_UIF_DISCOM_DOCMSTR_CMPST BIT(0)
328 #define VI6_UIF_DISCOM_DOCMCLSTR_CMPCLPRE BIT(1)
329 #define VI6_UIF_DISCOM_DOCMCLSTR_CMPCLST BIT(0)
332 #define VI6_UIF_DISCOM_DOCMIENR_CMPPREIEN BIT(1)
333 #define VI6_UIF_DISCOM_DOCMIENR_CMPIEN BIT(0)
341 #define VI6_UIF_DISCOM_DOCMPMR_CMPDAUF BIT(7)
351 /* -----------------------------------------------------------------------------
368 #define VI6_DPR_ROUTE_BRSSEL BIT(28)
400 /* -----------------------------------------------------------------------------
410 #define VI6_SRU_CTRL0_PARAM2 BIT(3)
411 #define VI6_SRU_CTRL0_PARAM3 BIT(2)
412 #define VI6_SRU_CTRL0_PARAM4 BIT(1)
413 #define VI6_SRU_CTRL0_EN BIT(0)
423 /* -----------------------------------------------------------------------------
430 #define VI6_UDS_CTRL_AMD BIT(30)
431 #define VI6_UDS_CTRL_FMD BIT(29)
432 #define VI6_UDS_CTRL_BLADV BIT(28)
433 #define VI6_UDS_CTRL_AON BIT(25)
434 #define VI6_UDS_CTRL_ATHON BIT(24)
435 #define VI6_UDS_CTRL_BC BIT(20)
436 #define VI6_UDS_CTRL_NE_A BIT(19)
437 #define VI6_UDS_CTRL_NE_RCR BIT(18)
438 #define VI6_UDS_CTRL_NE_GY BIT(17)
439 #define VI6_UDS_CTRL_NE_BCB BIT(16)
440 #define VI6_UDS_CTRL_AMDSLH BIT(2)
441 #define VI6_UDS_CTRL_TDIPC BIT(1)
480 #define VI6_UDS_IPC_FIELD BIT(27)
485 #define VI6_UDS_HSZCLIP_HCEN BIT(28)
505 /* -----------------------------------------------------------------------------
510 #define VI6_LUT_CTRL_EN BIT(0)
512 /* -----------------------------------------------------------------------------
517 #define VI6_CLU_CTRL_AAI BIT(28)
518 #define VI6_CLU_CTRL_MVS BIT(24)
524 #define VI6_CLU_CTRL_M2D BIT(1)
525 #define VI6_CLU_CTRL_EN BIT(0)
527 /* -----------------------------------------------------------------------------
532 #define VI6_HST_CTRL_EN BIT(0)
534 /* -----------------------------------------------------------------------------
539 #define VI6_HSI_CTRL_EN BIT(0)
541 /* -----------------------------------------------------------------------------
566 #define VI6_BRU_INCTRL_NRM BIT(28)
590 #define VI6_BRU_VIRRPF_COL_A_MASK (0xff << 24)
591 #define VI6_BRU_VIRRPF_COL_A_SHIFT 24
600 #define VI6_BRU_CTRL_RBC BIT(31)
613 #define VI6_BRU_BLD_CBES BIT(31)
620 #define VI6_BRU_BLD_CCMDY_DST_A (0 << 24)
621 #define VI6_BRU_BLD_CCMDY_255_DST_A (1 << 24)
622 #define VI6_BRU_BLD_CCMDY_SRC_A (2 << 24)
623 #define VI6_BRU_BLD_CCMDY_255_SRC_A (3 << 24)
624 #define VI6_BRU_BLD_CCMDY_COEFY (4 << 24)
625 #define VI6_BRU_BLD_CCMDY_MASK (7 << 24)
626 #define VI6_BRU_BLD_CCMDY_SHIFT 24
627 #define VI6_BRU_BLD_ABES BIT(23)
654 /* -----------------------------------------------------------------------------
665 #define VI6_HGO_MODE_STEP BIT(10)
666 #define VI6_HGO_MODE_MAXRGB BIT(7)
667 #define VI6_HGO_MODE_OFSB_R BIT(6)
668 #define VI6_HGO_MODE_OFSB_G BIT(5)
669 #define VI6_HGO_MODE_OFSB_B BIT(4)
690 #define VI6_HGO_REGRST_RCLEA BIT(0)
692 /* -----------------------------------------------------------------------------
716 #define VI6_HGT_REGRST_RCLEA BIT(0)
718 /* -----------------------------------------------------------------------------
722 #define VI6_LIF_OFFSET (-0x100)
727 #define VI6_LIF_CTRL_CFMT BIT(4)
728 #define VI6_LIF_CTRL_REQSEL BIT(1)
729 #define VI6_LIF_CTRL_LIF_EN BIT(0)
738 #define VI6_LIF_LBA_LBA0 BIT(31)
742 /* -----------------------------------------------------------------------------
749 /* -----------------------------------------------------------------------------
781 /* -----------------------------------------------------------------------------
787 /* -----------------------------------------------------------------------------
793 /* -----------------------------------------------------------------------------
800 /* -----------------------------------------------------------------------------