Lines Matching +full:output +full:- +full:enable
1 // SPDX-License-Identifier: GPL-2.0
3 * camss-vfe-4-1.c
5 * Qualcomm MSM Camera Subsystem - VFE (Video Front End) Module v4.1
7 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
8 * Copyright (C) 2015-2018 Linaro Ltd.
15 #include "camss-vfe.h"
213 u32 hw_version = readl_relaxed(vfe->base + VFE_0_HW_VERSION); in vfe_hw_version_read()
228 u32 bits = readl_relaxed(vfe->base + reg); in vfe_reg_clr()
230 writel_relaxed(bits & ~clr_bits, vfe->base + reg); in vfe_reg_clr()
235 u32 bits = readl_relaxed(vfe->base + reg); in vfe_reg_set()
237 writel_relaxed(bits | set_bits, vfe->base + reg); in vfe_reg_set()
252 writel_relaxed(reset_bits, vfe->base + VFE_0_GLOBAL_RESET_CMD); in vfe_global_reset()
258 vfe->base + VFE_0_BUS_BDG_CMD); in vfe_halt_request()
263 writel_relaxed(0x0, vfe->base + VFE_0_BUS_BDG_CMD); in vfe_halt_clear()
266 static void vfe_wm_enable(struct vfe_device *vfe, u8 wm, u8 enable) in vfe_wm_enable() argument
268 if (enable) in vfe_wm_enable()
276 static void vfe_wm_frame_based(struct vfe_device *vfe, u8 wm, u8 enable) in vfe_wm_frame_based() argument
278 if (enable) in vfe_wm_frame_based()
286 #define CALC_WORD(width, M, N) (((width) * (M) + (N) - 1) / (N))
313 switch (pix->pixelformat) { in vfe_get_wm_sizes()
316 *width = pix->width; in vfe_get_wm_sizes()
317 *height = pix->height; in vfe_get_wm_sizes()
318 *bytesperline = pix->plane_fmt[0].bytesperline; in vfe_get_wm_sizes()
324 *width = pix->width; in vfe_get_wm_sizes()
325 *height = pix->height; in vfe_get_wm_sizes()
326 *bytesperline = pix->plane_fmt[0].bytesperline; in vfe_get_wm_sizes()
333 u8 plane, u32 enable) in vfe_wm_line_based() argument
337 if (enable) { in vfe_wm_line_based()
342 wpl = vfe_word_per_line(pix->pixelformat, width); in vfe_wm_line_based()
344 reg = height - 1; in vfe_wm_line_based()
345 reg |= ((wpl + 1) / 2 - 1) << 16; in vfe_wm_line_based()
347 writel_relaxed(reg, vfe->base + in vfe_wm_line_based()
350 wpl = vfe_word_per_line(pix->pixelformat, bytesperline); in vfe_wm_line_based()
353 reg |= (height - 1) << 4; in vfe_wm_line_based()
356 writel_relaxed(reg, vfe->base + in vfe_wm_line_based()
359 writel_relaxed(0, vfe->base + in vfe_wm_line_based()
361 writel_relaxed(0, vfe->base + in vfe_wm_line_based()
370 reg = readl_relaxed(vfe->base + in vfe_wm_set_framedrop_period()
379 vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_ADDR_CFG(wm)); in vfe_wm_set_framedrop_period()
386 vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_FRAMEDROP_PATTERN(wm)); in vfe_wm_set_framedrop_pattern()
396 writel_relaxed(reg, vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_UB_CFG(wm)); in vfe_wm_set_ub_cfg()
402 writel_relaxed(VFE_0_BUS_CMD_Mx_RLD_CMD(wm), vfe->base + VFE_0_BUS_CMD); in vfe_bus_reload_wm()
409 vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_PING_ADDR(wm)); in vfe_wm_set_ping_addr()
415 vfe->base + VFE_0_BUS_IMAGE_MASTER_n_WR_PONG_ADDR(wm)); in vfe_wm_set_pong_addr()
422 reg = readl_relaxed(vfe->base + VFE_0_BUS_PING_PONG_STATUS); in vfe_wm_get_ping_pong_status()
427 static void vfe_bus_enable_wr_if(struct vfe_device *vfe, u8 enable) in vfe_bus_enable_wr_if() argument
429 if (enable) in vfe_bus_enable_wr_if()
430 writel_relaxed(0x10000009, vfe->base + VFE_0_BUS_CFG); in vfe_bus_enable_wr_if()
432 writel_relaxed(0, vfe->base + VFE_0_BUS_CFG); in vfe_bus_enable_wr_if()
474 vfe->base + in vfe_wm_set_subsample()
511 static void vfe_set_xbar_cfg(struct vfe_device *vfe, struct vfe_output *output, in vfe_set_xbar_cfg() argument
512 u8 enable) in vfe_set_xbar_cfg() argument
514 struct vfe_line *line = container_of(output, struct vfe_line, output); in vfe_set_xbar_cfg()
515 u32 p = line->video_out.active_fmt.fmt.pix_mp.pixelformat; in vfe_set_xbar_cfg()
519 for (i = 0; i < output->wm_num; i++) { in vfe_set_xbar_cfg()
528 /* On current devices output->wm_num is always <= 2 */ in vfe_set_xbar_cfg()
532 if (output->wm_idx[i] % 2 == 1) in vfe_set_xbar_cfg()
535 if (enable) in vfe_set_xbar_cfg()
537 VFE_0_BUS_XBAR_CFG_x(output->wm_idx[i]), in vfe_set_xbar_cfg()
541 VFE_0_BUS_XBAR_CFG_x(output->wm_idx[i]), in vfe_set_xbar_cfg()
547 u8 enable) in vfe_set_realign_cfg() argument
562 vfe->reg_update |= VFE_0_REG_UPDATE_line_n(line_id); in vfe_reg_update()
564 writel_relaxed(vfe->reg_update, vfe->base + VFE_0_REG_UPDATE); in vfe_reg_update()
571 vfe->reg_update &= ~VFE_0_REG_UPDATE_line_n(line_id); in vfe_reg_update_clear()
575 enum vfe_line_id line_id, u8 enable) in vfe_enable_irq_wm_line() argument
582 if (enable) { in vfe_enable_irq_wm_line()
592 enum vfe_line_id line_id, u8 enable) in vfe_enable_irq_pix_line() argument
594 struct vfe_output *output = &vfe->line[line_id].output; in vfe_enable_irq_pix_line() local
605 for (i = 0; i < output->wm_num; i++) { in vfe_enable_irq_pix_line()
607 output->wm_idx[i]); in vfe_enable_irq_pix_line()
608 comp_mask |= (1 << output->wm_idx[i]) << comp * 8; in vfe_enable_irq_pix_line()
611 if (enable) { in vfe_enable_irq_pix_line()
636 writel_relaxed(VFE_0_DEMUX_CFG_PERIOD, vfe->base + VFE_0_DEMUX_CFG); in vfe_set_demux_cfg()
639 writel_relaxed(val, vfe->base + VFE_0_DEMUX_GAIN_0); in vfe_set_demux_cfg()
642 writel_relaxed(val, vfe->base + VFE_0_DEMUX_GAIN_1); in vfe_set_demux_cfg()
644 switch (line->fmt[MSM_VFE_PAD_SINK].code) { in vfe_set_demux_cfg()
664 writel_relaxed(even_cfg, vfe->base + VFE_0_DEMUX_EVEN_CFG); in vfe_set_demux_cfg()
665 writel_relaxed(odd_cfg, vfe->base + VFE_0_DEMUX_ODD_CFG); in vfe_set_demux_cfg()
668 static inline u8 vfe_calc_interp_reso(u16 input, u16 output) in vfe_calc_interp_reso() argument
670 if (input / output >= 16) in vfe_calc_interp_reso()
673 if (input / output >= 8) in vfe_calc_interp_reso()
676 if (input / output >= 4) in vfe_calc_interp_reso()
684 u32 p = line->video_out.active_fmt.fmt.pix_mp.pixelformat; in vfe_set_scale_cfg()
686 u16 input, output; in vfe_set_scale_cfg() local
690 writel_relaxed(0x3, vfe->base + VFE_0_SCALE_ENC_Y_CFG); in vfe_set_scale_cfg()
692 input = line->fmt[MSM_VFE_PAD_SINK].width; in vfe_set_scale_cfg()
693 output = line->compose.width; in vfe_set_scale_cfg()
694 reg = (output << 16) | input; in vfe_set_scale_cfg()
695 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_H_IMAGE_SIZE); in vfe_set_scale_cfg()
697 interp_reso = vfe_calc_interp_reso(input, output); in vfe_set_scale_cfg()
698 phase_mult = input * (1 << (13 + interp_reso)) / output; in vfe_set_scale_cfg()
700 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_H_PHASE); in vfe_set_scale_cfg()
702 input = line->fmt[MSM_VFE_PAD_SINK].height; in vfe_set_scale_cfg()
703 output = line->compose.height; in vfe_set_scale_cfg()
704 reg = (output << 16) | input; in vfe_set_scale_cfg()
705 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_V_IMAGE_SIZE); in vfe_set_scale_cfg()
707 interp_reso = vfe_calc_interp_reso(input, output); in vfe_set_scale_cfg()
708 phase_mult = input * (1 << (13 + interp_reso)) / output; in vfe_set_scale_cfg()
710 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_Y_V_PHASE); in vfe_set_scale_cfg()
712 writel_relaxed(0x3, vfe->base + VFE_0_SCALE_ENC_CBCR_CFG); in vfe_set_scale_cfg()
714 input = line->fmt[MSM_VFE_PAD_SINK].width; in vfe_set_scale_cfg()
715 output = line->compose.width / 2; in vfe_set_scale_cfg()
716 reg = (output << 16) | input; in vfe_set_scale_cfg()
717 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_H_IMAGE_SIZE); in vfe_set_scale_cfg()
719 interp_reso = vfe_calc_interp_reso(input, output); in vfe_set_scale_cfg()
720 phase_mult = input * (1 << (13 + interp_reso)) / output; in vfe_set_scale_cfg()
722 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_H_PHASE); in vfe_set_scale_cfg()
724 input = line->fmt[MSM_VFE_PAD_SINK].height; in vfe_set_scale_cfg()
725 output = line->compose.height; in vfe_set_scale_cfg()
727 output = line->compose.height / 2; in vfe_set_scale_cfg()
728 reg = (output << 16) | input; in vfe_set_scale_cfg()
729 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_V_IMAGE_SIZE); in vfe_set_scale_cfg()
731 interp_reso = vfe_calc_interp_reso(input, output); in vfe_set_scale_cfg()
732 phase_mult = input * (1 << (13 + interp_reso)) / output; in vfe_set_scale_cfg()
734 writel_relaxed(reg, vfe->base + VFE_0_SCALE_ENC_CBCR_V_PHASE); in vfe_set_scale_cfg()
739 u32 p = line->video_out.active_fmt.fmt.pix_mp.pixelformat; in vfe_set_crop_cfg()
743 first = line->crop.left; in vfe_set_crop_cfg()
744 last = line->crop.left + line->crop.width - 1; in vfe_set_crop_cfg()
746 writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_Y_WIDTH); in vfe_set_crop_cfg()
748 first = line->crop.top; in vfe_set_crop_cfg()
749 last = line->crop.top + line->crop.height - 1; in vfe_set_crop_cfg()
751 writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_Y_HEIGHT); in vfe_set_crop_cfg()
753 first = line->crop.left / 2; in vfe_set_crop_cfg()
754 last = line->crop.left / 2 + line->crop.width / 2 - 1; in vfe_set_crop_cfg()
756 writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_CBCR_WIDTH); in vfe_set_crop_cfg()
758 first = line->crop.top; in vfe_set_crop_cfg()
759 last = line->crop.top + line->crop.height - 1; in vfe_set_crop_cfg()
761 first = line->crop.top / 2; in vfe_set_crop_cfg()
762 last = line->crop.top / 2 + line->crop.height / 2 - 1; in vfe_set_crop_cfg()
765 writel_relaxed(reg, vfe->base + VFE_0_CROP_ENC_CBCR_HEIGHT); in vfe_set_crop_cfg()
774 writel_relaxed(val, vfe->base + VFE_0_CLAMP_ENC_MAX_CFG); in vfe_set_clamp_cfg()
780 writel_relaxed(val, vfe->base + VFE_0_CLAMP_ENC_MIN_CFG); in vfe_set_clamp_cfg()
788 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_0); in vfe_set_qos()
789 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_1); in vfe_set_qos()
790 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_2); in vfe_set_qos()
791 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_3); in vfe_set_qos()
792 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_4); in vfe_set_qos()
793 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_5); in vfe_set_qos()
794 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_6); in vfe_set_qos()
795 writel_relaxed(val7, vfe->base + VFE_0_BUS_BDG_QOS_CFG_7); in vfe_set_qos()
803 static void vfe_set_cgc_override(struct vfe_device *vfe, u8 wm, u8 enable) in vfe_set_cgc_override() argument
807 if (enable) in vfe_set_cgc_override()
819 switch (line->fmt[MSM_VFE_PAD_SINK].code) { in vfe_set_camif_cfg()
835 writel_relaxed(val, vfe->base + VFE_0_CORE_CFG); in vfe_set_camif_cfg()
837 val = line->fmt[MSM_VFE_PAD_SINK].width * 2; in vfe_set_camif_cfg()
838 val |= line->fmt[MSM_VFE_PAD_SINK].height << 16; in vfe_set_camif_cfg()
839 writel_relaxed(val, vfe->base + VFE_0_CAMIF_FRAME_CFG); in vfe_set_camif_cfg()
841 val = line->fmt[MSM_VFE_PAD_SINK].width * 2 - 1; in vfe_set_camif_cfg()
842 writel_relaxed(val, vfe->base + VFE_0_CAMIF_WINDOW_WIDTH_CFG); in vfe_set_camif_cfg()
844 val = line->fmt[MSM_VFE_PAD_SINK].height - 1; in vfe_set_camif_cfg()
845 writel_relaxed(val, vfe->base + VFE_0_CAMIF_WINDOW_HEIGHT_CFG); in vfe_set_camif_cfg()
848 writel_relaxed(val, vfe->base + VFE_0_CAMIF_SUBSAMPLE_CFG_0); in vfe_set_camif_cfg()
851 writel_relaxed(val, vfe->base + VFE_0_CAMIF_IRQ_SUBSAMPLE_PATTERN); in vfe_set_camif_cfg()
857 writel_relaxed(val, vfe->base + VFE_0_CAMIF_CFG); in vfe_set_camif_cfg()
860 static void vfe_set_camif_cmd(struct vfe_device *vfe, u8 enable) in vfe_set_camif_cmd() argument
865 writel_relaxed(cmd, vfe->base + VFE_0_CAMIF_CMD); in vfe_set_camif_cmd()
868 if (enable) in vfe_set_camif_cmd()
873 writel_relaxed(cmd, vfe->base + VFE_0_CAMIF_CMD); in vfe_set_camif_cmd()
876 static void vfe_set_module_cfg(struct vfe_device *vfe, u8 enable) in vfe_set_module_cfg() argument
883 if (enable) in vfe_set_module_cfg()
884 writel_relaxed(val, vfe->base + VFE_0_MODULE_CFG); in vfe_set_module_cfg()
886 writel_relaxed(0x0, vfe->base + VFE_0_MODULE_CFG); in vfe_set_module_cfg()
894 ret = readl_poll_timeout(vfe->base + VFE_0_CAMIF_STATUS, in vfe_camif_wait_for_stop()
907 *value0 = readl_relaxed(vfe->base + VFE_0_IRQ_STATUS_0); in vfe_isr_read()
908 *value1 = readl_relaxed(vfe->base + VFE_0_IRQ_STATUS_1); in vfe_isr_read()
910 writel_relaxed(*value0, vfe->base + VFE_0_IRQ_CLEAR_0); in vfe_isr_read()
911 writel_relaxed(*value1, vfe->base + VFE_0_IRQ_CLEAR_1); in vfe_isr_read()
914 writel_relaxed(VFE_0_IRQ_CMD_GLOBAL_CLEAR, vfe->base + VFE_0_IRQ_CMD); in vfe_isr_read()
919 u32 violation = readl_relaxed(vfe->base + VFE_0_VIOLATION_STATUS); in vfe_violation_read()
925 * vfe_isr - ISPIF module interrupt handler
937 vfe->ops->isr_read(vfe, &value0, &value1); in vfe_isr()
943 vfe->isr_ops.reset_ack(vfe); in vfe_isr()
946 vfe->ops->violation_read(vfe); in vfe_isr()
949 vfe->isr_ops.halt_ack(vfe); in vfe_isr()
953 vfe->isr_ops.reg_update(vfe, i); in vfe_isr()
956 vfe->isr_ops.sof(vfe, VFE_LINE_PIX); in vfe_isr()
960 vfe->isr_ops.sof(vfe, i); in vfe_isr()
964 vfe->isr_ops.comp_done(vfe, i); in vfe_isr()
965 for (j = 0; j < ARRAY_SIZE(vfe->wm_output_map); j++) in vfe_isr()
966 if (vfe->wm_output_map[j] == VFE_LINE_PIX) in vfe_isr()
972 vfe->isr_ops.wm_done(vfe, i); in vfe_isr()