Lines Matching +full:output +full:- +full:enable
1 // SPDX-License-Identifier: GPL-2.0-only
5 * TI OMAP3 ISP - CSI2 module
14 #include <media/v4l2-common.h>
15 #include <linux/v4l2-mediabus.h>
23 * csi2_if_enable - Enable CSI2 Receiver interface.
24 * @enable: enable flag
28 struct isp_csi2_device *csi2, u8 enable) in csi2_if_enable() argument
30 struct isp_csi2_ctrl_cfg *currctrl = &csi2->ctrl; in csi2_if_enable()
32 isp_reg_clr_set(isp, csi2->regs1, ISPCSI2_CTRL, ISPCSI2_CTRL_IF_EN, in csi2_if_enable()
33 enable ? ISPCSI2_CTRL_IF_EN : 0); in csi2_if_enable()
35 currctrl->if_enable = enable; in csi2_if_enable()
39 * csi2_recv_config - CSI2 receiver module configuration.
49 reg = isp_reg_readl(isp, csi2->regs1, ISPCSI2_CTRL); in csi2_recv_config()
51 if (currctrl->frame_mode) in csi2_recv_config()
56 if (currctrl->vp_clk_enable) in csi2_recv_config()
61 if (currctrl->vp_only_enable) in csi2_recv_config()
67 reg |= currctrl->vp_out_ctrl << ISPCSI2_CTRL_VP_OUT_CTRL_SHIFT; in csi2_recv_config()
69 if (currctrl->ecc_enable) in csi2_recv_config()
74 isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_CTRL); in csi2_recv_config()
91 * - 3 different formats (at this time)
92 * - 2 destinations (mem, vp+mem) (vp only handled separately)
93 * - 2 decompression options (on, off)
94 * - 2 isp revisions (certain format must be handled differently on OMAP3630)
95 * Output should be CSI2 frame format code
102 /* Output to memory */
109 /* Output to both */
120 /* Output to memory */
128 /* Output to both */
140 /* Output to memory */
148 /* Output to both */
160 * csi2_ctx_map_format - Map CSI2 sink media bus format to CSI2 format ID
167 const struct v4l2_mbus_framefmt *fmt = &csi2->formats[CSI2_PAD_SINK]; in csi2_ctx_map_format()
170 switch (fmt->code) { in csi2_ctx_map_format()
188 fmt->code); in csi2_ctx_map_format()
192 if (!(csi2->output & CSI2_OUTPUT_CCDC) && in csi2_ctx_map_format()
193 !(csi2->output & CSI2_OUTPUT_MEMORY)) { in csi2_ctx_map_format()
194 /* Neither output enabled is a valid combination */ in csi2_ctx_map_format()
201 destidx = csi2->frame_skip ? 0 : !!(csi2->output & CSI2_OUTPUT_CCDC); in csi2_ctx_map_format()
202 is_3630 = csi2->isp->revision == ISP_REVISION_15_0; in csi2_ctx_map_format()
204 return __csi2_fmt_map[fmtidx][destidx][csi2->dpcm_decompress][is_3630]; in csi2_ctx_map_format()
208 * csi2_set_outaddr - Set memory address to save output image
210 * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary.
212 * Sets the memory address where the output will be saved.
214 * Returns 0 if successful, or -EINVAL if the address is not in the 32 byte
219 struct isp_device *isp = csi2->isp; in csi2_set_outaddr()
220 struct isp_csi2_ctx_cfg *ctx = &csi2->contexts[0]; in csi2_set_outaddr()
222 ctx->ping_addr = addr; in csi2_set_outaddr()
223 ctx->pong_addr = addr; in csi2_set_outaddr()
224 isp_reg_writel(isp, ctx->ping_addr, in csi2_set_outaddr()
225 csi2->regs1, ISPCSI2_CTX_DAT_PING_ADDR(ctx->ctxnum)); in csi2_set_outaddr()
226 isp_reg_writel(isp, ctx->pong_addr, in csi2_set_outaddr()
227 csi2->regs1, ISPCSI2_CTX_DAT_PONG_ADDR(ctx->ctxnum)); in csi2_set_outaddr()
231 * is_usr_def_mapping - Checks whether USER_DEF_MAPPING should
242 * csi2_ctx_enable - Enable specified CSI2 context
244 * @enable: enable
248 struct isp_csi2_device *csi2, u8 ctxnum, u8 enable) in csi2_ctx_enable() argument
250 struct isp_csi2_ctx_cfg *ctx = &csi2->contexts[ctxnum]; in csi2_ctx_enable()
254 reg = isp_reg_readl(isp, csi2->regs1, ISPCSI2_CTX_CTRL1(ctxnum)); in csi2_ctx_enable()
256 if (enable) { in csi2_ctx_enable()
257 if (csi2->frame_skip) in csi2_ctx_enable()
258 skip = csi2->frame_skip; in csi2_ctx_enable()
259 else if (csi2->output & CSI2_OUTPUT_MEMORY) in csi2_ctx_enable()
270 isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_CTX_CTRL1(ctxnum)); in csi2_ctx_enable()
271 ctx->enabled = enable; in csi2_ctx_enable()
275 * csi2_ctx_config - CSI2 context configuration.
286 reg = isp_reg_readl(isp, csi2->regs1, ISPCSI2_CTX_CTRL1(ctx->ctxnum)); in csi2_ctx_config()
288 if (ctx->eof_enabled) in csi2_ctx_config()
293 if (ctx->eol_enabled) in csi2_ctx_config()
298 if (ctx->checksum_enabled) in csi2_ctx_config()
303 isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_CTX_CTRL1(ctx->ctxnum)); in csi2_ctx_config()
306 reg = isp_reg_readl(isp, csi2->regs1, ISPCSI2_CTX_CTRL2(ctx->ctxnum)); in csi2_ctx_config()
309 reg |= ctx->virtual_id << ISPCSI2_CTX_CTRL2_VIRTUAL_ID_SHIFT; in csi2_ctx_config()
312 reg |= ctx->format_id << ISPCSI2_CTX_CTRL2_FORMAT_SHIFT; in csi2_ctx_config()
314 if (ctx->dpcm_decompress) { in csi2_ctx_config()
315 if (ctx->dpcm_predictor) in csi2_ctx_config()
321 if (is_usr_def_mapping(ctx->format_id)) { in csi2_ctx_config()
326 isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_CTX_CTRL2(ctx->ctxnum)); in csi2_ctx_config()
329 reg = isp_reg_readl(isp, csi2->regs1, ISPCSI2_CTX_CTRL3(ctx->ctxnum)); in csi2_ctx_config()
331 reg |= (ctx->alpha << ISPCSI2_CTX_CTRL3_ALPHA_SHIFT); in csi2_ctx_config()
333 isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_CTX_CTRL3(ctx->ctxnum)); in csi2_ctx_config()
336 reg = isp_reg_readl(isp, csi2->regs1, in csi2_ctx_config()
337 ISPCSI2_CTX_DAT_OFST(ctx->ctxnum)); in csi2_ctx_config()
339 reg |= ctx->data_offset << ISPCSI2_CTX_DAT_OFST_OFST_SHIFT; in csi2_ctx_config()
340 isp_reg_writel(isp, reg, csi2->regs1, in csi2_ctx_config()
341 ISPCSI2_CTX_DAT_OFST(ctx->ctxnum)); in csi2_ctx_config()
343 isp_reg_writel(isp, ctx->ping_addr, in csi2_ctx_config()
344 csi2->regs1, ISPCSI2_CTX_DAT_PING_ADDR(ctx->ctxnum)); in csi2_ctx_config()
346 isp_reg_writel(isp, ctx->pong_addr, in csi2_ctx_config()
347 csi2->regs1, ISPCSI2_CTX_DAT_PONG_ADDR(ctx->ctxnum)); in csi2_ctx_config()
351 * csi2_timing_config - CSI2 timing configuration.
360 reg = isp_reg_readl(isp, csi2->regs1, ISPCSI2_TIMING); in csi2_timing_config()
362 if (timing->force_rx_mode) in csi2_timing_config()
363 reg |= ISPCSI2_TIMING_FORCE_RX_MODE_IO(timing->ionum); in csi2_timing_config()
365 reg &= ~ISPCSI2_TIMING_FORCE_RX_MODE_IO(timing->ionum); in csi2_timing_config()
367 if (timing->stop_state_16x) in csi2_timing_config()
368 reg |= ISPCSI2_TIMING_STOP_STATE_X16_IO(timing->ionum); in csi2_timing_config()
370 reg &= ~ISPCSI2_TIMING_STOP_STATE_X16_IO(timing->ionum); in csi2_timing_config()
372 if (timing->stop_state_4x) in csi2_timing_config()
373 reg |= ISPCSI2_TIMING_STOP_STATE_X4_IO(timing->ionum); in csi2_timing_config()
375 reg &= ~ISPCSI2_TIMING_STOP_STATE_X4_IO(timing->ionum); in csi2_timing_config()
377 reg &= ~ISPCSI2_TIMING_STOP_STATE_COUNTER_IO_MASK(timing->ionum); in csi2_timing_config()
378 reg |= timing->stop_state_counter << in csi2_timing_config()
379 ISPCSI2_TIMING_STOP_STATE_COUNTER_IO_SHIFT(timing->ionum); in csi2_timing_config()
381 isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_TIMING); in csi2_timing_config()
385 * csi2_irq_ctx_set - Enables CSI2 Context IRQs.
386 * @enable: Enable/disable CSI2 Context interrupts
389 struct isp_csi2_device *csi2, int enable) in csi2_irq_ctx_set() argument
394 isp_reg_writel(isp, ISPCSI2_CTX_IRQSTATUS_FE_IRQ, csi2->regs1, in csi2_irq_ctx_set()
396 if (enable) in csi2_irq_ctx_set()
397 isp_reg_set(isp, csi2->regs1, ISPCSI2_CTX_IRQENABLE(i), in csi2_irq_ctx_set()
400 isp_reg_clr(isp, csi2->regs1, ISPCSI2_CTX_IRQENABLE(i), in csi2_irq_ctx_set()
406 * csi2_irq_complexio1_set - Enables CSI2 ComplexIO IRQs.
407 * @enable: Enable/disable CSI2 ComplexIO #1 interrupts
410 struct isp_csi2_device *csi2, int enable) in csi2_irq_complexio1_set() argument
440 isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_PHY_IRQSTATUS); in csi2_irq_complexio1_set()
441 if (enable) in csi2_irq_complexio1_set()
442 reg |= isp_reg_readl(isp, csi2->regs1, ISPCSI2_PHY_IRQENABLE); in csi2_irq_complexio1_set()
445 isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_PHY_IRQENABLE); in csi2_irq_complexio1_set()
449 * csi2_irq_status_set - Enables CSI2 Status IRQs.
450 * @enable: Enable/disable CSI2 Status interrupts
453 struct isp_csi2_device *csi2, int enable) in csi2_irq_status_set() argument
464 isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_IRQSTATUS); in csi2_irq_status_set()
465 if (enable) in csi2_irq_status_set()
466 reg |= isp_reg_readl(isp, csi2->regs1, ISPCSI2_IRQENABLE); in csi2_irq_status_set()
470 isp_reg_writel(isp, reg, csi2->regs1, ISPCSI2_IRQENABLE); in csi2_irq_status_set()
474 * omap3isp_csi2_reset - Resets the CSI2 module.
478 * Returns 0 if successful, or -EBUSY if power command didn't respond.
482 struct isp_device *isp = csi2->isp; in omap3isp_csi2_reset()
487 if (!csi2->available) in omap3isp_csi2_reset()
488 return -ENODEV; in omap3isp_csi2_reset()
490 if (csi2->phy->entity) in omap3isp_csi2_reset()
491 return -EBUSY; in omap3isp_csi2_reset()
493 isp_reg_set(isp, csi2->regs1, ISPCSI2_SYSCONFIG, in omap3isp_csi2_reset()
497 reg = isp_reg_readl(isp, csi2->regs1, ISPCSI2_SYSSTATUS) & in omap3isp_csi2_reset()
507 dev_err(isp->dev, "CSI2: Soft reset try count exceeded!\n"); in omap3isp_csi2_reset()
508 return -EBUSY; in omap3isp_csi2_reset()
511 if (isp->revision == ISP_REVISION_15_0) in omap3isp_csi2_reset()
512 isp_reg_set(isp, csi2->regs1, ISPCSI2_PHY_CFG, in omap3isp_csi2_reset()
517 reg = isp_reg_readl(isp, csi2->phy->phy_regs, ISPCSIPHY_REG1) in omap3isp_csi2_reset()
522 } while (--i > 0); in omap3isp_csi2_reset()
525 dev_err(isp->dev, in omap3isp_csi2_reset()
527 return -EBUSY; in omap3isp_csi2_reset()
530 if (isp->autoidle) in omap3isp_csi2_reset()
531 isp_reg_clr_set(isp, csi2->regs1, ISPCSI2_SYSCONFIG, in omap3isp_csi2_reset()
535 ((isp->revision == ISP_REVISION_15_0) ? in omap3isp_csi2_reset()
538 isp_reg_clr_set(isp, csi2->regs1, ISPCSI2_SYSCONFIG, in omap3isp_csi2_reset()
548 struct isp_pipeline *pipe = to_isp_pipeline(&csi2->subdev.entity); in csi2_configure()
550 struct isp_device *isp = csi2->isp; in csi2_configure()
551 struct isp_csi2_timing_cfg *timing = &csi2->timing[0]; in csi2_configure()
561 if (csi2->contexts[0].enabled || csi2->ctrl.if_enable) in csi2_configure()
562 return -EBUSY; in csi2_configure()
564 pad = media_entity_remote_pad(&csi2->pads[CSI2_PAD_SINK]); in csi2_configure()
565 sensor = media_entity_to_v4l2_subdev(pad->entity); in csi2_configure()
566 buscfg = v4l2_subdev_to_bus_cfg(pipe->external); in csi2_configure()
568 csi2->frame_skip = 0; in csi2_configure()
569 v4l2_subdev_call(sensor, sensor, g_skip_frames, &csi2->frame_skip); in csi2_configure()
571 csi2->ctrl.vp_out_ctrl = in csi2_configure()
572 clamp_t(unsigned int, pipe->l3_ick / pipe->external_rate - 1, in csi2_configure()
574 dev_dbg(isp->dev, "%s: l3_ick %lu, external_rate %u, vp_out_ctrl %u\n", in csi2_configure()
575 __func__, pipe->l3_ick, pipe->external_rate, in csi2_configure()
576 csi2->ctrl.vp_out_ctrl); in csi2_configure()
577 csi2->ctrl.frame_mode = ISP_CSI2_FRAME_IMMEDIATE; in csi2_configure()
578 csi2->ctrl.ecc_enable = buscfg->bus.csi2.crc; in csi2_configure()
580 timing->ionum = 1; in csi2_configure()
581 timing->force_rx_mode = 1; in csi2_configure()
582 timing->stop_state_16x = 1; in csi2_configure()
583 timing->stop_state_4x = 1; in csi2_configure()
584 timing->stop_state_counter = 0x1FF; in csi2_configure()
591 if (csi2->formats[CSI2_PAD_SINK].code != in csi2_configure()
592 csi2->formats[CSI2_PAD_SOURCE].code) in csi2_configure()
593 csi2->dpcm_decompress = true; in csi2_configure()
595 csi2->dpcm_decompress = false; in csi2_configure()
597 csi2->contexts[0].format_id = csi2_ctx_map_format(csi2); in csi2_configure()
599 if (csi2->video_out.bpl_padding == 0) in csi2_configure()
600 csi2->contexts[0].data_offset = 0; in csi2_configure()
602 csi2->contexts[0].data_offset = csi2->video_out.bpl_value; in csi2_configure()
605 * Enable end of frame and end of line signals generation for in csi2_configure()
611 csi2->contexts[0].eof_enabled = 1; in csi2_configure()
612 csi2->contexts[0].eol_enabled = 1; in csi2_configure()
620 csi2_recv_config(isp, csi2, &csi2->ctrl); in csi2_configure()
621 csi2_ctx_config(isp, csi2, &csi2->contexts[0]); in csi2_configure()
627 * csi2_print_status - Prints CSI2 debug information.
630 dev_dbg(isp->dev, "###CSI2 " #name "=0x%08x\n", \
635 struct isp_device *isp = csi2->isp; in csi2_print_status()
637 if (!csi2->available) in csi2_print_status()
640 dev_dbg(isp->dev, "-------------CSI2 Register dump-------------\n"); in csi2_print_status()
642 CSI2_PRINT_REGISTER(isp, csi2->regs1, SYSCONFIG); in csi2_print_status()
643 CSI2_PRINT_REGISTER(isp, csi2->regs1, SYSSTATUS); in csi2_print_status()
644 CSI2_PRINT_REGISTER(isp, csi2->regs1, IRQENABLE); in csi2_print_status()
645 CSI2_PRINT_REGISTER(isp, csi2->regs1, IRQSTATUS); in csi2_print_status()
646 CSI2_PRINT_REGISTER(isp, csi2->regs1, CTRL); in csi2_print_status()
647 CSI2_PRINT_REGISTER(isp, csi2->regs1, DBG_H); in csi2_print_status()
648 CSI2_PRINT_REGISTER(isp, csi2->regs1, GNQ); in csi2_print_status()
649 CSI2_PRINT_REGISTER(isp, csi2->regs1, PHY_CFG); in csi2_print_status()
650 CSI2_PRINT_REGISTER(isp, csi2->regs1, PHY_IRQSTATUS); in csi2_print_status()
651 CSI2_PRINT_REGISTER(isp, csi2->regs1, SHORT_PACKET); in csi2_print_status()
652 CSI2_PRINT_REGISTER(isp, csi2->regs1, PHY_IRQENABLE); in csi2_print_status()
653 CSI2_PRINT_REGISTER(isp, csi2->regs1, DBG_P); in csi2_print_status()
654 CSI2_PRINT_REGISTER(isp, csi2->regs1, TIMING); in csi2_print_status()
655 CSI2_PRINT_REGISTER(isp, csi2->regs1, CTX_CTRL1(0)); in csi2_print_status()
656 CSI2_PRINT_REGISTER(isp, csi2->regs1, CTX_CTRL2(0)); in csi2_print_status()
657 CSI2_PRINT_REGISTER(isp, csi2->regs1, CTX_DAT_OFST(0)); in csi2_print_status()
658 CSI2_PRINT_REGISTER(isp, csi2->regs1, CTX_DAT_PING_ADDR(0)); in csi2_print_status()
659 CSI2_PRINT_REGISTER(isp, csi2->regs1, CTX_DAT_PONG_ADDR(0)); in csi2_print_status()
660 CSI2_PRINT_REGISTER(isp, csi2->regs1, CTX_IRQENABLE(0)); in csi2_print_status()
661 CSI2_PRINT_REGISTER(isp, csi2->regs1, CTX_IRQSTATUS(0)); in csi2_print_status()
662 CSI2_PRINT_REGISTER(isp, csi2->regs1, CTX_CTRL3(0)); in csi2_print_status()
664 dev_dbg(isp->dev, "--------------------------------------------\n"); in csi2_print_status()
667 /* -----------------------------------------------------------------------------
672 * csi2_isr_buffer - Does buffer handling at end-of-frame
677 struct isp_device *isp = csi2->isp; in csi2_isr_buffer()
682 buffer = omap3isp_video_buffer_next(&csi2->video_out); in csi2_isr_buffer()
691 csi2_set_outaddr(csi2, buffer->dma); in csi2_isr_buffer()
698 struct isp_device *isp = csi2->isp; in csi2_isr_ctx()
699 unsigned int n = ctx->ctxnum; in csi2_isr_ctx()
702 status = isp_reg_readl(isp, csi2->regs1, ISPCSI2_CTX_IRQSTATUS(n)); in csi2_isr_ctx()
703 isp_reg_writel(isp, status, csi2->regs1, ISPCSI2_CTX_IRQSTATUS(n)); in csi2_isr_ctx()
710 * in the CSI2_CTx_CTRL1::COUNT field, so re-enable it. in csi2_isr_ctx()
718 if (csi2->frame_skip) { in csi2_isr_ctx()
719 csi2->frame_skip--; in csi2_isr_ctx()
720 if (csi2->frame_skip == 0) { in csi2_isr_ctx()
721 ctx->format_id = csi2_ctx_map_format(csi2); in csi2_isr_ctx()
728 if (csi2->output & CSI2_OUTPUT_MEMORY) in csi2_isr_ctx()
733 * omap3isp_csi2_isr - CSI2 interrupt handling.
737 struct isp_pipeline *pipe = to_isp_pipeline(&csi2->subdev.entity); in omap3isp_csi2_isr()
739 struct isp_device *isp = csi2->isp; in omap3isp_csi2_isr()
741 if (!csi2->available) in omap3isp_csi2_isr()
744 csi2_irqstatus = isp_reg_readl(isp, csi2->regs1, ISPCSI2_IRQSTATUS); in omap3isp_csi2_isr()
745 isp_reg_writel(isp, csi2_irqstatus, csi2->regs1, ISPCSI2_IRQSTATUS); in omap3isp_csi2_isr()
749 cpxio1_irqstatus = isp_reg_readl(isp, csi2->regs1, in omap3isp_csi2_isr()
752 csi2->regs1, ISPCSI2_PHY_IRQSTATUS); in omap3isp_csi2_isr()
753 dev_dbg(isp->dev, "CSI2: ComplexIO Error IRQ %x\n", in omap3isp_csi2_isr()
755 pipe->error = true; in omap3isp_csi2_isr()
763 dev_dbg(isp->dev, in omap3isp_csi2_isr()
775 pipe->error = true; in omap3isp_csi2_isr()
778 if (omap3isp_module_sync_is_stopping(&csi2->wait, &csi2->stopping)) in omap3isp_csi2_isr()
783 csi2_isr_ctx(csi2, &csi2->contexts[0]); in omap3isp_csi2_isr()
786 dev_dbg(isp->dev, "CSI2: ECC correction done\n"); in omap3isp_csi2_isr()
789 /* -----------------------------------------------------------------------------
794 * csi2_queue - Queues the first buffer when using memory output
800 struct isp_device *isp = video->isp; in csi2_queue()
801 struct isp_csi2_device *csi2 = &isp->isp_csi2a; in csi2_queue()
803 csi2_set_outaddr(csi2, buffer->dma); in csi2_queue()
809 * Enable it now. in csi2_queue()
811 if (csi2->video_out.dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) { in csi2_queue()
812 /* Enable / disable context 0 and IRQs */ in csi2_queue()
815 isp_video_dmaqueue_flags_clr(&csi2->video_out); in csi2_queue()
825 /* -----------------------------------------------------------------------------
834 return v4l2_subdev_get_try_format(&csi2->subdev, cfg, pad); in __csi2_get_format()
836 return &csi2->formats[pad]; in __csi2_get_format()
851 /* Clamp the width and height to valid range (1-8191). */ in csi2_try_format()
853 if (fmt->code == csi2_input_fmts[i]) in csi2_try_format()
859 fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; in csi2_try_format()
861 fmt->width = clamp_t(u32, fmt->width, 1, 8191); in csi2_try_format()
862 fmt->height = clamp_t(u32, fmt->height, 1, 8191); in csi2_try_format()
869 pixelcode = fmt->code; in csi2_try_format()
877 info = omap3isp_video_format_info(fmt->code); in csi2_try_format()
878 if (info->uncompressed == pixelcode) in csi2_try_format()
879 fmt->code = pixelcode; in csi2_try_format()
883 /* RGB, non-interlaced */ in csi2_try_format()
884 fmt->colorspace = V4L2_COLORSPACE_SRGB; in csi2_try_format()
885 fmt->field = V4L2_FIELD_NONE; in csi2_try_format()
889 * csi2_enum_mbus_code - Handle pixel format enumeration
893 * return -EINVAL or zero on success
903 if (code->pad == CSI2_PAD_SINK) { in csi2_enum_mbus_code()
904 if (code->index >= ARRAY_SIZE(csi2_input_fmts)) in csi2_enum_mbus_code()
905 return -EINVAL; in csi2_enum_mbus_code()
907 code->code = csi2_input_fmts[code->index]; in csi2_enum_mbus_code()
910 code->which); in csi2_enum_mbus_code()
911 switch (code->index) { in csi2_enum_mbus_code()
914 code->code = format->code; in csi2_enum_mbus_code()
918 info = omap3isp_video_format_info(format->code); in csi2_enum_mbus_code()
919 if (info->uncompressed == format->code) in csi2_enum_mbus_code()
920 return -EINVAL; in csi2_enum_mbus_code()
922 code->code = info->uncompressed; in csi2_enum_mbus_code()
925 return -EINVAL; in csi2_enum_mbus_code()
939 if (fse->index != 0) in csi2_enum_frame_size()
940 return -EINVAL; in csi2_enum_frame_size()
942 format.code = fse->code; in csi2_enum_frame_size()
945 csi2_try_format(csi2, cfg, fse->pad, &format, fse->which); in csi2_enum_frame_size()
946 fse->min_width = format.width; in csi2_enum_frame_size()
947 fse->min_height = format.height; in csi2_enum_frame_size()
949 if (format.code != fse->code) in csi2_enum_frame_size()
950 return -EINVAL; in csi2_enum_frame_size()
952 format.code = fse->code; in csi2_enum_frame_size()
953 format.width = -1; in csi2_enum_frame_size()
954 format.height = -1; in csi2_enum_frame_size()
955 csi2_try_format(csi2, cfg, fse->pad, &format, fse->which); in csi2_enum_frame_size()
956 fse->max_width = format.width; in csi2_enum_frame_size()
957 fse->max_height = format.height; in csi2_enum_frame_size()
963 * csi2_get_format - Handle get format by pads subdev method
967 * return -EINVAL or zero on success
975 format = __csi2_get_format(csi2, cfg, fmt->pad, fmt->which); in csi2_get_format()
977 return -EINVAL; in csi2_get_format()
979 fmt->format = *format; in csi2_get_format()
984 * csi2_set_format - Handle set format by pads subdev method
988 * return -EINVAL or zero on success
996 format = __csi2_get_format(csi2, cfg, fmt->pad, fmt->which); in csi2_set_format()
998 return -EINVAL; in csi2_set_format()
1000 csi2_try_format(csi2, cfg, fmt->pad, &fmt->format, fmt->which); in csi2_set_format()
1001 *format = fmt->format; in csi2_set_format()
1004 if (fmt->pad == CSI2_PAD_SINK) { in csi2_set_format()
1006 fmt->which); in csi2_set_format()
1007 *format = fmt->format; in csi2_set_format()
1008 csi2_try_format(csi2, cfg, CSI2_PAD_SOURCE, format, fmt->which); in csi2_set_format()
1015 * csi2_init_formats - Initialize formats on all pads
1033 csi2_set_format(sd, fh ? fh->pad : NULL, &format); in csi2_init_formats()
1039 * csi2_set_stream - Enable/Disable streaming on the CSI2 module
1041 * @enable: ISP pipeline stream state
1045 static int csi2_set_stream(struct v4l2_subdev *sd, int enable) in csi2_set_stream() argument
1048 struct isp_device *isp = csi2->isp; in csi2_set_stream()
1049 struct isp_video *video_out = &csi2->video_out; in csi2_set_stream()
1051 switch (enable) { in csi2_set_stream()
1053 if (omap3isp_csiphy_acquire(csi2->phy, &sd->entity) < 0) in csi2_set_stream()
1054 return -ENODEV; in csi2_set_stream()
1055 if (csi2->output & CSI2_OUTPUT_MEMORY) in csi2_set_stream()
1066 if (csi2->output & CSI2_OUTPUT_MEMORY && in csi2_set_stream()
1067 !(video_out->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_QUEUED)) in csi2_set_stream()
1069 /* Enable context 0 and IRQs */ in csi2_set_stream()
1070 atomic_set(&csi2->stopping, 0); in csi2_set_stream()
1077 if (csi2->state == ISP_PIPELINE_STREAM_STOPPED) in csi2_set_stream()
1079 if (omap3isp_module_sync_idle(&sd->entity, &csi2->wait, in csi2_set_stream()
1080 &csi2->stopping)) in csi2_set_stream()
1081 dev_dbg(isp->dev, "%s: module stop timeout.\n", in csi2_set_stream()
1082 sd->name); in csi2_set_stream()
1086 omap3isp_csiphy_release(csi2->phy); in csi2_set_stream()
1092 csi2->state = enable; in csi2_set_stream()
1120 /* -----------------------------------------------------------------------------
1125 * csi2_link_setup - Setup CSI2 connections.
1130 * return -EINVAL or zero on success
1138 struct isp_csi2_ctrl_cfg *ctrl = &csi2->ctrl; in csi2_link_setup()
1139 unsigned int index = local->index; in csi2_link_setup()
1143 * Revisit this when it will be implemented, and return -EBUSY for now. in csi2_link_setup()
1147 if (is_media_entity_v4l2_subdev(remote->entity)) in csi2_link_setup()
1153 if (csi2->output & ~CSI2_OUTPUT_MEMORY) in csi2_link_setup()
1154 return -EBUSY; in csi2_link_setup()
1155 csi2->output |= CSI2_OUTPUT_MEMORY; in csi2_link_setup()
1157 csi2->output &= ~CSI2_OUTPUT_MEMORY; in csi2_link_setup()
1163 if (csi2->output & ~CSI2_OUTPUT_CCDC) in csi2_link_setup()
1164 return -EBUSY; in csi2_link_setup()
1165 csi2->output |= CSI2_OUTPUT_CCDC; in csi2_link_setup()
1167 csi2->output &= ~CSI2_OUTPUT_CCDC; in csi2_link_setup()
1173 return -EINVAL; in csi2_link_setup()
1176 ctrl->vp_only_enable = in csi2_link_setup()
1177 (csi2->output & CSI2_OUTPUT_MEMORY) ? false : true; in csi2_link_setup()
1178 ctrl->vp_clk_enable = !!(csi2->output & CSI2_OUTPUT_CCDC); in csi2_link_setup()
1191 v4l2_device_unregister_subdev(&csi2->subdev); in omap3isp_csi2_unregister_entities()
1192 omap3isp_video_unregister(&csi2->video_out); in omap3isp_csi2_unregister_entities()
1201 csi2->subdev.dev = vdev->mdev->dev; in omap3isp_csi2_register_entities()
1202 ret = v4l2_device_register_subdev(vdev, &csi2->subdev); in omap3isp_csi2_register_entities()
1206 ret = omap3isp_video_register(&csi2->video_out, vdev); in omap3isp_csi2_register_entities()
1217 /* -----------------------------------------------------------------------------
1222 * csi2_init_entities - Initialize subdev and media entity.
1224 * return -ENOMEM or zero on success
1228 struct v4l2_subdev *sd = &csi2->subdev; in csi2_init_entities()
1229 struct media_pad *pads = csi2->pads; in csi2_init_entities()
1230 struct media_entity *me = &sd->entity; in csi2_init_entities()
1234 sd->internal_ops = &csi2_internal_ops; in csi2_init_entities()
1235 strscpy(sd->name, "OMAP3 ISP CSI2a", sizeof(sd->name)); in csi2_init_entities()
1237 sd->grp_id = 1 << 16; /* group ID for isp subdevs */ in csi2_init_entities()
1239 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; in csi2_init_entities()
1245 me->ops = &csi2_media_ops; in csi2_init_entities()
1253 csi2->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; in csi2_init_entities()
1254 csi2->video_out.ops = &csi2_ispvideo_ops; in csi2_init_entities()
1255 csi2->video_out.bpl_alignment = 32; in csi2_init_entities()
1256 csi2->video_out.bpl_zero_padding = 1; in csi2_init_entities()
1257 csi2->video_out.bpl_max = 0x1ffe0; in csi2_init_entities()
1258 csi2->video_out.isp = csi2->isp; in csi2_init_entities()
1259 csi2->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3; in csi2_init_entities()
1261 ret = omap3isp_video_init(&csi2->video_out, "CSI2a"); in csi2_init_entities()
1268 media_entity_cleanup(&csi2->subdev.entity); in csi2_init_entities()
1273 * omap3isp_csi2_init - Routine for module driver init
1277 struct isp_csi2_device *csi2a = &isp->isp_csi2a; in omap3isp_csi2_init()
1278 struct isp_csi2_device *csi2c = &isp->isp_csi2c; in omap3isp_csi2_init()
1281 csi2a->isp = isp; in omap3isp_csi2_init()
1282 csi2a->available = 1; in omap3isp_csi2_init()
1283 csi2a->regs1 = OMAP3_ISP_IOMEM_CSI2A_REGS1; in omap3isp_csi2_init()
1284 csi2a->regs2 = OMAP3_ISP_IOMEM_CSI2A_REGS2; in omap3isp_csi2_init()
1285 csi2a->phy = &isp->isp_csiphy2; in omap3isp_csi2_init()
1286 csi2a->state = ISP_PIPELINE_STREAM_STOPPED; in omap3isp_csi2_init()
1287 init_waitqueue_head(&csi2a->wait); in omap3isp_csi2_init()
1293 if (isp->revision == ISP_REVISION_15_0) { in omap3isp_csi2_init()
1294 csi2c->isp = isp; in omap3isp_csi2_init()
1295 csi2c->available = 1; in omap3isp_csi2_init()
1296 csi2c->regs1 = OMAP3_ISP_IOMEM_CSI2C_REGS1; in omap3isp_csi2_init()
1297 csi2c->regs2 = OMAP3_ISP_IOMEM_CSI2C_REGS2; in omap3isp_csi2_init()
1298 csi2c->phy = &isp->isp_csiphy1; in omap3isp_csi2_init()
1299 csi2c->state = ISP_PIPELINE_STREAM_STOPPED; in omap3isp_csi2_init()
1300 init_waitqueue_head(&csi2c->wait); in omap3isp_csi2_init()
1307 * omap3isp_csi2_cleanup - Routine for module driver cleanup
1311 struct isp_csi2_device *csi2a = &isp->isp_csi2a; in omap3isp_csi2_cleanup()
1313 omap3isp_video_cleanup(&csi2a->video_out); in omap3isp_csi2_cleanup()
1314 media_entity_cleanup(&csi2a->subdev.entity); in omap3isp_csi2_cleanup()