Lines Matching +full:0 +full:x1ff
9 #define VPBE_PID 0x0
10 #define VPBE_PCR 0x4
13 #define VPSSCLK_PID 0x00
14 #define VPSSCLK_CLKCTRL 0x04
17 #define VPSSBL_PID 0x00
18 #define VPSSBL_PCR 0x04
19 #define VPSSBL_BCR 0x08
20 #define VPSSBL_INTSTAT 0x0C
21 #define VPSSBL_INTSEL 0x10
22 #define VPSSBL_EVTSEL 0x14
23 #define VPSSBL_MEMCTRL 0x18
24 #define VPSSBL_CCDCMUX 0x1C
27 #define ISP5_PID 0x0
28 #define ISP5_PCCR 0x4
29 #define ISP5_BCR 0x8
30 #define ISP5_INTSTAT 0xC
31 #define ISP5_INTSEL1 0x10
32 #define ISP5_INTSEL2 0x14
33 #define ISP5_INTSEL3 0x18
34 #define ISP5_EVTSEL 0x1c
35 #define ISP5_CCDCMUX 0x20
38 #define OSD_MODE 0x00
39 #define OSD_VIDWINMD 0x04
40 #define OSD_OSDWIN0MD 0x08
41 #define OSD_OSDWIN1MD 0x0C
42 #define OSD_OSDATRMD 0x0C
43 #define OSD_RECTCUR 0x10
44 #define OSD_VIDWIN0OFST 0x18
45 #define OSD_VIDWIN1OFST 0x1C
46 #define OSD_OSDWIN0OFST 0x20
47 #define OSD_OSDWIN1OFST 0x24
48 #define OSD_VIDWINADH 0x28
49 #define OSD_VIDWIN0ADL 0x2C
50 #define OSD_VIDWIN0ADR 0x2C
51 #define OSD_VIDWIN1ADL 0x30
52 #define OSD_VIDWIN1ADR 0x30
53 #define OSD_OSDWINADH 0x34
54 #define OSD_OSDWIN0ADL 0x38
55 #define OSD_OSDWIN0ADR 0x38
56 #define OSD_OSDWIN1ADL 0x3C
57 #define OSD_OSDWIN1ADR 0x3C
58 #define OSD_BASEPX 0x40
59 #define OSD_BASEPY 0x44
60 #define OSD_VIDWIN0XP 0x48
61 #define OSD_VIDWIN0YP 0x4C
62 #define OSD_VIDWIN0XL 0x50
63 #define OSD_VIDWIN0YL 0x54
64 #define OSD_VIDWIN1XP 0x58
65 #define OSD_VIDWIN1YP 0x5C
66 #define OSD_VIDWIN1XL 0x60
67 #define OSD_VIDWIN1YL 0x64
68 #define OSD_OSDWIN0XP 0x68
69 #define OSD_OSDWIN0YP 0x6C
70 #define OSD_OSDWIN0XL 0x70
71 #define OSD_OSDWIN0YL 0x74
72 #define OSD_OSDWIN1XP 0x78
73 #define OSD_OSDWIN1YP 0x7C
74 #define OSD_OSDWIN1XL 0x80
75 #define OSD_OSDWIN1YL 0x84
76 #define OSD_CURXP 0x88
77 #define OSD_CURYP 0x8C
78 #define OSD_CURXL 0x90
79 #define OSD_CURYL 0x94
80 #define OSD_W0BMP01 0xA0
81 #define OSD_W0BMP23 0xA4
82 #define OSD_W0BMP45 0xA8
83 #define OSD_W0BMP67 0xAC
84 #define OSD_W0BMP89 0xB0
85 #define OSD_W0BMPAB 0xB4
86 #define OSD_W0BMPCD 0xB8
87 #define OSD_W0BMPEF 0xBC
88 #define OSD_W1BMP01 0xC0
89 #define OSD_W1BMP23 0xC4
90 #define OSD_W1BMP45 0xC8
91 #define OSD_W1BMP67 0xCC
92 #define OSD_W1BMP89 0xD0
93 #define OSD_W1BMPAB 0xD4
94 #define OSD_W1BMPCD 0xD8
95 #define OSD_W1BMPEF 0xDC
96 #define OSD_VBNDRY 0xE0
97 #define OSD_EXTMODE 0xE4
98 #define OSD_MISCCTL 0xE8
99 #define OSD_CLUTRAMYCB 0xEC
100 #define OSD_CLUTRAMCR 0xF0
101 #define OSD_TRANSPVAL 0xF4
102 #define OSD_TRANSPVALL 0xF4
103 #define OSD_TRANSPVALU 0xF8
104 #define OSD_TRANSPBMPIDX 0xFC
105 #define OSD_PPVWIN0ADR 0xFC
109 #define VPBE_PCR_CLK_OFF (1 << 0)
125 #define VPSSBL_INTSTAT_CCDC_VDINT0 (1 << 0)
131 /* VMOD TVTYP options for HDMD=0 */
132 #define SDTV_NTSC 0
135 #define HDTV_525P 0
148 #define OSD_MODE_CABG_SHIFT 0
149 #define OSD_MODE_CABG (0xff << 0)
165 #define OSD_VIDWINMD_ACT0 (1 << 0)
182 #define OSD_OSDWIN0MD_OACT0 (1 << 0)
200 #define OSD_OSDWIN1MD_OACT1 (1 << 0)
210 #define OSD_OSDATRMD_BLNK (1 << 0)
213 #define OSD_RECTCUR_RCAD (0xff << 8)
219 #define OSD_RECTCUR_RCACT (1 << 0)
221 #define OSD_VIDWIN0OFST_V0LO (0x1ff << 0)
223 #define OSD_VIDWIN1OFST_V1LO (0x1ff << 0)
225 #define OSD_OSDWIN0OFST_O0LO (0x1ff << 0)
227 #define OSD_OSDWIN1OFST_O1LO (0x1ff << 0)
231 #define OSD_VIDWIN0OFST_V0AH (0xf << 9)
232 #define OSD_VIDWIN1OFST_V1AH (0xf << 9)
233 #define OSD_OSDWIN0OFST_O0AH (0xf << 9)
234 #define OSD_OSDWIN1OFST_O1AH (0xf << 9)
237 #define OSD_VIDWINADH_V1AH (0x7f << 8)
238 #define OSD_VIDWINADH_V0AH_SHIFT 0
239 #define OSD_VIDWINADH_V0AH (0x7f << 0)
241 #define OSD_VIDWIN0ADL_V0AL (0xffff << 0)
243 #define OSD_VIDWIN1ADL_V1AL (0xffff << 0)
246 #define OSD_OSDWINADH_O1AH (0x7f << 8)
247 #define OSD_OSDWINADH_O0AH_SHIFT 0
248 #define OSD_OSDWINADH_O0AH (0x7f << 0)
250 #define OSD_OSDWIN0ADL_O0AL (0xffff << 0)
252 #define OSD_OSDWIN1ADL_O1AL (0xffff << 0)
254 #define OSD_BASEPX_BPX (0x3ff << 0)
256 #define OSD_BASEPY_BPY (0x1ff << 0)
258 #define OSD_VIDWIN0XP_V0X (0x7ff << 0)
260 #define OSD_VIDWIN0YP_V0Y (0x7ff << 0)
262 #define OSD_VIDWIN0XL_V0W (0x7ff << 0)
264 #define OSD_VIDWIN0YL_V0H (0x7ff << 0)
266 #define OSD_VIDWIN1XP_V1X (0x7ff << 0)
268 #define OSD_VIDWIN1YP_V1Y (0x7ff << 0)
270 #define OSD_VIDWIN1XL_V1W (0x7ff << 0)
272 #define OSD_VIDWIN1YL_V1H (0x7ff << 0)
274 #define OSD_OSDWIN0XP_W0X (0x7ff << 0)
276 #define OSD_OSDWIN0YP_W0Y (0x7ff << 0)
278 #define OSD_OSDWIN0XL_W0W (0x7ff << 0)
280 #define OSD_OSDWIN0YL_W0H (0x7ff << 0)
282 #define OSD_OSDWIN1XP_W1X (0x7ff << 0)
284 #define OSD_OSDWIN1YP_W1Y (0x7ff << 0)
286 #define OSD_OSDWIN1XL_W1W (0x7ff << 0)
288 #define OSD_OSDWIN1YL_W1H (0x7ff << 0)
290 #define OSD_CURXP_RCSX (0x7ff << 0)
292 #define OSD_CURYP_RCSY (0x7ff << 0)
294 #define OSD_CURXL_RCSW (0x7ff << 0)
296 #define OSD_CURYL_RCSH (0x7ff << 0)
313 #define OSD_EXTMODE_EXPFILVEN (1 << 0)
329 #define OSD_CLUTRAMYCB_Y (0xff << 8)
330 #define OSD_CLUTRAMYCB_CB_SHIFT 0
331 #define OSD_CLUTRAMYCB_CB (0xff << 0)
334 #define OSD_CLUTRAMCR_CR (0xff << 8)
335 #define OSD_CLUTRAMCR_CADDR_SHIFT 0
336 #define OSD_CLUTRAMCR_CADDR (0xff << 0)
338 #define OSD_TRANSPVAL_RGBTRANS (0xffff << 0)
340 #define OSD_TRANSPVALL_RGBL (0xffff << 0)
343 #define OSD_TRANSPVALU_Y (0xff << 8)
344 #define OSD_TRANSPVALU_RGBU_SHIFT 0
345 #define OSD_TRANSPVALU_RGBU (0xff << 0)
348 #define OSD_TRANSPBMPIDX_BMP1 (0xff << 8)
349 #define OSD_TRANSPBMPIDX_BMP0_SHIFT 0
350 #define OSD_TRANSPBMPIDX_BMP0 0xff