Lines Matching +full:0 +full:xf100
66 "0-one adapter per io, 1-one per tab with io, 2-one per tab, 3-one for all");
78 MODULE_PARM_DESC(xo2_speed, "default transfer speed for xo2 based duoflex, 0=55,1=75,2=90,3=104 MBi…
108 "attach dummy tuner to port 0 on Octopus V3 or Octopus Mini cards");
141 for (i = 0; i < dma->num; i++) { in ddb_set_dma_table()
143 ddbwritel(dev, mem & 0xffffffff, dma->bufregs + i * 8); in ddb_set_dma_table()
146 dma->bufval = ((dma->div & 0x0f) << 16) | in ddb_set_dma_table()
147 ((dma->num & 0x1f) << 11) | in ddb_set_dma_table()
148 ((dma->size >> 7) & 0x7ff); in ddb_set_dma_table()
155 for (i = 0; i < DDB_MAX_PORT; i++) { in ddb_set_dma_tables()
156 if (dev->port[i].input[0]) in ddb_set_dma_tables()
157 ddb_set_dma_table(dev->port[i].input[0]); in ddb_set_dma_tables()
178 for (i = 0; i < ddma->num; i++) { in ddb_redirect_dma()
180 ddbwritel(dev, mem & 0xffffffff, base + i * 8); in ddb_redirect_dma()
201 if (port->input[0]) { in ddb_unredirect()
202 iredi = port->input[0]->redi; in ddb_unredirect()
203 iredo = port->input[0]->redo; in ddb_unredirect()
207 if (iredo->port->input[0]) { in ddb_unredirect()
208 iredo->port->input[0]->redi = iredi; in ddb_unredirect()
212 port->input[0]->redo = NULL; in ddb_unredirect()
213 ddb_set_dma_table(port->input[0]); in ddb_unredirect()
216 port->input[0]->redi = NULL; in ddb_unredirect()
224 return 0; in ddb_unredirect()
229 struct ddb *idev = ddbs[(i >> 4) & 0x3f]; in ddb_redirect()
231 struct ddb *pdev = ddbs[(p >> 4) & 0x3f]; in ddb_redirect()
239 port = &pdev->port[p & 0x0f]; in ddb_redirect()
246 return 0; in ddb_redirect()
257 input2 = port->input[0]; in ddb_redirect()
271 return 0; in ddb_redirect()
284 for (i = 0; i < dma->num; i++) { in dma_free()
308 return 0; in dma_alloc()
309 for (i = 0; i < dma->num; i++) { in dma_alloc()
333 return 0; in dma_alloc()
341 for (i = 0; i < dev->port_num; i++) { in ddb_buffers_alloc()
345 if (port->input[0]->dma) in ddb_buffers_alloc()
346 if (dma_alloc(dev->pdev, port->input[0]->dma, 0) in ddb_buffers_alloc()
347 < 0) in ddb_buffers_alloc()
350 if (dma_alloc(dev->pdev, port->input[1]->dma, 0) in ddb_buffers_alloc()
351 < 0) in ddb_buffers_alloc()
356 if (port->input[0]->dma) in ddb_buffers_alloc()
357 if (dma_alloc(dev->pdev, port->input[0]->dma, 0) in ddb_buffers_alloc()
358 < 0) in ddb_buffers_alloc()
362 < 0) in ddb_buffers_alloc()
370 return 0; in ddb_buffers_alloc()
378 for (i = 0; i < dev->port_num; i++) { in ddb_buffers_free()
381 if (port->input[0] && port->input[0]->dma) in ddb_buffers_free()
382 dma_free(dev->pdev, port->input[0]->dma, 0); in ddb_buffers_free()
384 dma_free(dev->pdev, port->input[1]->dma, 0); in ddb_buffers_free()
394 u32 gap = 4, nco = 0; in calc_con()
396 *con = 0x1c; in calc_con()
397 if (output->port->gap != 0xffffffff) { in calc_con()
400 max_bitrate = 0; in calc_con()
402 if (dev->link[0].info->type == DDB_OCTOPUS_CI && output->port->nr > 1) { in calc_con()
403 *con = 0x10c; in calc_con()
404 if (dev->link[0].ids.regmapid >= 0x10003 && !(flags & 1)) { in calc_con()
407 max_bitrate = 0; in calc_con()
408 gap = 0; in calc_con()
411 *con |= 0x800; in calc_con()
413 *con |= 0x1000; in calc_con()
420 *con |= 0x1810; in calc_con()
434 *con |= 0x810; /* 96 MBit/s and gap */ in calc_con()
437 *con |= 0x10; /* enable gap */ in calc_con()
440 if (max_bitrate > 0) { in calc_con()
447 *con &= ~0x10; /* Disable gap */ in calc_con()
460 u32 con = 0x11c, con2 = 0; in ddb_output_start()
463 output->dma->cbuf = 0; in ddb_output_start()
464 output->dma->coff = 0; in ddb_output_start()
465 output->dma->stat = 0; in ddb_output_start()
466 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(output->dma)); in ddb_output_start()
468 if (output->port->input[0]->port->class == DDB_PORT_LOOP) in ddb_output_start()
469 con = (1UL << 13) | 0x14; in ddb_output_start()
471 calc_con(output, &con, &con2, 0); in ddb_output_start()
473 ddbwritel(dev, 0, TS_CONTROL(output)); in ddb_output_start()
475 ddbwritel(dev, 0, TS_CONTROL(output)); in ddb_output_start()
481 ddbwritel(dev, 0, DMA_BUFFER_ACK(output->dma)); in ddb_output_start()
497 ddbwritel(dev, 0, TS_CONTROL(output)); in ddb_output_stop()
499 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(output->dma)); in ddb_output_stop()
500 output->dma->running = 0; in ddb_output_stop()
511 ddbwritel(dev, 0, tag | TS_CONTROL(input)); in ddb_input_stop()
513 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(input->dma)); in ddb_input_stop()
514 input->dma->running = 0; in ddb_input_stop()
523 input->dma->cbuf = 0; in ddb_input_start()
524 input->dma->coff = 0; in ddb_input_start()
525 input->dma->stat = 0; in ddb_input_start()
526 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(input->dma)); in ddb_input_start()
528 ddbwritel(dev, 0, TS_CONTROL(input)); in ddb_input_start()
530 ddbwritel(dev, 0, TS_CONTROL(input)); in ddb_input_start()
534 ddbwritel(dev, 0, DMA_BUFFER_ACK(input->dma)); in ddb_input_start()
538 ddbwritel(dev, 0x09, TS_CONTROL(input)); in ddb_input_start()
541 ddbwritel(dev, 0x000fff01, TS_CONTROL2(input)); in ddb_input_start()
555 i = o->port->input[0]; in ddb_input_start_all()
572 i = o->port->input[0]; in ddb_input_stop_all()
584 idx = (stat >> 11) & 0x1f; in ddb_output_free()
585 off = (stat & 0x7ff) << 7; in ddb_output_free()
590 return 0; in ddb_output_free()
594 if (diff <= 0 || diff > (2 * 188)) in ddb_output_free()
596 return 0; in ddb_output_free()
606 idx = (stat >> 11) & 0x1f; in ddb_output_write()
607 off = (stat & 0x7ff) << 7; in ddb_output_write()
612 off == 0) { in ddb_output_write()
641 output->dma->coff = 0; in ddb_output_write()
659 idx = (stat >> 11) & 0x1f; in ddb_input_avail()
660 off = (stat & 0x7ff) << 7; in ddb_input_avail()
665 return 0; in ddb_input_avail()
669 return 0; in ddb_input_avail()
680 idx = (stat >> 11) & 0x1f; in ddb_input_read()
699 input->dma->coff = 0; in ddb_input_read()
732 ddb_output_free(output) >= 188) < 0) in ts_write()
736 if (stat < 0) in ts_write()
749 struct ddb_input *input = output->port->input[0]; in ts_read()
762 ddb_input_avail(input) >= 188) < 0) in ts_read()
766 if (stat < 0) in ts_read()
778 struct ddb_input *input = output->port->input[0]; in ts_poll()
780 __poll_t mask = 0; in ts_poll()
799 input = output->port->input[0]; in ts_release()
823 input = output->port->input[0]; in ts_open()
839 if (err < 0) in ts_open()
880 status = dvb->i2c_gate_ctrl(fe, 0); in locked_gate_ctrl()
893 memset(&config, 0, sizeof(config)); in demod_attach_drxk()
894 config.adr = 0x29 + (input->nr & 1); in demod_attach_drxk()
905 return 0; in demod_attach_drxk()
917 fe = dvb_attach(tda18271c2dd_attach, dvb->fe, i2c, 0x60); in tuner_attach_tda18271()
919 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 0); in tuner_attach_tda18271()
924 return 0; in tuner_attach_tda18271()
933 .demod_address = 0x1f,
935 .if_khz = 0,
940 .demod_address = 0x1e,
942 .if_khz = 0,
966 return 0; in demod_attach_stv0367()
975 u8 subaddr = 0x00; in tuner_tda18212_ping()
981 if (i2c_read_regs(adapter, adr, subaddr, tda_id, sizeof(tda_id)) < 0) in tuner_tda18212_ping()
983 if (i2c_read_regs(adapter, adr, subaddr, tda_id, sizeof(tda_id)) < 0) in tuner_tda18212_ping()
987 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 0); in tuner_tda18212_ping()
989 return 0; in tuner_tda18212_ping()
1000 cfg.i2c_addr = ((input->nr & 1) ? 0x6d : 0x6c) << 1; in demod_attach_cxd28xx()
1020 return 0; in demod_attach_cxd28xx()
1039 u8 addr = (input->nr & 1) ? 0x63 : 0x60; in tuner_attach_tda18212()
1053 dvb->i2c_client[0] = client; in tuner_attach_tda18212()
1054 return 0; in tuner_attach_tda18212()
1070 .address = 0x69,
1092 .address = 0x68,
1109 .addr = 0x60,
1115 .addr = 0x63,
1134 if (!dvb_attach(lnbh24_attach, dvb->fe, i2c, 0, in demod_attach_stv0900()
1135 0, (input->nr & 1) ? in demod_attach_stv0900()
1136 (0x09 - type) : (0x0b - type))) { in demod_attach_stv0900()
1141 return 0; in demod_attach_stv0900()
1174 return 0; in tuner_attach_stv6110()
1178 .adr = 0x68,
1182 .tsspeed = 0x28,
1186 .i2c_address = 0x0c << 1,
1194 return i2c_read_reg(i2c, adr, 0, &val) ? 0 : 1; in has_lnbh25()
1213 cfg.tsspeed = 0x10; in demod_attach_stv0910()
1218 cfg.adr = 0x6c; in demod_attach_stv0910()
1230 if (has_lnbh25(i2c, 0x0d)) in demod_attach_stv0910()
1231 lnbcfg.i2c_address = (((input->nr & 1) ? 0x0d : 0x0c) << 1); in demod_attach_stv0910()
1233 lnbcfg.i2c_address = (((input->nr & 1) ? 0x09 : 0x08) << 1); in demod_attach_stv0910()
1241 return 0; in demod_attach_stv0910()
1250 u8 adr = (type ? 0 : 4) + ((input->nr & 1) ? 0x63 : 0x60); in tuner_attach_stv6111()
1256 dev_err(dev, "No STV6111 found at 0x%02x!\n", adr); in tuner_attach_stv6111()
1260 return 0; in tuner_attach_stv6111()
1274 return 0; in demod_attach_dummy()
1299 return 0; in stop_feed()
1308 case 0x31: in dvb_input_detach()
1314 case 0x30: in dvb_input_detach()
1315 dvb_module_release(dvb->i2c_client[0]); in dvb_input_detach()
1316 dvb->i2c_client[0] = NULL; in dvb_input_detach()
1325 case 0x20: in dvb_input_detach()
1328 case 0x12: in dvb_input_detach()
1334 case 0x11: in dvb_input_detach()
1337 case 0x10: in dvb_input_detach()
1340 case 0x01: in dvb_input_detach()
1343 dvb->attached = 0x00; in dvb_input_detach()
1348 int i, ret = 0; in dvb_register_adapters()
1353 port = &dev->port[0]; in dvb_register_adapters()
1354 adap = port->dvb[0].adap; in dvb_register_adapters()
1358 if (ret < 0) in dvb_register_adapters()
1360 port->dvb[0].adap_registered = 1; in dvb_register_adapters()
1361 for (i = 0; i < dev->port_num; i++) { in dvb_register_adapters()
1363 port->dvb[0].adap = adap; in dvb_register_adapters()
1366 return 0; in dvb_register_adapters()
1369 for (i = 0; i < dev->port_num; i++) { in dvb_register_adapters()
1373 adap = port->dvb[0].adap; in dvb_register_adapters()
1378 if (ret < 0) in dvb_register_adapters()
1380 port->dvb[0].adap_registered = 1; in dvb_register_adapters()
1382 if (adapter_alloc > 0) { in dvb_register_adapters()
1383 port->dvb[1].adap = port->dvb[0].adap; in dvb_register_adapters()
1391 if (ret < 0) in dvb_register_adapters()
1398 adap = port->dvb[0].adap; in dvb_register_adapters()
1403 if (ret < 0) in dvb_register_adapters()
1405 port->dvb[0].adap_registered = 1; in dvb_register_adapters()
1410 adap = port->dvb[0].adap; in dvb_register_adapters()
1415 if (ret < 0) in dvb_register_adapters()
1417 port->dvb[0].adap_registered = 1; in dvb_register_adapters()
1430 for (i = 0; i < dev->link[0].info->port_num; i++) { in dvb_unregister_adapters()
1433 dvb = &port->dvb[0]; in dvb_unregister_adapters()
1436 dvb->adap_registered = 0; in dvb_unregister_adapters()
1441 dvb->adap_registered = 0; in dvb_unregister_adapters()
1447 int ret = 0; in dvb_input_attach()
1453 int par = 0, osc24 = 0, tsfast = 0; in dvb_input_attach()
1464 if (port->nr == 0 && in dvb_input_attach()
1467 /* fast TS on port 0 requires FPGA version >= 1.7 */ in dvb_input_attach()
1468 if ((devids->hwid & 0x00ffffff) >= 0x00010007) in dvb_input_attach()
1472 dvb->attached = 0x01; in dvb_input_attach()
1482 if (ret < 0) in dvb_input_attach()
1484 dvb->attached = 0x10; in dvb_input_attach()
1489 if (ret < 0) in dvb_input_attach()
1491 dvb->attached = 0x11; in dvb_input_attach()
1498 if (ret < 0) in dvb_input_attach()
1500 dvb->attached = 0x12; in dvb_input_attach()
1503 if (ret < 0) in dvb_input_attach()
1505 dvb->attached = 0x20; in dvb_input_attach()
1511 if (ddb_fe_attach_mxl5xx(input) < 0) in dvb_input_attach()
1515 if (demod_attach_stv0900(input, 0) < 0) in dvb_input_attach()
1517 if (tuner_attach_stv6110(input, 0) < 0) in dvb_input_attach()
1521 if (demod_attach_stv0900(input, 1) < 0) in dvb_input_attach()
1523 if (tuner_attach_stv6110(input, 1) < 0) in dvb_input_attach()
1527 if (demod_attach_stv0910(input, 0, tsfast) < 0) in dvb_input_attach()
1529 if (tuner_attach_stv6111(input, 0) < 0) in dvb_input_attach()
1533 if (demod_attach_stv0910(input, 1, tsfast) < 0) in dvb_input_attach()
1535 if (tuner_attach_stv6111(input, 1) < 0) in dvb_input_attach()
1539 if (demod_attach_stv0910(input, 0, tsfast) < 0) in dvb_input_attach()
1541 if (tuner_attach_stv6111(input, 1) < 0) in dvb_input_attach()
1545 if (demod_attach_drxk(input) < 0) in dvb_input_attach()
1547 if (tuner_attach_tda18271(input) < 0) in dvb_input_attach()
1551 if (demod_attach_stv0367(input) < 0) in dvb_input_attach()
1553 if (tuner_attach_tda18212(input, port->type) < 0) in dvb_input_attach()
1559 osc24 = 0; in dvb_input_attach()
1568 par = 0; in dvb_input_attach()
1571 if (demod_attach_cxd28xx(input, par, osc24) < 0) in dvb_input_attach()
1573 if (tuner_attach_tda18212(input, port->type) < 0) in dvb_input_attach()
1582 if (demod_attach_cxd28xx(input, 0, osc24) < 0) in dvb_input_attach()
1584 if (tuner_attach_tda18212(input, port->type) < 0) in dvb_input_attach()
1588 if (demod_attach_dummy(input) < 0) in dvb_input_attach()
1592 if (ddb_fe_attach_mci(input, port->type) < 0) in dvb_input_attach()
1596 return 0; in dvb_input_attach()
1598 dvb->attached = 0x30; in dvb_input_attach()
1601 if (dvb_register_frontend(adap, dvb->fe) < 0) in dvb_input_attach()
1605 if (dvb_register_frontend(adap, dvb->fe2) < 0) { in dvb_input_attach()
1616 dvb->attached = 0x31; in dvb_input_attach()
1617 return 0; in dvb_input_attach()
1630 if (ret < 0) in dvb_input_attach()
1640 int ret = i2c_read_reg(&port->i2c->adap, 0x20, 0, &val); in port_has_encti()
1643 dev_info(dev, "[0x20]=0x%02x\n", val); in port_has_encti()
1644 return ret ? 0 : 1; in port_has_encti()
1650 u8 probe[4] = { 0xe0, 0x00, 0x00, 0x00 }, data[4]; in port_has_cxd()
1651 struct i2c_msg msgs[2] = {{ .addr = 0x40, .flags = 0, in port_has_cxd()
1653 { .addr = 0x40, .flags = I2C_M_RD, in port_has_cxd()
1657 return 0; in port_has_cxd()
1659 if (data[0] == 0x02 && data[1] == 0x2b && data[3] == 0x43) in port_has_cxd()
1668 u8 probe[1] = { 0x00 }, data[4]; in port_has_xo2()
1670 if (i2c_io(&port->i2c->adap, 0x10, probe, 1, data, 4)) in port_has_xo2()
1671 return 0; in port_has_xo2()
1672 if (data[0] == 'D' && data[1] == 'F') { in port_has_xo2()
1677 if (data[0] == 'C' && data[1] == 'I') { in port_has_xo2()
1682 return 0; in port_has_xo2()
1689 if (i2c_read_reg16(&port->i2c->adap, 0x69, 0xf100, &val) < 0) in port_has_stv0900()
1690 return 0; in port_has_stv0900()
1696 if (i2c_read_reg16(&port->i2c->adap, 0x68, 0xf100, id) < 0) in port_has_stv0900_aa()
1697 return 0; in port_has_stv0900_aa()
1705 if (i2c_read(&port->i2c->adap, 0x29, &val) < 0) in port_has_drxks()
1706 return 0; in port_has_drxks()
1707 if (i2c_read(&port->i2c->adap, 0x2a, &val) < 0) in port_has_drxks()
1708 return 0; in port_has_drxks()
1716 if (i2c_read_reg16(&port->i2c->adap, 0x1e, 0xf000, &val) < 0) in port_has_stv0367()
1717 return 0; in port_has_stv0367()
1718 if (val != 0x60) in port_has_stv0367()
1719 return 0; in port_has_stv0367()
1720 if (i2c_read_reg16(&port->i2c->adap, 0x1f, 0xf000, &val) < 0) in port_has_stv0367()
1721 return 0; in port_has_stv0367()
1722 if (val != 0x60) in port_has_stv0367()
1723 return 0; in port_has_stv0367()
1734 res = i2c_read_regs(i2c, 0x10, 0x04, data, 2); in init_xo2()
1735 if (res < 0) in init_xo2()
1738 if (data[0] != 0x01) { in init_xo2()
1743 i2c_read_reg(i2c, 0x10, 0x08, &val); in init_xo2()
1744 if (val != 0) { in init_xo2()
1745 i2c_write_reg(i2c, 0x10, 0x08, 0x00); in init_xo2()
1749 i2c_write_reg(i2c, 0x10, 0x08, 0x04); in init_xo2()
1752 i2c_write_reg(i2c, 0x10, 0x08, 0x07); in init_xo2()
1754 /* speed: 0=55,1=75,2=90,3=104 MBit/s */ in init_xo2()
1755 i2c_write_reg(i2c, 0x10, 0x09, xo2_speed); in init_xo2()
1759 i2c_write_reg(i2c, 0x10, 0x0a, 0x03); in init_xo2()
1760 i2c_write_reg(i2c, 0x10, 0x0b, 0x03); in init_xo2()
1762 i2c_write_reg(i2c, 0x10, 0x0a, 0x01); in init_xo2()
1763 i2c_write_reg(i2c, 0x10, 0x0b, 0x01); in init_xo2()
1768 i2c_write_reg(i2c, 0x10, 0x08, 0x87); in init_xo2()
1770 return 0; in init_xo2()
1780 res = i2c_read_regs(i2c, 0x10, 0x04, data, 2); in init_xo2_ci()
1781 if (res < 0) in init_xo2_ci()
1784 if (data[0] > 1) { in init_xo2_ci()
1786 port->nr, data[0]); in init_xo2_ci()
1790 port->nr, data[0], data[1]); in init_xo2_ci()
1792 i2c_read_reg(i2c, 0x10, 0x08, &val); in init_xo2_ci()
1793 if (val != 0) { in init_xo2_ci()
1794 i2c_write_reg(i2c, 0x10, 0x08, 0x00); in init_xo2_ci()
1798 i2c_write_reg(i2c, 0x10, 0x08, 3); in init_xo2_ci()
1801 /* speed: 0=55,1=75,2=90,3=104 MBit/s */ in init_xo2_ci()
1802 i2c_write_reg(i2c, 0x10, 0x09, 1); in init_xo2_ci()
1804 i2c_write_reg(i2c, 0x10, 0x08, 0x83); in init_xo2_ci()
1809 i2c_write_reg(i2c, 0x10, 0x0a, 0x03); in init_xo2_ci()
1810 i2c_write_reg(i2c, 0x10, 0x0b, 0x03); in init_xo2_ci()
1812 i2c_write_reg(i2c, 0x10, 0x0a, 0x01); in init_xo2_ci()
1813 i2c_write_reg(i2c, 0x10, 0x0b, 0x01); in init_xo2_ci()
1815 return 0; in init_xo2_ci()
1823 status = i2c_write_reg(&port->i2c->adap, 0x6e, 0, 0); in port_has_cxd28xx()
1825 return 0; in port_has_cxd28xx()
1826 status = i2c_read_reg(i2c, 0x6e, 0xfd, id); in port_has_cxd28xx()
1828 return 0; in port_has_cxd28xx()
1859 link->ids.device == 0x0005) { in ddb_port_probe()
1950 case 0xa4: in ddb_port_probe()
1955 case 0xb1: in ddb_port_probe()
1960 case 0xb0: in ddb_port_probe()
1965 case 0xc1: in ddb_port_probe()
1984 if (id == 0x51) { in ddb_port_probe()
1985 if (port->nr == 0 && in ddb_port_probe()
2020 int ret = 0; in ddb_port_attach()
2024 ret = dvb_input_attach(port->input[0]); in ddb_port_attach()
2025 if (ret < 0) in ddb_port_attach()
2028 if (ret < 0) { in ddb_port_attach()
2029 dvb_input_detach(port->input[0]); in ddb_port_attach()
2032 port->input[0]->redi = port->input[0]; in ddb_port_attach()
2037 if (ret < 0) in ddb_port_attach()
2041 ret = dvb_register_device(port->dvb[0].adap, in ddb_port_attach()
2042 &port->dvb[0].dev, in ddb_port_attach()
2044 DVB_DEVICE_SEC, 0); in ddb_port_attach()
2049 if (ret < 0) in ddb_port_attach()
2057 int i, numports, err_ports = 0, ret = 0; in ddb_ports_attach()
2062 if (ret < 0) { in ddb_ports_attach()
2070 for (i = 0; i < dev->port_num; i++) { in ddb_ports_attach()
2091 return 0; in ddb_ports_attach()
2099 for (i = 0; i < dev->port_num; i++) { in ddb_ports_detach()
2105 dvb_input_detach(port->input[0]); in ddb_ports_detach()
2123 output->dma->cbuf = (input->dma->stat >> 11) & 0x1f; in input_write_output()
2124 output->dma->coff = (input->dma->stat & 0x7ff) << 7; in input_write_output()
2150 ack = 0; in input_write_dvb()
2152 while (dma->cbuf != ((dma->stat >> 11) & 0x1f) || in input_write_dvb()
2241 info = io->port->dev->link[0].info; in io_regmap()
2252 const struct ddb_regmap *rm = io_regmap(io, 0); in ddb_dma_init()
2275 ddbwritel(io->port->dev, 0, DMA_BUFFER_ACK(dma)); in ddb_dma_init()
2296 const struct ddb_regmap *rm0 = io_regmap(input, 0); in ddb_input_init()
2306 ddb_irq_set(dev, 0, dma_nr + base, &input_handler, input); in ddb_input_init()
2307 ddb_dma_init(input, dma_nr, 0); in ddb_input_init()
2328 const struct ddb_regmap *rm0 = io_regmap(output, 0); in ddb_output_init()
2331 ddb_irq_set(dev, 0, nr + base, &output_handler, output); in ddb_output_init()
2341 for (i = 0; i < dev->i2c_num; i++) { in ddb_port_match_i2c()
2348 return 0; in ddb_port_match_i2c()
2356 for (i = 0; i < dev->i2c_num; i++) { in ddb_port_match_link_i2c()
2362 return 0; in ddb_port_match_link_i2c()
2372 for (p = l = 0; l < DDB_MAX_LINK; l++) { in ddb_ports_init()
2379 for (i = 0; i < info->port_num; i++, p++) { in ddb_ports_init()
2385 port->gap = 0xffffffff; in ddb_ports_init()
2396 port->dvb[0].adap = &dev->adap[2 * p]; in ddb_ports_init()
2413 ddb_input_init(port, 2 * i, 0, 2 * i); in ddb_ports_init()
2420 ddb_input_init(port, 2 * i - 1, 0, 2 * i - 1); in ddb_ports_init()
2431 ddb_input_init(port, 2 + i, 0, 2 + i); in ddb_ports_init()
2438 ddb_input_init(port, 2 * i, 0, 2 * i); in ddb_ports_init()
2445 ddb_input_init(port, 2 * i, 0, 2 * p); in ddb_ports_init()
2461 for (i = 0; i < dev->port_num; i++) { in ddb_ports_release()
2463 if (port->input[0] && port->input[0]->dma) in ddb_ports_release()
2464 cancel_work_sync(&port->input[0]->dma->work); in ddb_ports_release()
2477 do { if ((s & (1UL << ((_nr) & 0x1f))) && \
2478 dev->link[0].irq[_nr].handler) \
2479 dev->link[0].irq[_nr].handler(dev->link[0].irq[_nr].data); } \
2480 while (0)
2483 if (s & (0x0000000f << ((_shift) & 0x1f))) { \
2484 IRQ_HANDLE(0 + (_shift)); \
2492 if (s & (0x000000ff << ((_shift) & 0x1f))) { \
2493 IRQ_HANDLE(0 + (_shift)); \
2507 IRQ_HANDLE_NIBBLE(0); in irq_handle_msg()
2522 u32 mask = 0x8fffff00; in ddb_irq_handler0()
2528 if (s & 0x80000000) in ddb_irq_handler0()
2540 u32 mask = 0x8000000f; in ddb_irq_handler1()
2546 if (s & 0x80000000) in ddb_irq_handler1()
2564 if (s & 0x80000000) in ddb_irq_handler()
2568 if (s & 0x0000000f) in ddb_irq_handler()
2570 if (s & 0x0fffff00) in ddb_irq_handler()
2583 u32 count = 0; in reg_wait()
2590 return 0; in reg_wait()
2613 ddbwritel(dev, 0x0001 | ((wlen << (8 + 3)) & 0x1f00), in flashio()
2616 ddbwritel(dev, 0x0003 | ((wlen << (8 + 3)) & 0x1f00), in flashio()
2619 data = 0; in flashio()
2634 ddbwritel(dev, 0, tag | SPI_CONTROL); in flashio()
2641 ddbwritel(dev, 0xffffffff, tag | SPI_DATA); in flashio()
2649 ddbwritel(dev, 0x0003 | ((rlen << (8 + 3)) & 0x1F00), in flashio()
2651 ddbwritel(dev, 0xffffffff, tag | SPI_DATA); in flashio()
2656 ddbwritel(dev, 0, tag | SPI_CONTROL); in flashio()
2661 while (rlen > 0) { in flashio()
2662 *rbuf = ((data >> 24) & 0xff); in flashio()
2669 return 0; in flashio()
2677 u8 cmd[4] = {0x03, (addr >> 16) & 0xff, in ddbridge_flashread()
2678 (addr >> 8) & 0xff, addr & 0xff}; in ddbridge_flashread()
2698 return 0; in ddb_release()
2709 return 0; in ddb_open()
2796 int num = attr->attr.name[8] - 0x30; in fanspeed_show()
2800 spd = ddblreadl(link, TEMPMON_FANCONTROL) & 0xff; in fanspeed_show()
2808 struct ddb_link *link = &dev->link[0]; in temp_show()
2816 if (i2c_read_regs(adap, 0x48, 0, tmp, 2) < 0) in temp_show()
2818 temp = (tmp[0] << 3) | (tmp[1] >> 5); in temp_show()
2821 if (i2c_read_regs(adap, 0x49, 0, tmp, 2) < 0) in temp_show()
2823 temp2 = (tmp[0] << 3) | (tmp[1] >> 5); in temp_show()
2837 int num = attr->attr.name[4] - 0x30; in ctemp_show()
2841 return 0; in ctemp_show()
2842 if (i2c_read_regs(adap, 0x49, 0, tmp, 2) < 0) in ctemp_show()
2843 if (i2c_read_regs(adap, 0x4d, 0, tmp, 2) < 0) in ctemp_show()
2845 temp = tmp[0] * 1000; in ctemp_show()
2853 int num = attr->attr.name[3] - 0x30; in led_show()
2855 return sprintf(buf, "%d\n", dev->leds & (1 << num) ? 1 : 0); in led_show()
2860 if (!dev->link[0].info->led_num) in ddb_set_led()
2867 0x69, 0xf14c, val ? 2 : 0); in ddb_set_led()
2871 0x1f, 0xf00e, 0); in ddb_set_led()
2873 0x1f, 0xf00f, val ? 1 : 0); in ddb_set_led()
2879 i2c_read_reg(&dev->i2c[num].adap, 0x10, 0x08, &v); in ddb_set_led()
2880 v = (v & ~0x10) | (val ? 0x10 : 0); in ddb_set_led()
2881 i2c_write_reg(&dev->i2c[num].adap, 0x10, 0x08, v); in ddb_set_led()
2896 int num = attr->attr.name[3] - 0x30; in led_store()
2914 int num = attr->attr.name[3] - 0x30; in snr_show()
2917 if (i2c_read_regs(&dev->i2c[num].adap, 0x10, 0x10, snr, 16) < 0) in snr_show()
2919 snr[16] = 0; in snr_show()
2921 /* serial number at 0x100-0x11f */ in snr_show()
2923 0x57, 0x100, snr, 32) < 0) in snr_show()
2925 0x50, 0x100, snr, 32) < 0) in snr_show()
2927 snr[31] = 0; /* in case it is not terminated on EEPROM */ in snr_show()
2938 ddbridge_flashread(dev, 0, snr, 0x10, 15); in bsnr_show()
2939 snr[15] = 0; /* in case it is not terminated on EEPROM */ in bsnr_show()
2950 return 0; in bpsnr_show()
2952 if (i2c_read_regs16(&dev->i2c[0].adap, in bpsnr_show()
2953 0x50, 0x0000, snr, 32) < 0 || in bpsnr_show()
2954 snr[0] == 0xff) in bpsnr_show()
2956 snr[31] = 0; /* in case it is not terminated on EEPROM */ in bpsnr_show()
2963 return 0; in redirect_show()
2976 if (res < 0) in redirect_store()
2986 int num = attr->attr.name[3] - 0x30; in gap_show()
2995 int num = attr->attr.name[3] - 0x30; in gap_store()
3003 val = 0xffffffff; in gap_store()
3014 dev->link[0].ids.hwid, dev->link[0].ids.regmapid); in version_show()
3022 return sprintf(buf, "0x%08X\n", dev->link[0].ids.hwid); in hwid_show()
3030 return sprintf(buf, "0x%08X\n", dev->link[0].ids.regmapid); in regmap_show()
3036 int num = attr->attr.name[5] - 0x30; in fmode_show()
3045 int num = attr->attr.name[5] - 0x30; in devid_show()
3055 int num = attr->attr.name[5] - 0x30; in fmode_store()
3135 ddb_major = register_chrdev(0, DDB_NAME, &ddb_fops); in ddb_class_create()
3136 if (ddb_major < 0) in ddb_class_create()
3138 if (class_register(&ddb_class) < 0) in ddb_class_create()
3140 return 0; in ddb_class_create()
3153 for (i = 0; i < 4; i++) in ddb_device_attrs_del()
3157 for (i = 0; i < dev->link[0].info->temp_num; i++) in ddb_device_attrs_del()
3159 for (i = 0; i < dev->link[0].info->fan_num; i++) in ddb_device_attrs_del()
3161 for (i = 0; i < dev->i2c_num && i < 4; i++) { in ddb_device_attrs_del()
3162 if (dev->link[0].info->led_num) in ddb_device_attrs_del()
3167 for (i = 0; ddb_attrs[i].attr.name; i++) in ddb_device_attrs_del()
3175 for (i = 0; ddb_attrs[i].attr.name; i++) in ddb_device_attrs_add()
3178 for (i = 0; i < dev->link[0].info->temp_num; i++) in ddb_device_attrs_add()
3181 for (i = 0; i < dev->link[0].info->fan_num; i++) in ddb_device_attrs_add()
3184 for (i = 0; (i < dev->i2c_num) && (i < 4); i++) { in ddb_device_attrs_add()
3189 if (dev->link[0].info->led_num) in ddb_device_attrs_add()
3194 for (i = 0; i < 4; i++) in ddb_device_attrs_add()
3199 return 0; in ddb_device_attrs_add()
3206 int res = 0; in ddb_device_create()
3252 TEMPMON_CONTROL_OVERTEMP) != 0) { in tempmon_setfan()
3256 temp = (ddblreadl(link, TEMPMON_SENSOR0) >> 8) & 0xFF; in tempmon_setfan()
3257 if (temp & 0x80) in tempmon_setfan()
3258 temp = 0; in tempmon_setfan()
3259 temp2 = (ddblreadl(link, TEMPMON_SENSOR1) >> 8) & 0xFF; in tempmon_setfan()
3260 if (temp2 & 0x80) in tempmon_setfan()
3261 temp2 = 0; in tempmon_setfan()
3265 pwm = (ddblreadl(link, TEMPMON_FANCONTROL) >> 8) & 0x0F; in tempmon_setfan()
3291 int status = 0; in tempmon_init()
3310 TEMPMON_CONTROL_OVERTEMP) != 0); in tempmon_init()
3325 return 0; in ddb_init_tempmon()
3327 if (link->ids.regmapid < 0x00010002) in ddb_init_tempmon()
3328 return 0; in ddb_init_tempmon()
3344 for (l = 0; l < DDB_MAX_LINK; l++) { in ddb_init_boards()
3351 ddbwritel(dev, 0, DDB_LINK_TAG(l) | BOARD_CONTROL); in ddb_init_boards()
3363 return 0; in ddb_init_boards()
3368 mutex_init(&dev->link[0].lnb.lock); in ddb_init()
3369 mutex_init(&dev->link[0].flash_mutex); in ddb_init()
3372 return 0; in ddb_init()
3377 if (ddb_i2c_init(dev) < 0) in ddb_init()
3380 if (ddb_buffers_alloc(dev) < 0) { in ddb_init()
3384 if (ddb_ports_attach(dev) < 0) in ddb_init()
3389 if (dev->link[0].info->fan_num) { in ddb_init()
3393 return 0; in ddb_init()
3441 if (ddb_class_create() < 0) in ddb_init_ddbridge()
3443 ddb_wq = alloc_workqueue("ddbridge", 0, 0); in ddb_init_ddbridge()
3447 return 0; in ddb_init_ddbridge()