Lines Matching +full:0 +full:xfffffe00
26 static unsigned int card[] = {[0 ... (CX25821_MAXBOARDS - 1)] = UNSET };
330 pr_cont("0x%08x [ %s", in cx25821_risc_decode()
332 for (i = ARRAY_SIZE(bits) - 1; i >= 0; i--) { in cx25821_risc_decode()
336 pr_cont(" count=%d ]\n", risc & 0xfff); in cx25821_risc_decode()
344 return cx_read(bus->reg_stat) & 0x01; in i2c_slave_did_ack()
352 cx_write(DEV_CNTRL2, 0x20); in cx25821_registers_init()
357 cx_write(PCI_INT_MSK, 0x2001FFFF); in cx25821_registers_init()
364 cx_write(PLL_A_INT_FRAC, 0x9807A58B); in cx25821_registers_init()
366 /* PLL_A_POST = 0x1C, PLL_A_OUT_TO_PIN = 0x1 */ in cx25821_registers_init()
367 cx_write(PLL_A_POST_STAT_BIST, 0x8000019C); in cx25821_registers_init()
371 cx_write(PLL_A_INT_FRAC, tmp & 0x7FFFFFFF); in cx25821_registers_init()
374 cx_write(PLL_B_INT_FRAC, 0x9883A86F); in cx25821_registers_init()
376 /* PLL_B_POST = 0xD, PLL_B_OUT_TO_PIN = 0x0 */ in cx25821_registers_init()
377 cx_write(PLL_B_POST_STAT_BIST, 0x8000018D); in cx25821_registers_init()
381 cx_write(PLL_B_INT_FRAC, tmp & 0x7FFFFFFF); in cx25821_registers_init()
384 cx_write(PLL_C_INT_FRAC, 0x96A0EA3F); in cx25821_registers_init()
386 /* PLL_C_POST = 0x3, PLL_C_OUT_TO_PIN = 0x0 */ in cx25821_registers_init()
387 cx_write(PLL_C_POST_STAT_BIST, 0x80000103); in cx25821_registers_init()
391 cx_write(PLL_C_INT_FRAC, tmp & 0x7FFFFFFF); in cx25821_registers_init()
394 cx_write(PLL_D_INT_FRAC, 0x98757F5B); in cx25821_registers_init()
396 /* PLL_D_POST = 0x13, PLL_D_OUT_TO_PIN = 0x0 */ in cx25821_registers_init()
397 cx_write(PLL_D_POST_STAT_BIST, 0x80000113); in cx25821_registers_init()
401 cx_write(PLL_D_INT_FRAC, tmp & 0x7FFFFFFF); in cx25821_registers_init()
406 cx_write(VID_CH_CLK_SEL, (tmp & 0x00FFFFFF) | 0x24000000); in cx25821_registers_init()
412 /* cx_write( VID_CH_MODE_SEL, tmp | 0x1B0001FF); */ in cx25821_registers_init()
413 cx_write(VID_CH_MODE_SEL, tmp & 0xFFFFFE00); in cx25821_registers_init()
431 if (ch->cmds_start == 0) { in cx25821_sram_channel_setup()
432 cx_write(ch->ptr1_reg, 0); in cx25821_sram_channel_setup()
433 cx_write(ch->ptr2_reg, 0); in cx25821_sram_channel_setup()
434 cx_write(ch->cnt2_reg, 0); in cx25821_sram_channel_setup()
435 cx_write(ch->cnt1_reg, 0); in cx25821_sram_channel_setup()
436 return 0; in cx25821_sram_channel_setup()
448 cx_write(8 + 0, RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC); in cx25821_sram_channel_setup()
450 cx_write(8 + 8, 0); in cx25821_sram_channel_setup()
453 for (i = 0; i < lines; i++) { in cx25821_sram_channel_setup()
455 cx_write(cdt + 16 * i + 4, 0); in cx25821_sram_channel_setup()
456 cx_write(cdt + 16 * i + 8, 0); in cx25821_sram_channel_setup()
457 cx_write(cdt + 16 * i + 12, 0); in cx25821_sram_channel_setup()
461 for (i = 0; i < 128; i++) in cx25821_sram_channel_setup()
466 cx_write(ch->cmds_start + 0, 8); in cx25821_sram_channel_setup()
468 cx_write(ch->cmds_start + 0, risc); in cx25821_sram_channel_setup()
470 cx_write(ch->cmds_start + 4, 0); /* 64 bits 63-32 */ in cx25821_sram_channel_setup()
476 cx_write(ch->cmds_start + 20, 0x80000000 | (64 >> 2)); in cx25821_sram_channel_setup()
481 cx_write(ch->cmds_start + i, 0); in cx25821_sram_channel_setup()
489 return 0; in cx25821_sram_channel_setup()
499 if (ch->cmds_start == 0) { in cx25821_sram_channel_setup_audio()
500 cx_write(ch->ptr1_reg, 0); in cx25821_sram_channel_setup_audio()
501 cx_write(ch->ptr2_reg, 0); in cx25821_sram_channel_setup_audio()
502 cx_write(ch->cnt2_reg, 0); in cx25821_sram_channel_setup_audio()
503 cx_write(ch->cnt1_reg, 0); in cx25821_sram_channel_setup_audio()
504 return 0; in cx25821_sram_channel_setup_audio()
516 cx_write(8 + 0, RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC); in cx25821_sram_channel_setup_audio()
518 cx_write(8 + 8, 0); in cx25821_sram_channel_setup_audio()
521 for (i = 0; i < lines; i++) { in cx25821_sram_channel_setup_audio()
523 cx_write(cdt + 16 * i + 4, 0); in cx25821_sram_channel_setup_audio()
524 cx_write(cdt + 16 * i + 8, 0); in cx25821_sram_channel_setup_audio()
525 cx_write(cdt + 16 * i + 12, 0); in cx25821_sram_channel_setup_audio()
530 cx_write(ch->cmds_start + 0, 8); in cx25821_sram_channel_setup_audio()
532 cx_write(ch->cmds_start + 0, risc); in cx25821_sram_channel_setup_audio()
534 cx_write(ch->cmds_start + 4, 0); /* 64 bits 63-32 */ in cx25821_sram_channel_setup_audio()
541 cx_write(ch->cmds_start + 20, 0x80000000 | (64 >> 2)); in cx25821_sram_channel_setup_audio()
547 cx_write(ch->cmds_start + i, 0); in cx25821_sram_channel_setup_audio()
555 return 0; in cx25821_sram_channel_setup_audio()
581 for (i = 0; i < ARRAY_SIZE(name); i++) in cx25821_sram_channel_dump()
582 pr_warn("cmds + 0x%2x: %-15s: 0x%08x\n", in cx25821_sram_channel_dump()
586 for (i = 0; i < 4;) { in cx25821_sram_channel_dump()
588 pr_warn("cmds + 0x%2x: risc%d: ", j + i * 4, i); in cx25821_sram_channel_dump()
592 for (i = 0; i < (64 >> 2); i += n) { in cx25821_sram_channel_dump()
596 pr_warn("ctrl + 0x%2x (0x%08x): iq %x: ", in cx25821_sram_channel_dump()
601 pr_warn("ctrl + 0x%2x : iq %x: 0x%08x [ arg #%d ]\n", in cx25821_sram_channel_dump()
606 pr_warn(" : fifo: 0x%08x -> 0x%x\n", in cx25821_sram_channel_dump()
608 pr_warn(" : ctrl: 0x%08x -> 0x%x\n", in cx25821_sram_channel_dump()
610 pr_warn(" : ptr1_reg: 0x%08x\n", in cx25821_sram_channel_dump()
612 pr_warn(" : ptr2_reg: 0x%08x\n", in cx25821_sram_channel_dump()
614 pr_warn(" : cnt1_reg: 0x%08x\n", in cx25821_sram_channel_dump()
616 pr_warn(" : cnt2_reg: 0x%08x\n", in cx25821_sram_channel_dump()
646 for (i = 0; i < ARRAY_SIZE(name); i++) in cx25821_sram_channel_dump_audio()
647 pr_info("%s: cmds + 0x%2x: %-15s: 0x%08x\n", in cx25821_sram_channel_dump_audio()
652 for (i = 0; i < 4;) { in cx25821_sram_channel_dump_audio()
654 pr_warn("cmds + 0x%2x: risc%d: ", j + i * 4, i); in cx25821_sram_channel_dump_audio()
658 for (i = 0; i < (64 >> 2); i += n) { in cx25821_sram_channel_dump_audio()
662 pr_warn("ctrl + 0x%2x (0x%08x): iq %x: ", in cx25821_sram_channel_dump_audio()
668 pr_warn("ctrl + 0x%2x : iq %x: 0x%08x [ arg #%d ]\n", in cx25821_sram_channel_dump_audio()
673 pr_warn(" : fifo: 0x%08x -> 0x%x\n", in cx25821_sram_channel_dump_audio()
675 pr_warn(" : ctrl: 0x%08x -> 0x%x\n", in cx25821_sram_channel_dump_audio()
677 pr_warn(" : ptr1_reg: 0x%08x\n", in cx25821_sram_channel_dump_audio()
679 pr_warn(" : ptr2_reg: 0x%08x\n", in cx25821_sram_channel_dump_audio()
681 pr_warn(" : cnt1_reg: 0x%08x\n", in cx25821_sram_channel_dump_audio()
683 pr_warn(" : cnt2_reg: 0x%08x\n", in cx25821_sram_channel_dump_audio()
686 for (i = 0; i < 4; i++) { in cx25821_sram_channel_dump_audio()
688 pr_warn("instruction %d = 0x%x\n", i, risc); in cx25821_sram_channel_dump_audio()
693 pr_warn("\nread cdt loc=0x%x\n", risc); in cx25821_sram_channel_dump_audio()
694 for (i = 0; i < 8; i++) { in cx25821_sram_channel_dump_audio()
696 pr_cont("0x%x ", n); in cx25821_sram_channel_dump_audio()
701 CX25821_INFO(" CLK_RST = 0x%x\n\n", value); in cx25821_sram_channel_dump_audio()
704 CX25821_INFO(" PLL_A_POST_STAT_BIST = 0x%x\n\n", value); in cx25821_sram_channel_dump_audio()
706 CX25821_INFO(" PLL_A_INT_FRAC = 0x%x\n\n", value); in cx25821_sram_channel_dump_audio()
709 CX25821_INFO(" PLL_B_POST_STAT_BIST = 0x%x\n\n", value); in cx25821_sram_channel_dump_audio()
711 CX25821_INFO(" PLL_B_INT_FRAC = 0x%x\n\n", value); in cx25821_sram_channel_dump_audio()
714 CX25821_INFO(" PLL_C_POST_STAT_BIST = 0x%x\n\n", value); in cx25821_sram_channel_dump_audio()
716 CX25821_INFO(" PLL_C_INT_FRAC = 0x%x\n\n", value); in cx25821_sram_channel_dump_audio()
719 CX25821_INFO(" PLL_D_POST_STAT_BIST = 0x%x\n\n", value); in cx25821_sram_channel_dump_audio()
721 CX25821_INFO(" PLL_D_INT_FRAC = 0x%x\n\n", value); in cx25821_sram_channel_dump_audio()
723 value = cx25821_i2c_read(&dev->i2c_bus[0], AFE_AB_DIAG_CTRL, &tmp); in cx25821_sram_channel_dump_audio()
724 CX25821_INFO(" AFE_AB_DIAG_CTRL (0x10900090) = 0x%x\n\n", value); in cx25821_sram_channel_dump_audio()
733 cx_write(DEV_CNTRL2, 0); in cx25821_shutdown()
736 for (i = 0; i < VID_CHANNEL_NUM; i++) { in cx25821_shutdown()
737 cx_write(dev->channels[i].sram_channels->dma_ctl, 0); in cx25821_shutdown()
738 cx_write(dev->channels[i].sram_channels->int_msk, 0); in cx25821_shutdown()
743 cx_write(dev->channels[i].sram_channels->dma_ctl, 0); in cx25821_shutdown()
744 cx_write(dev->channels[i].sram_channels->int_msk, 0); in cx25821_shutdown()
748 cx_write(AUD_INT_DMA_CTL, 0); in cx25821_shutdown()
751 cx_write(UART_CTL, 0); in cx25821_shutdown()
754 cx_write(PCI_INT_MSK, 0); in cx25821_shutdown()
755 cx_write(AUD_A_INT_MSK, 0); in cx25821_shutdown()
761 if (channel_select <= 7 && channel_select >= 0) { in cx25821_set_pixel_format()
782 cx_write(PCI_INT_STAT, 0xffffffff); in cx25821_initialize()
784 for (i = 0; i < VID_CHANNEL_NUM; i++) in cx25821_initialize()
785 cx_write(dev->channels[i].sram_channels->int_stat, 0xffffffff); in cx25821_initialize()
787 cx_write(AUD_A_INT_STAT, 0xffffffff); in cx25821_initialize()
788 cx_write(AUD_B_INT_STAT, 0xffffffff); in cx25821_initialize()
789 cx_write(AUD_C_INT_STAT, 0xffffffff); in cx25821_initialize()
790 cx_write(AUD_D_INT_STAT, 0xffffffff); in cx25821_initialize()
791 cx_write(AUD_E_INT_STAT, 0xffffffff); in cx25821_initialize()
793 cx_write(CLK_DELAY, cx_read(CLK_DELAY) & 0x80000000); in cx25821_initialize()
794 cx_write(PAD_CTRL, 0x12); /* for I2C */ in cx25821_initialize()
798 for (i = 0; i < VID_CHANNEL_NUM; i++) { in cx25821_initialize()
801 1440, 0); in cx25821_initialize()
803 dev->channels[i].use_cif_resolution = 0; in cx25821_initialize()
814 dev->channels[SRAM_CH08].sram_channels, 128, 0); in cx25821_initialize()
821 if (request_mem_region(pci_resource_start(dev->pci, 0), in cx25821_get_resources()
822 pci_resource_len(dev->pci, 0), dev->name)) in cx25821_get_resources()
823 return 0; in cx25821_get_resources()
825 pr_err("%s: can't get MMIO memory @ 0x%llx\n", in cx25821_get_resources()
826 dev->name, (unsigned long long)pci_resource_start(dev->pci, 0)); in cx25821_get_resources()
833 dev->hwrevision = cx_read(RDR_CFG2) & 0xff; in cx25821_dev_checkrevision()
835 pr_info("Hardware revision = 0x%02x\n", dev->hwrevision); in cx25821_dev_checkrevision()
864 if (dev->pci->device != 0x8210) { in cx25821_dev_setup()
865 pr_info("%s(): Exiting. Incorrect Hardware device = 0x%02x\n", in cx25821_dev_setup()
869 pr_info("Athena Hardware device = 0x%02x\n", dev->pci->device); in cx25821_dev_setup()
873 for (i = 0; i < MAX_VID_CHANNEL_NUM; i++) { in cx25821_dev_setup()
885 dev->pci_irqmask = 0x001f00; in cx25821_dev_setup()
888 dev->i2c_bus[0].nr = 0; in cx25821_dev_setup()
889 dev->i2c_bus[0].dev = dev; in cx25821_dev_setup()
890 dev->i2c_bus[0].reg_stat = I2C1_STAT; in cx25821_dev_setup()
891 dev->i2c_bus[0].reg_ctrl = I2C1_CTRL; in cx25821_dev_setup()
892 dev->i2c_bus[0].reg_addr = I2C1_ADDR; in cx25821_dev_setup()
893 dev->i2c_bus[0].reg_rdata = I2C1_RDATA; in cx25821_dev_setup()
894 dev->i2c_bus[0].reg_wdata = I2C1_WDATA; in cx25821_dev_setup()
895 dev->i2c_bus[0].i2c_period = (0x07 << 24); /* 1.95MHz */ in cx25821_dev_setup()
897 if (cx25821_get_resources(dev) < 0) { in cx25821_dev_setup()
907 dev->base_io_addr = pci_resource_start(dev->pci, 0); in cx25821_dev_setup()
914 dev->lmmio = ioremap(dev->base_io_addr, pci_resource_len(dev->pci, 0)); in cx25821_dev_setup()
933 cx25821_i2c_register(&dev->i2c_bus[0]); in cx25821_dev_setup()
937 if (medusa_video_init(dev) < 0) in cx25821_dev_setup()
943 return 0; in cx25821_dev_setup()
953 release_mem_region(dev->base_io_addr, pci_resource_len(dev->pci, 0)); in cx25821_dev_unregister()
955 for (i = 0; i < MAX_VID_CAP_CHANNEL_NUM - 1; i++) { in cx25821_dev_unregister()
967 cx25821_i2c_unregister(&dev->i2c_bus[0]); in cx25821_dev_unregister()
977 dma_addr_t dma = 0; in cx25821_riscmem_alloc()
989 return 0; in cx25821_riscmem_alloc()
1003 *(rp++) = cpu_to_le32(0); in cx25821_risc_field()
1004 *(rp++) = cpu_to_le32(0); /* bits 63-32 */ in cx25821_risc_field()
1013 for (line = 0; line < lines; line++) { in cx25821_risc_field()
1023 *(rp++) = cpu_to_le32(0); /* bits 63-32 */ in cx25821_risc_field()
1031 *(rp++) = cpu_to_le32(0); /* bits 63-32 */ in cx25821_risc_field()
1033 offset = 0; in cx25821_risc_field()
1039 *(rp++) = cpu_to_le32(0); /* bits 63-32 */ in cx25821_risc_field()
1045 *(rp++) = cpu_to_le32(0); /* bits 63-32 */ in cx25821_risc_field()
1065 fields = 0; in cx25821_risc_buffer()
1081 if (rc < 0) in cx25821_risc_buffer()
1088 rp = cx25821_risc_field(rp, sglist, top_offset, 0, bpl, padding, in cx25821_risc_buffer()
1093 rp = cx25821_risc_field(rp, sglist, bottom_offset, 0x200, bpl, in cx25821_risc_buffer()
1101 return 0; in cx25821_risc_buffer()
1118 for (line = 0; line < lines; line++) { in cx25821_risc_field_audio()
1124 if (lpi && line > 0 && !(line % lpi)) in cx25821_risc_field_audio()
1134 *(rp++) = cpu_to_le32(0); /* bits 63-32 */ in cx25821_risc_field_audio()
1142 *(rp++) = cpu_to_le32(0); /* bits 63-32 */ in cx25821_risc_field_audio()
1144 offset = 0; in cx25821_risc_field_audio()
1150 *(rp++) = cpu_to_le32(0); /* bits 63-32 */ in cx25821_risc_field_audio()
1156 *(rp++) = cpu_to_le32(0); /* bits 63-32 */ in cx25821_risc_field_audio()
1184 if (rc < 0) in cx25821_risc_databuffer_audio()
1189 rp = cx25821_risc_field_audio(rp, sglist, 0, NO_SYNC_LINE, bpl, 0, in cx25821_risc_databuffer_audio()
1195 return 0; in cx25821_risc_databuffer_audio()
1202 if (WARN_ON(buf->risc.size == 0)) in cx25821_free_buffer()
1206 memset(&buf->risc, 0, sizeof(buf->risc)); in cx25821_free_buffer()
1214 int i, handled = 0; in cx25821_irq()
1219 if (pci_status == 0) in cx25821_irq()
1222 for (i = 0; i < VID_CHANNEL_NUM; i++) { in cx25821_irq()
1244 printk(KERN_DEBUG pr_fmt("%s: %s [0x%x]"), name, tag, bits); in cx25821_print_irqbits()
1246 for (i = 0; i < len; i++) { in cx25821_print_irqbits()
1272 int err = 0; in cx25821_initdev()
1279 if (err < 0) in cx25821_initdev()
1299 pr_info("%s/0: found at %s, rev: %d, irq: %d, latency: %d, mmio: 0x%llx\n", in cx25821_initdev()
1304 err = pci_set_dma_mask(pci_dev, 0xffffffff); in cx25821_initdev()
1306 pr_err("%s/0: Oops: no 32bit PCI DMA ???\n", dev->name); in cx25821_initdev()
1314 if (err < 0) { in cx25821_initdev()
1319 return 0; in cx25821_initdev()
1355 .vendor = 0x14f1,
1356 .device = 0x8210,
1357 .subvendor = 0x14f1,
1358 .subdevice = 0x0920,
1361 .vendor = 0x14f1,
1362 .device = 0x8210,
1363 .subvendor = 0x0000,
1364 .subdevice = 0x0000,