Lines Matching full:hdcp
238 #define HDMI_FLAGS_HDCP BIT(4) /* HDCP detected */
296 /* HDCP DE Control */
311 /* HDCP EP Filter Control */
434 #define INTERRUPT_HDCP BIT(6) /* HDCP module */
443 #define MASK_HDCP_MTP BIT(7) /* HDCP MTP busy */
444 #define MASK_HDCP_DLMTP BIT(4) /* HDCP end download MTP to SRAM */
445 #define MASK_HDCP_DLRAM BIT(3) /* HDCP end download keys from SRAM */
446 #define MASK_HDCP_ENC BIT(2) /* HDCP ENC */
447 #define MASK_STATE_C5 BIT(1) /* HDCP State C5 reached */
475 #define MASK_HDCP_DDC_SW BIT(2) /* HDCP DDC switching finished */
582 #define RESET_HDCP BIT(6) /* Reset HDCP module */
584 #define RESET_SCFG BIT(4) /* Reset HDCP and repeater function */
585 #define RESET_HCFG BIT(3) /* Reset HDCP DDC part */
591 #define NACK_HDCP BIT(7) /* No ACK on HDCP request */
599 #define HDCP_HDMI BIT(7) /* HDCP supports HDMI (vs DVI only) */
600 #define HDCP_REPEATER BIT(6) /* HDCP supports repeater function */
603 #define HDCP_11 BIT(1) /* HDCP 1.1 supported */