1 // SPDX-License-Identifier: GPL-2.0
3  * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
58 	if (d->hwirq == GPIO_NO_WAKE_IRQ)  in qcom_pdc_gic_get_irqchip_state()
68 	if (d->hwirq == GPIO_NO_WAKE_IRQ)  in qcom_pdc_gic_set_irqchip_state()
76 	int pin_out = d->hwirq;  in pdc_enable_intr()
92 	if (d->hwirq == GPIO_NO_WAKE_IRQ)  in qcom_pdc_gic_disable()
101 	if (d->hwirq == GPIO_NO_WAKE_IRQ)  in qcom_pdc_gic_enable()
110 	if (d->hwirq == GPIO_NO_WAKE_IRQ)  in qcom_pdc_gic_mask()
118 	if (d->hwirq == GPIO_NO_WAKE_IRQ)  in qcom_pdc_gic_unmask()
130  * Level sensitive active low    LOW
131  * Rising edge sensitive         NOT USED
132  * Falling edge sensitive        LOW
133  * Dual Edge sensitive           NOT USED
134  * Level sensitive active High   HIGH
135  * Falling Edge sensitive        NOT USED
136  * Rising edge sensitive         HIGH
137  * Dual Edge sensitive           HIGH
155  * If @type is level, then forward that as level high as PDC
160 	int pin_out = d->hwirq;  in qcom_pdc_gic_set_type()
187 		return -EINVAL;  in qcom_pdc_gic_set_type()
221 		if (pin >= region->pin_base &&  in get_parent_hwirq()
222 		    pin < region->pin_base + region->cnt)  in get_parent_hwirq()
223 			return (region->parent_base + pin - region->pin_base);  in get_parent_hwirq()
232 	if (is_of_node(fwspec->fwnode)) {  in qcom_pdc_translate()
233 		if (fwspec->param_count != 2)  in qcom_pdc_translate()
234 			return -EINVAL;  in qcom_pdc_translate()
236 		*hwirq = fwspec->param[0];  in qcom_pdc_translate()
237 		*type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK;  in qcom_pdc_translate()
241 	return -EINVAL;  in qcom_pdc_translate()
272 	parent_fwspec.fwnode      = domain->parent->fwnode;  in qcom_pdc_alloc()
319 	parent_fwspec.fwnode      = domain->parent->fwnode;  in qcom_pdc_gpio_alloc()
347 	n = of_property_count_elems_of_size(np, "qcom,pdc-ranges", sizeof(u32));  in pdc_setup_pin_mapping()
349 		return -EINVAL;  in pdc_setup_pin_mapping()
355 		return -ENOMEM;  in pdc_setup_pin_mapping()
359 		ret = of_property_read_u32_index(np, "qcom,pdc-ranges",  in pdc_setup_pin_mapping()
364 		ret = of_property_read_u32_index(np, "qcom,pdc-ranges",  in pdc_setup_pin_mapping()
369 		ret = of_property_read_u32_index(np, "qcom,pdc-ranges",  in pdc_setup_pin_mapping()
395 		return -ENXIO;  in qcom_pdc_init()
401 		ret = -ENXIO;  in qcom_pdc_init()
407 		pr_err("%pOF: failed to init PDC pin-hwirq mapping\n", node);  in qcom_pdc_init()
416 		ret = -ENOMEM;  in qcom_pdc_init()
427 		ret = -ENOMEM;  in qcom_pdc_init()