1 // SPDX-License-Identifier: GPL-2.0
4  *  Loongson PCH PIC support
7 #define pr_fmt(fmt) "pch-pic: " fmt
37 	void __iomem		*base;  member
46 	void __iomem *addr = priv->base + offset + PIC_REG_IDX(bit) * 4;  in pch_pic_bitset()
48 	raw_spin_lock(&priv->pic_lock);  in pch_pic_bitset()
52 	raw_spin_unlock(&priv->pic_lock);  in pch_pic_bitset()
58 	void __iomem *addr = priv->base + offset + PIC_REG_IDX(bit) * 4;  in pch_pic_bitclr()
60 	raw_spin_lock(&priv->pic_lock);  in pch_pic_bitclr()
64 	raw_spin_unlock(&priv->pic_lock);  in pch_pic_bitclr()
71 	pch_pic_bitset(priv, PCH_PIC_MASK, d->hwirq);  in pch_pic_mask_irq()
79 	writel(BIT(PIC_REG_BIT(d->hwirq)),  in pch_pic_unmask_irq()
80 			priv->base + PCH_PIC_CLR + PIC_REG_IDX(d->hwirq) * 4);  in pch_pic_unmask_irq()
83 	pch_pic_bitclr(priv, PCH_PIC_MASK, d->hwirq);  in pch_pic_unmask_irq()
93 		pch_pic_bitset(priv, PCH_PIC_EDGE, d->hwirq);  in pch_pic_set_type()
94 		pch_pic_bitclr(priv, PCH_PIC_POL, d->hwirq);  in pch_pic_set_type()
97 		pch_pic_bitset(priv, PCH_PIC_EDGE, d->hwirq);  in pch_pic_set_type()
98 		pch_pic_bitset(priv, PCH_PIC_POL, d->hwirq);  in pch_pic_set_type()
101 		pch_pic_bitclr(priv, PCH_PIC_EDGE, d->hwirq);  in pch_pic_set_type()
102 		pch_pic_bitclr(priv, PCH_PIC_POL, d->hwirq);  in pch_pic_set_type()
105 		pch_pic_bitclr(priv, PCH_PIC_EDGE, d->hwirq);  in pch_pic_set_type()
106 		pch_pic_bitset(priv, PCH_PIC_POL, d->hwirq);  in pch_pic_set_type()
109 		ret = -EINVAL;  in pch_pic_set_type()
117 	.name			= "PCH PIC",
133 	struct pch_pic *priv = domain->host_data;  in pch_pic_alloc()
139 	parent_fwspec.fwnode = domain->parent->fwnode;  in pch_pic_alloc()
141 	parent_fwspec.param[0] = hwirq + priv->ht_vec_base;  in pch_pic_alloc()
167 		writeb(priv->ht_vec_base + i, priv->base + PCH_INT_HTVEC(i));  in pch_pic_reset()
169 		writeb(1, priv->base + PCH_INT_ROUTE(i));  in pch_pic_reset()
174 		writel_relaxed(0xFFFFFFFF, priv->base + PCH_PIC_MASK + 4 * i);  in pch_pic_reset()
175 		writel_relaxed(0xFFFFFFFF, priv->base + PCH_PIC_CLR + 4 * i);  in pch_pic_reset()
177 		writel_relaxed(0, priv->base + PCH_PIC_AUTO0 + 4 * i);  in pch_pic_reset()
178 		writel_relaxed(0, priv->base + PCH_PIC_AUTO1 + 4 * i);  in pch_pic_reset()
180 		writel_relaxed(0xFFFFFFFF, priv->base + PCH_PIC_HTMSI_EN + 4 * i);  in pch_pic_reset()
193 		return -ENOMEM;  in pch_pic_of_init()
195 	raw_spin_lock_init(&priv->pic_lock);  in pch_pic_of_init()
196 	priv->base = of_iomap(node, 0);  in pch_pic_of_init()
197 	if (!priv->base) {  in pch_pic_of_init()
198 		err = -ENOMEM;  in pch_pic_of_init()
205 		err = -ENXIO;  in pch_pic_of_init()
209 	if (of_property_read_u32(node, "loongson,pic-base-vec",  in pch_pic_of_init()
210 				&priv->ht_vec_base)) {  in pch_pic_of_init()
211 		pr_err("Failed to determine pic-base-vec\n");  in pch_pic_of_init()
212 		err = -EINVAL;  in pch_pic_of_init()
216 	priv->pic_domain = irq_domain_create_hierarchy(parent_domain, 0,  in pch_pic_of_init()
221 	if (!priv->pic_domain) {  in pch_pic_of_init()
223 		err = -ENOMEM;  in pch_pic_of_init()
232 	iounmap(priv->base);  in pch_pic_of_init()
239 IRQCHIP_DECLARE(pch_pic, "loongson,pch-pic-1.0", pch_pic_of_init);