imu/inv_icm42600/inv_icm42600.h

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
67 /* ODR suffixed by LN or LP are Low-Noise or Low-Power mode only */
86 	/* Low-Noise mode sensor data filter (3rd order filter by default) */
89 	/* Low-Power mode sensor data filter (averaging) */
100 #define INV_ICM42600_SENSOR_CONF_INIT		{-1, -1, -1, -1}
115  *  struct inv_icm42600_state - driver state variables
127  *  @buffer:		data transfer buffer aligned for DMA.
128  *  @fifo:		FIFO management structure.
144 	struct inv_icm42600_fifo fifo;  member
188 /* all sensor data are 16 bits (2 registers wide) in big-endian */
196 #define INV_ICM42600_DATA_INVALID			-32768
208  * FIFO access registers
209  * FIFO count is 16 bits (2 registers) big-endian
210  * FIFO data is a continuous read register to read FIFO content
222 /* default configuration: all data big-endian and fifo count in bytes */
279 /* FIFO watermark is 16 bits (2 registers wide) in little-endian */
283 /* FIFO is 2048 bytes, let 12 samples for reading latency */
284 #define INV_ICM42600_FIFO_WATERMARK_MAX			(2048 - 12 * 16)
315 /* Timestamp value is 20 bits (3 registers) in little-endian */