460 static u32 stm32_adc_readl(struct stm32_adc *adc, u32 reg)  in stm32_adc_readl()  function
465 #define stm32_adc_readl_addr(addr)	stm32_adc_readl(adc, addr)
486 	stm32_adc_writel(adc, reg, stm32_adc_readl(adc, reg) | bits);  in stm32_adc_set_bits()
495 	stm32_adc_writel(adc, reg, stm32_adc_readl(adc, reg) & ~bits);  in stm32_adc_clr_bits()
536 	val = stm32_adc_readl(adc, res->reg);  in stm32_adc_set_res()
610 	if (!(stm32_adc_readl(adc, STM32F4_ADC_CR2) & STM32F4_EXTEN_MASK))  in stm32f4_adc_start_conv()
646 	val = stm32_adc_readl(adc, STM32H7_ADC_CFGR);  in stm32h7_adc_start_conv()
780 		val = stm32_adc_readl(adc, STM32H7_ADC_CALFACT2);  in stm32h7_adc_read_selfcalib()
788 	val = stm32_adc_readl(adc, STM32H7_ADC_CALFACT);  in stm32h7_adc_read_selfcalib()
846 		val = stm32_adc_readl(adc, STM32H7_ADC_CALFACT2);  in stm32h7_adc_restore_selfcalib()
1023 		val = stm32_adc_readl(adc, sqr[i].reg);  in stm32_adc_conf_scan_seq()
1033 	val = stm32_adc_readl(adc, sqr[0].reg);  in stm32_adc_conf_scan_seq()
1098 	val = stm32_adc_readl(adc, adc->cfg->regs->exten.reg);  in stm32_adc_set_trig()
1176 	val = stm32_adc_readl(adc, regs->sqr[1].reg);  in stm32_adc_single_conv()
1266 	u32 status = stm32_adc_readl(adc, regs->isr_eoc.reg);  in stm32_adc_threaded_isr()
1267 	u32 mask = stm32_adc_readl(adc, regs->ier_eoc.reg);  in stm32_adc_threaded_isr()
1295 	u32 status = stm32_adc_readl(adc, regs->isr_eoc.reg);  in stm32_adc_isr()
1296 	u32 mask = stm32_adc_readl(adc, regs->ier_eoc.reg);  in stm32_adc_isr()
1429 		*readval = stm32_adc_readl(adc, reg);  in stm32_adc_debugfs_reg_access()