Lines Matching +full:0 +full:x54
30 * ICH2 errata #21 - DMA mode 0 doesn't work right
43 * (BIOS must set dev 31 fn 0 bit 23)
72 int master_port = hwif->channel ? 0x42 : 0x40; in piix_set_pio_mode()
73 int slave_port = 0x44; in piix_set_pio_mode()
78 int control = 0; in piix_set_pio_mode()
83 { 0, 0 }, in piix_set_pio_mode()
84 { 0, 0 }, in piix_set_pio_mode()
85 { 1, 0 }, in piix_set_pio_mode()
104 master_data |= 0x4000; in piix_set_pio_mode()
105 master_data &= ~0x0070; in piix_set_pio_mode()
111 slave_data &= hwif->channel ? 0x0f : 0xf0; in piix_set_pio_mode()
112 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << in piix_set_pio_mode()
113 (hwif->channel ? 4 : 0); in piix_set_pio_mode()
115 master_data &= ~0x3307; in piix_set_pio_mode()
120 master_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8); in piix_set_pio_mode()
140 u8 maslave = hwif->channel ? 0x42 : 0x40; in piix_set_dma_mode()
143 int v_flag = 0x01 << drive->dn; in piix_set_dma_mode()
144 int w_flag = 0x10 << drive->dn; in piix_set_dma_mode()
145 int u_speed = 0; in piix_set_dma_mode()
152 sitre = (reg4042 & 0x4000) ? 1 : 0; in piix_set_dma_mode()
153 pci_read_config_byte(dev, 0x48, ®48); in piix_set_dma_mode()
154 pci_read_config_word(dev, 0x4a, ®4a); in piix_set_dma_mode()
155 pci_read_config_byte(dev, 0x54, ®54); in piix_set_dma_mode()
156 pci_read_config_byte(dev, 0x55, ®55); in piix_set_dma_mode()
164 pci_write_config_byte(dev, 0x48, reg48 | u_flag); in piix_set_dma_mode()
166 pci_write_config_byte(dev, 0x55, (u8) reg55|w_flag); in piix_set_dma_mode()
168 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag); in piix_set_dma_mode()
171 pci_write_config_word(dev, 0x4a, (reg4a & ~a_speed) | u_speed); in piix_set_dma_mode()
174 pci_write_config_byte(dev, 0x54, reg54 | v_flag); in piix_set_dma_mode()
176 pci_write_config_byte(dev, 0x54, reg54 & ~v_flag); in piix_set_dma_mode()
178 const u8 mwdma_to_pio[] = { 0, 3, 4 }; in piix_set_dma_mode()
181 pci_write_config_byte(dev, 0x48, reg48 & ~u_flag); in piix_set_dma_mode()
183 pci_write_config_word(dev, 0x4a, reg4a & ~a_speed); in piix_set_dma_mode()
185 pci_write_config_byte(dev, 0x54, reg54 & ~v_flag); in piix_set_dma_mode()
187 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag); in piix_set_dma_mode()
209 u32 extra = 0; in init_chipset_ich()
211 pci_read_config_dword(dev, 0x54, &extra); in init_chipset_ich()
212 pci_write_config_dword(dev, 0x54, extra | 0x400); in init_chipset_ich()
214 return 0; in init_chipset_ich()
235 if (drive->waiting_for_dma || hwif->dma_base == 0) in ich_clear_irq()
256 { 0x27DF, 0x1025, 0x0102 }, /* ICH7 on Acer 5602aWLMi */
257 { 0x27DF, 0x0005, 0x0280 }, /* ICH7 on Acer 5602WLMi */
258 { 0x27DF, 0x1025, 0x0110 }, /* ICH7 on Acer 3682WLMi */
259 { 0x27DF, 0x1043, 0x1267 }, /* ICH7 on Asus W5F */
260 { 0x27DF, 0x103C, 0x30A1 }, /* ICH7 on HP Compaq nc2400 */
261 { 0x27DF, 0x1071, 0xD221 }, /* ICH7 on Hercules EC-900 */
262 { 0x24CA, 0x1025, 0x0061 }, /* ICH4 on Acer Aspire 2023WLMi */
263 { 0x24CA, 0x1025, 0x003d }, /* ICH4 on ACER TM290 */
264 { 0x266F, 0x1025, 0x0066 }, /* ICH6 on ACER Aspire 1694WLMi */
265 { 0x2653, 0x1043, 0x82D8 }, /* ICH6M on Asus Eee 701 */
266 { 0x27df, 0x104d, 0x900e }, /* ICH7 on Sony TZ-90 */
268 { 0, }
274 const struct ich_laptop *lap = &ich_laptop[0]; in piix_cable_detect()
275 u8 reg54h = 0, mask = hwif->channel ? 0xc0 : 0x30; in piix_cable_detect()
287 pci_read_config_byte(pdev, 0x54, ®54h); in piix_cable_detect()
306 hwif->ultra_mask = hwif->mwdma_mask = hwif->swdma_mask = 0; in init_hwif_piix()
326 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \
339 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \
348 /* 0: MPIIX */
352 * of the bit 14 of the IDETIM register at offset 0x6c
355 .enablebits = {{0x6d,0xc0,0x80}, {0x6d,0xc0,0xc0}},
361 DECLARE_PIIX_DEV(0x00), /* no udma */
405 pci_read_config_word(pdev, 0x41, &cfg); in piix_check_450nx()
407 if (pdev->revision == 0x00) in piix_check_450nx()
422 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371MX), 0 },
447 { 0, },