72 	u16 cycle = 0;  in ide_pio_cycle_time()  local
76 			cycle = id[ATA_ID_EIDE_PIO_IORDY];  in ide_pio_cycle_time()
78 			cycle = id[ATA_ID_EIDE_PIO];  in ide_pio_cycle_time()
81 		if (pio < 3 && cycle < t->cycle)  in ide_pio_cycle_time()
82 			cycle = 0; /* use standard timing */  in ide_pio_cycle_time()
86 			cycle = 0;  in ide_pio_cycle_time()
89 	return cycle ? cycle : t->cycle;  in ide_pio_cycle_time()
105 	q->cycle   = EZ(t->cycle,   T);  in ide_timing_quantize()
125 		m->cycle   = max(a->cycle,   b->cycle);  in ide_timing_merge()
151 	 * PIO/MWDMA cycle timing.  in ide_timing_compute()
158 				p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO];  in ide_timing_compute()
161 				p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY];  in ide_timing_compute()
163 			p.cycle = id[ATA_ID_EIDE_DMA_MIN];  in ide_timing_compute()
176 	 * DMA cycle timing is slower/equal than the current PIO timing.  in ide_timing_compute()
184 	 * Lengthen active & recovery time so that cycle time is correct.  in ide_timing_compute()
191 	if (t->active + t->recover < t->cycle) {  in ide_timing_compute()
192 		t->active += (t->cycle - (t->active + t->recover)) / 2;  in ide_timing_compute()
193 		t->recover = t->cycle - t->active;  in ide_timing_compute()