Lines Matching +full:performance +full:- +full:affecting
1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
3 * Copyright 1998-2015 VMware, Inc.
28 * svga_reg.h --
72 * Legal values for the SVGA_REG_CURSOR_ON register in old-fashioned
139 * The byte-size is the size of the actual cursor data,
142 * 40K is sufficient memory for two 32-bit planes for a 64 x 64 cursor.
193 /* Legacy multi-monitor support */
208 SVGA_REG_TRACES = 45, /* Enable trace-based updates even when FIFO is on */
223 * don't know how to convert to a 64-bit byte value without overflowing.
242 * convenient to work-around specific bugs in guest drivers.
254 * The SVGA_REG_GUEST_DRIVER_VERSION fields are driver-specific,
277 * The maximum amount of guest-backed objects that the device can have
278 * resident at a time. Guest-drivers should keep their working set size
279 * below this limit for best performance.
282 * number of bytes might be larger than can fit in a 32-bit register.
284 * PLEASE USE A 64-BIT VALUE WHEN CONVERTING THIS INTO BYTES.
329 * SVGA_REG_GMR_ID --
332 * This register holds the 32-bit ID (a small positive integer)
334 * has no side-effects.
336 * SVGA_REG_GMR_DESCRIPTOR --
338 * Write-only.
355 * SVGA_REG_GMR_MAX_IDS --
357 * Read-only.
359 * user-defined GMR IDs. This register holds the number of supported
362 * SVGA_REG_GMR_MAX_DESCRIPTOR_LENGTH --
364 * Read-only.
372 * - Terminate the GMR descriptor list.
375 * - Add a PPN or range of PPNs to the GMR's virtual address space.
378 * - Provide the PPN of the next SVGAGuestMemDescriptor, in order to
379 * support multi-page GMR descriptor tables without forcing the
404 * is being phased out. Please try to use user-defined GMRs whenever
407 #define SVGA_GMR_NULL ((uint32) -1)
408 #define SVGA_GMR_FRAMEBUFFER ((uint32) -2) /* Guest Framebuffer (GFB) */
429 * Register based command buffers --
464 * enough to fit a 64x64 color-cursor definition. If the command is
622 * SVGADCCmdPreempt --
698 * SVGAGMRImageFormat --
701 * for a GMR-to-screen blit. Currently it is defined as an encoding
702 * of the screen's color depth and bits-per-pixel, however, 16 bits
704 * RGBA or higher-precision images).
709 * --- ----- -----------
710 * 32 24 32-bit BGRX
711 * 24 24 24-bit BGR
712 * 16 16 RGB 5-6-5
713 * 16 15 RGB 5-5-5
744 * If the image is 1-dimensional, pitch is ignored.
755 * SVGAColorBGRX --
757 * A 24-bit color format (BGRX), which does not depend on the
777 * SVGASignedRect --
778 * SVGASignedPoint --
784 * SVGASignedRect specifies a half-open interval: the (left, top)
817 * SVGA_CAP_IRQMASK --
822 * SVGA_CAP_GMR --
827 * SVGA_CAP_TRACES --
828 * Allows framebuffer trace-based updates even when FIFO is enabled.
831 * SVGA_CAP_GMR2 --
836 * SVGA_CAP_SCREEN_OBJECT_2 --
840 * SVGA_CAP_COMMAND_BUFFERS --
843 * SVGA_CAP_DEAD1 --
847 * SVGA_CAP_CMD_BUFFERS_2 --
852 * SVGA_CAP_GBOBJECTS --
853 * Enable guest-backed objects and surfaces.
855 * SVGA_CAP_DX --
858 * SVGA_CAP_HP_CMD_QUEUE --
862 * SVGA_CAP_NO_BB_RESTRICTION --
863 * Allow ScreenTargets to be defined without regard to the 32-bpp
864 * bounding-box memory restrictions. ie:
867 * 32-bpp) must always be less than the value of the
870 * If this cap is not present, the 32-bpp bounding box around all screens
875 * the screen-sum limit applies).
883 * SVGA_CAP_CAP2_REGISTER --
916 * SVGA_CAP2_GROW_OTABLE --
919 * SVGA_CAP2_INTRA_SURFACE_COPY --
922 * SVGA_CAP2_DX2 --
926 * SVGA_CAP2_GB_MEMSIZE_2 --
929 * SVGA_CAP2_SCREENDMA_REG --
932 * SVGA_CAP2_OTABLE_PTDEPTH_2 --
935 * SVGA_CAP2_NON_MS_TO_MS_STRETCHBLT --
936 * Allow a stretch blt from a non-multisampled surface to a multisampled
939 * SVGA_CAP2_CURSOR_MOB --
942 * SVGA_CAP2_MSHINT --
945 * SVGA_CAP2_DX3 --
952 * SVGA_CAP2_RESERVED --
978 * will be left unchanged and EAX will be set to -1. Because it is
979 * possible that -1 is the value of the requested cap the correct way
1000 * is always treated as 32-bit words.
1003 * - FIFO registers (there are always at least 4, specifying where the
1007 * - FIFO data, written by the guest and slurped out by the VMX.
1008 * These indices are 32-bit word offsets into the FIFO.
1098 * - PITCHLOCK
1099 * - 3D_CAPS
1100 * - CURSOR_* (cursor bypass 3)
1101 * - RESERVED
1116 * End of VMX's current definition of "extended-FIFO registers".
1136 * registers we know about. At power-on, this value is placed in
1160 * svgaUser->fifo.extended is set. Any later registers must be tested
1164 * affecting driver compatibility; keep it that way?
1172 * SVGA_REG_SYNC --
1188 * introduce a delay in command processing. If the guest-driver wants
1191 * FIFO to immediately wake up the device. For even better performance,
1200 * the FIFO and command-buffers). To do this, the guest driver should
1204 * SVGA_REG_BUSY --
1217 * useful if the guest-driver knows that it is blocked waiting on the
1220 * SVGA_FIFO_BUSY --
1242 * For maximum performance, this procedure should be followed after
1252 * Fence -- Fence register and command are supported
1253 * Accel Front -- Front buffer only commands are supported
1254 * Pitch Lock -- Pitch lock register is supported
1255 * Video -- SVGA Video overlay units are supported
1256 * Escape -- Escape command is supported
1258 * SVGA_FIFO_CAP_SCREEN_OBJECT --
1260 * Provides dynamic multi-screen rendering, for improved Unity and
1261 * multi-monitor modes. With Screen Object, the guest can
1265 * guest-initiated. Screen Object deprecates the BAR1 guest
1280 * - The host will not read or write guest memory, including the GFB,
1283 * - All DMA, including legacy DMA like UPDATE and PRESENT_READBACK,
1286 * - All legacy commands which affect a Screen (UPDATE, PRESENT,
1302 * - When a screen is resized, either using Screen Object commands or
1305 * SVGA_FIFO_CAP_GMR2 --
1312 * SVGA_FIFO_CAP_3D_HWVERSION_REVISED --
1323 * SVGA_FIFO_CAP_SCREEN_OBJECT_2 --
1331 * SVGA_FIFO_CAP_DEAD --
1355 * Accel Front -- Driver should use front buffer only commands
1464 #define SVGA_INVALID_DISPLAY_ID ((uint32)-1)
1477 * SVGAScreenObject --
1479 * This is a new way to represent a guest's multi-monitor screen or
1497 * (bytesPerLine * size.width * 4 + PAGE_SIZE - 1) / PAGE_SIZE
1501 * driver pad bytesPerLine for a potential performance win.
1615 * SVGA_CMD_UPDATE --
1622 * data source- it only works with the pre-defined GFB memory.
1655 * SVGA_CMD_RECT_COPY --
1679 * SVGA_CMD_RECT_ROP_COPY --
1706 * SVGA_CMD_DEFINE_CURSOR --
1730 * Each scanline is padded to a 32-bit boundary.
1738 * SVGA_CMD_DEFINE_ALPHA_CURSOR --
1740 * Provide a new cursor image, in 32-bit BGRA format.
1781 * Each scanline is padded to a 32-bit boundary.
1789 * Provide a new large cursor image, in 32-bit BGRA format.
1839 * SVGA_CMD_UPDATE_VERBOSE --
1841 * Just like SVGA_CMD_UPDATE, but also provide a per-rectangle
1864 * SVGA_CMD_FRONT_ROP_FILL --
1893 * SVGA_CMD_FENCE --
1917 * SVGA_CMD_ESCAPE --
1919 * Send an extended or vendor-specific variable length command.
1939 * SVGA_CMD_DEFINE_SCREEN --
1949 * - Interaction with other registers:
1957 * If you use screen objects, do not use the legacy multi-mon
1967 SVGAScreenObject screen; /* Variable-length according to version */
1974 * SVGA_CMD_DESTROY_SCREEN --
1977 * re-use.
1993 * SVGA_CMD_DEFINE_GMRFB --
1997 * piece of light-weight state which identifies the location and
2009 * (BAR1) memory region, or to a user-defined GMR. This lets a
2021 * re-use until the device is finished with that buffer's
2027 * true-color 15, 16, and 24-bit depths are supported. Future
2051 * SVGA_CMD_BLIT_GMRFB_TO_SCREEN --
2053 * This is a guest-to-host blit. It performs a DMA operation to
2082 * SVGA_CMD_BLIT_SCREEN_TO_GMRFB --
2084 * This is a host-to-guest blit. It performs a DMA operation to
2111 * SVGA_CMD_ANNOTATION_FILL --
2114 * by new drivers. They used to provide performance hints to the SVGA
2132 * SVGA_CMD_ANNOTATION_COPY --
2135 * by new drivers. They used to provide performance hints to the SVGA
2154 * SVGA_CMD_DEFINE_GMR2 --
2173 * SVGA_CMD_REMAP_GMR2 --