424 u8 cypress_get_strobe_mode_settings(struct radeon_device *rdev, u32 mclk)  in cypress_get_strobe_mode_settings()  argument
431 		if (mclk <= pi->mclk_strobe_mode_threshold)  in cypress_get_strobe_mode_settings()
433 		result = cypress_get_mclk_frequency_ratio(rdev, mclk, strobe_mode);  in cypress_get_strobe_mode_settings()
476 				       RV7XX_SMC_MCLK_VALUE *mclk,  in cypress_populate_mclk_value()  argument
598 	mclk->mclk770.mclk_value = cpu_to_be32(memory_clock);  in cypress_populate_mclk_value()
599 	mclk->mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl);  in cypress_populate_mclk_value()
600 	mclk->mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2);  in cypress_populate_mclk_value()
601 	mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl);  in cypress_populate_mclk_value()
602 	mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2);  in cypress_populate_mclk_value()
603 	mclk->mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl);  in cypress_populate_mclk_value()
604 	mclk->mclk770.vDLL_CNTL = cpu_to_be32(dll_cntl);  in cypress_populate_mclk_value()
605 	mclk->mclk770.vMPLL_SS = cpu_to_be32(mpll_ss1);  in cypress_populate_mclk_value()
606 	mclk->mclk770.vMPLL_SS2 = cpu_to_be32(mpll_ss2);  in cypress_populate_mclk_value()
653 				       u32 mclk,  in cypress_populate_mvdd_value()  argument
665 	if (mclk <= pi->mvdd_split_frequency) {  in cypress_populate_mvdd_value()
698 	    (pl->mclk <= pi->mclk_stutter_mode_threshold) &&  in cypress_convert_power_level_to_smc()
708 		if (pl->mclk > pi->mclk_edc_enable_threshold)  in cypress_convert_power_level_to_smc()
711 		if (pl->mclk > eg_pi->mclk_edc_wr_enable_threshold)  in cypress_convert_power_level_to_smc()
714 		level->strobeMode = cypress_get_strobe_mode_settings(rdev, pl->mclk);  in cypress_convert_power_level_to_smc()
717 			if (cypress_get_mclk_frequency_ratio(rdev, pl->mclk, true) >=  in cypress_convert_power_level_to_smc()
727 						  pl->mclk,  in cypress_convert_power_level_to_smc()
728 						  &level->mclk,  in cypress_convert_power_level_to_smc()
734 						  pl->mclk,  in cypress_convert_power_level_to_smc()
735 						  &level->mclk,  in cypress_convert_power_level_to_smc()
758 	ret = cypress_populate_mvdd_value(rdev, pl->mclk, &level->mvdd);  in cypress_convert_power_level_to_smc()
836 		if (pl->mclk <=  in cypress_convert_mc_reg_table_entry_to_smc()
935 								 new_state->low.mclk));  in cypress_program_memory_timing_parameters()
938 								 new_state->medium.mclk));  in cypress_program_memory_timing_parameters()
941 								 new_state->high.mclk));  in cypress_program_memory_timing_parameters()
1051 			range_table->mclk[i];  in cypress_retrieve_ac_timing_for_all_ranges()
1052 		radeon_atom_set_ac_timing(rdev, range_table->mclk[i]);  in cypress_retrieve_ac_timing_for_all_ranges()
1128 	radeon_atom_set_ac_timing(rdev, boot_state->low.mclk);  in cypress_force_mc_use_s1()
1147 						       boot_state->low.mclk);  in cypress_force_mc_use_s1()
1205 						       boot_state->low.mclk);  in cypress_force_mc_use_s0()
1244 	table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL =  in cypress_populate_smc_initial_state()
1246 	table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 =  in cypress_populate_smc_initial_state()
1248 	table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL =  in cypress_populate_smc_initial_state()
1250 	table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 =  in cypress_populate_smc_initial_state()
1252 	table->initialState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL =  in cypress_populate_smc_initial_state()
1254 	table->initialState.levels[0].mclk.mclk770.vDLL_CNTL =  in cypress_populate_smc_initial_state()
1257 	table->initialState.levels[0].mclk.mclk770.vMPLL_SS =  in cypress_populate_smc_initial_state()
1259 	table->initialState.levels[0].mclk.mclk770.vMPLL_SS2 =  in cypress_populate_smc_initial_state()
1262 	table->initialState.levels[0].mclk.mclk770.mclk_value =  in cypress_populate_smc_initial_state()
1263 		cpu_to_be32(initial_state->low.mclk);  in cypress_populate_smc_initial_state()
1315 							 initial_state->low.mclk);  in cypress_populate_smc_initial_state()
1317 		if (initial_state->low.mclk > pi->mclk_edc_enable_threshold)  in cypress_populate_smc_initial_state()
1434 	table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL =  in cypress_populate_smc_acpi_state()
1436 	table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 =  in cypress_populate_smc_acpi_state()
1438 	table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL =  in cypress_populate_smc_acpi_state()
1440 	table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 =  in cypress_populate_smc_acpi_state()
1442 	table->ACPIState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL =  in cypress_populate_smc_acpi_state()
1444 	table->ACPIState.levels[0].mclk.mclk770.vDLL_CNTL = cpu_to_be32(dll_cntl);  in cypress_populate_smc_acpi_state()
1446 	table->ACPIState.levels[0].mclk.mclk770.mclk_value = 0;  in cypress_populate_smc_acpi_state()