Lines Matching +full:0 +full:x38000000

33 	nvkm_mask(device, 0x614280 + doff, 0x07070707, 0x00000000);  in nv50_dac_clock()
44 	nvkm_wr32(device, 0x61a00c + doff, 0x00100000 | loadval);  in nv50_dac_sense()
47 	loadval = nvkm_mask(device, 0x61a00c + doff, 0xffffffff, 0x00000000);  in nv50_dac_sense()
50 	if (!(loadval & 0x80000000))  in nv50_dac_sense()
53 	return (loadval & 0x38000000) >> 27;  in nv50_dac_sense()
60 		if (!(nvkm_rd32(device, 0x61a004 + doff) & 0x80000000))  in nv50_dac_power_wait()
71 	const u32 shift = normal ? 0 : 16;  in nv50_dac_power()
72 	const u32 state = 0x80000000 | (0x00000040 * !    pu |  in nv50_dac_power()
73 					0x00000010 * !  data |  in nv50_dac_power()
74 					0x00000004 * ! vsync |  in nv50_dac_power()
75 					0x00000001 * ! hsync) << shift;  in nv50_dac_power()
76 	const u32 field = 0xc0000000 | (0x00000055 << shift);  in nv50_dac_power()
79 	nvkm_mask(device, 0x61a004 + doff, field, state);  in nv50_dac_power()
88 	u32 ctrl = nvkm_rd32(device, 0x610b58 + coff);  in nv50_dac_state()
90 	state->proto_evo = (ctrl & 0x00000f00) >> 8;  in nv50_dac_state()
92 	case 0: state->proto = CRT; break;  in nv50_dac_state()
98 	state->head = ctrl & 0x00000003;  in nv50_dac_state()
119 	*pmask = (nvkm_rd32(device, 0x610184) & 0x00700000) >> 20;  in nv50_dac_cnt()