38 		struct nvif_control_pstate_info_v0 v0;  in nvkm_control_mthd_pstate_info()  member
40 	struct nvkm_clk *clk = ctrl->device->clk;  in nvkm_control_mthd_pstate_info()
41 	int ret = -ENOSYS;  in nvkm_control_mthd_pstate_info()
43 	nvif_ioctl(&ctrl->object, "control pstate info size %d\n", size);  in nvkm_control_mthd_pstate_info()
44 	if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) {  in nvkm_control_mthd_pstate_info()
45 		nvif_ioctl(&ctrl->object, "control pstate info vers %d\n",  in nvkm_control_mthd_pstate_info()
46 			   args->v0.version);  in nvkm_control_mthd_pstate_info()
51 		args->v0.count = clk->state_nr;  in nvkm_control_mthd_pstate_info()
52 		args->v0.ustate_ac = clk->ustate_ac;  in nvkm_control_mthd_pstate_info()
53 		args->v0.ustate_dc = clk->ustate_dc;  in nvkm_control_mthd_pstate_info()
54 		args->v0.pwrsrc = clk->pwrsrc;  in nvkm_control_mthd_pstate_info()
55 		args->v0.pstate = clk->pstate;  in nvkm_control_mthd_pstate_info()
57 		args->v0.count = 0;  in nvkm_control_mthd_pstate_info()
58 		args->v0.ustate_ac = NVIF_CONTROL_PSTATE_INFO_V0_USTATE_DISABLE;  in nvkm_control_mthd_pstate_info()
59 		args->v0.ustate_dc = NVIF_CONTROL_PSTATE_INFO_V0_USTATE_DISABLE;  in nvkm_control_mthd_pstate_info()
60 		args->v0.pwrsrc = -ENOSYS;  in nvkm_control_mthd_pstate_info()
61 		args->v0.pstate = NVIF_CONTROL_PSTATE_INFO_V0_PSTATE_UNKNOWN;  in nvkm_control_mthd_pstate_info()
71 		struct nvif_control_pstate_attr_v0 v0;  in nvkm_control_mthd_pstate_attr()  member
73 	struct nvkm_clk *clk = ctrl->device->clk;  in nvkm_control_mthd_pstate_attr()
77 	int i = 0, j = -1;  in nvkm_control_mthd_pstate_attr()
79 	int ret = -ENOSYS;  in nvkm_control_mthd_pstate_attr()
81 	nvif_ioctl(&ctrl->object, "control pstate attr size %d\n", size);  in nvkm_control_mthd_pstate_attr()
82 	if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) {  in nvkm_control_mthd_pstate_attr()
83 		nvif_ioctl(&ctrl->object,  in nvkm_control_mthd_pstate_attr()
85 			   args->v0.version, args->v0.state, args->v0.index);  in nvkm_control_mthd_pstate_attr()
87 			return -ENODEV;  in nvkm_control_mthd_pstate_attr()
88 		if (args->v0.state < NVIF_CONTROL_PSTATE_ATTR_V0_STATE_CURRENT)  in nvkm_control_mthd_pstate_attr()
89 			return -EINVAL;  in nvkm_control_mthd_pstate_attr()
90 		if (args->v0.state >= clk->state_nr)  in nvkm_control_mthd_pstate_attr()
91 			return -EINVAL;  in nvkm_control_mthd_pstate_attr()
94 	domain = clk->domains;  in nvkm_control_mthd_pstate_attr()
96 	while (domain->name != nv_clk_src_max) {  in nvkm_control_mthd_pstate_attr()
97 		if (domain->mname && ++j == args->v0.index)  in nvkm_control_mthd_pstate_attr()
102 	if (domain->name == nv_clk_src_max)  in nvkm_control_mthd_pstate_attr()
103 		return -EINVAL;  in nvkm_control_mthd_pstate_attr()
105 	if (args->v0.state != NVIF_CONTROL_PSTATE_ATTR_V0_STATE_CURRENT) {  in nvkm_control_mthd_pstate_attr()
106 		list_for_each_entry(pstate, &clk->states, head) {  in nvkm_control_mthd_pstate_attr()
107 			if (i++ == args->v0.state)  in nvkm_control_mthd_pstate_attr()
111 		lo = pstate->base.domain[domain->name];  in nvkm_control_mthd_pstate_attr()
113 		list_for_each_entry(cstate, &pstate->list, head) {  in nvkm_control_mthd_pstate_attr()
114 			lo = min(lo, cstate->domain[domain->name]);  in nvkm_control_mthd_pstate_attr()
115 			hi = max(hi, cstate->domain[domain->name]);  in nvkm_control_mthd_pstate_attr()
118 		args->v0.state = pstate->pstate;  in nvkm_control_mthd_pstate_attr()
120 		lo = max(nvkm_clk_read(clk, domain->name), 0);  in nvkm_control_mthd_pstate_attr()
124 	snprintf(args->v0.name, sizeof(args->v0.name), "%s", domain->mname);  in nvkm_control_mthd_pstate_attr()
125 	snprintf(args->v0.unit, sizeof(args->v0.unit), "MHz");  in nvkm_control_mthd_pstate_attr()
126 	args->v0.min = lo / domain->mdiv;  in nvkm_control_mthd_pstate_attr()
127 	args->v0.max = hi / domain->mdiv;  in nvkm_control_mthd_pstate_attr()
129 	args->v0.index = 0;  in nvkm_control_mthd_pstate_attr()
130 	while ((++domain)->name != nv_clk_src_max) {  in nvkm_control_mthd_pstate_attr()
131 		if (domain->mname) {  in nvkm_control_mthd_pstate_attr()
132 			args->v0.index = ++j;  in nvkm_control_mthd_pstate_attr()
144 		struct nvif_control_pstate_user_v0 v0;  in nvkm_control_mthd_pstate_user()  member
146 	struct nvkm_clk *clk = ctrl->device->clk;  in nvkm_control_mthd_pstate_user()
147 	int ret = -ENOSYS;  in nvkm_control_mthd_pstate_user()
149 	nvif_ioctl(&ctrl->object, "control pstate user size %d\n", size);  in nvkm_control_mthd_pstate_user()
150 	if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) {  in nvkm_control_mthd_pstate_user()
151 		nvif_ioctl(&ctrl->object,  in nvkm_control_mthd_pstate_user()
153 			   args->v0.version, args->v0.ustate, args->v0.pwrsrc);  in nvkm_control_mthd_pstate_user()
155 			return -ENODEV;  in nvkm_control_mthd_pstate_user()
159 	if (args->v0.pwrsrc >= 0) {  in nvkm_control_mthd_pstate_user()
160 		ret |= nvkm_clk_ustate(clk, args->v0.ustate, args->v0.pwrsrc);  in nvkm_control_mthd_pstate_user()
162 		ret |= nvkm_clk_ustate(clk, args->v0.ustate, 0);  in nvkm_control_mthd_pstate_user()
163 		ret |= nvkm_clk_ustate(clk, args->v0.ustate, 1);  in nvkm_control_mthd_pstate_user()
183 	return -EINVAL;  in nvkm_control_mthd()
198 		return -ENOMEM;  in nvkm_control_new()
199 	*pobject = &ctrl->object;  in nvkm_control_new()
200 	ctrl->device = device;  in nvkm_control_new()
202 	nvkm_object_ctor(&nvkm_control, oclass, &ctrl->object);  in nvkm_control_new()
209 	.base.minver = -1,
210 	.base.maxver = -1,