Lines Matching full:timing
14 struct msm_dsi_dphy_timing *timing, in dsi_14nm_dphy_set_timing() argument
19 u32 zero = clk_ln ? timing->clk_zero : timing->hs_zero; in dsi_14nm_dphy_set_timing()
20 u32 prepare = clk_ln ? timing->clk_prepare : timing->hs_prepare; in dsi_14nm_dphy_set_timing()
21 u32 trail = clk_ln ? timing->clk_trail : timing->hs_trail; in dsi_14nm_dphy_set_timing()
22 u32 rqst = clk_ln ? timing->hs_rqst_ckln : timing->hs_rqst; in dsi_14nm_dphy_set_timing()
23 u32 prep_dly = clk_ln ? timing->hs_prep_dly_ckln : timing->hs_prep_dly; in dsi_14nm_dphy_set_timing()
24 u32 halfbyte_en = clk_ln ? timing->hs_halfbyte_en_ckln : in dsi_14nm_dphy_set_timing()
25 timing->hs_halfbyte_en; in dsi_14nm_dphy_set_timing()
28 DSI_14nm_PHY_LN_TIMING_CTRL_4_HS_EXIT(timing->hs_exit)); in dsi_14nm_dphy_set_timing()
42 DSI_14nm_PHY_LN_TIMING_CTRL_9_TA_GO(timing->ta_go) | in dsi_14nm_dphy_set_timing()
43 DSI_14nm_PHY_LN_TIMING_CTRL_9_TA_SURE(timing->ta_sure)); in dsi_14nm_dphy_set_timing()
45 DSI_14nm_PHY_LN_TIMING_CTRL_10_TA_GET(timing->ta_get)); in dsi_14nm_dphy_set_timing()
53 struct msm_dsi_dphy_timing *timing = &phy->timing; in dsi_14nm_phy_enable() local
60 if (msm_dsi_dphy_timing_calc_v2(timing, clk_req)) { in dsi_14nm_phy_enable()
62 "%s: D-PHY timing calculation failed\n", __func__); in dsi_14nm_phy_enable()
92 dsi_14nm_dphy_set_timing(phy, timing, i); in dsi_14nm_phy_enable()