18 	int i;  in msm_dss_put_clk()  local
20 	for (i = num_clk - 1; i >= 0; i--) {  in msm_dss_put_clk()
21 		if (clk_arry[i].clk)  in msm_dss_put_clk()
22 			clk_put(clk_arry[i].clk);  in msm_dss_put_clk()
23 		clk_arry[i].clk = NULL;  in msm_dss_put_clk()
29 	int i, rc = 0;  in msm_dss_get_clk()  local
31 	for (i = 0; i < num_clk; i++) {  in msm_dss_get_clk()
32 		clk_arry[i].clk = clk_get(dev, clk_arry[i].clk_name);  in msm_dss_get_clk()
33 		rc = PTR_ERR_OR_ZERO(clk_arry[i].clk);  in msm_dss_get_clk()
37 				clk_arry[i].clk_name, rc);  in msm_dss_get_clk()
45 	for (i--; i >= 0; i--) {  in msm_dss_get_clk()
46 		if (clk_arry[i].clk)  in msm_dss_get_clk()
47 			clk_put(clk_arry[i].clk);  in msm_dss_get_clk()
48 		clk_arry[i].clk = NULL;  in msm_dss_get_clk()
56 	int i, rc = 0;  in msm_dss_clk_set_rate()  local
58 	for (i = 0; i < num_clk; i++) {  in msm_dss_clk_set_rate()
59 		if (clk_arry[i].clk) {  in msm_dss_clk_set_rate()
60 			if (clk_arry[i].type != DSS_CLK_AHB) {  in msm_dss_clk_set_rate()
63 					clk_arry[i].clk_name,  in msm_dss_clk_set_rate()
64 					clk_arry[i].rate);  in msm_dss_clk_set_rate()
65 				rc = clk_set_rate(clk_arry[i].clk,  in msm_dss_clk_set_rate()
66 					clk_arry[i].rate);  in msm_dss_clk_set_rate()
71 						clk_arry[i].clk_name, rc);  in msm_dss_clk_set_rate()
78 				clk_arry[i].clk_name);  in msm_dss_clk_set_rate()
89 	int i, rc = 0;  in msm_dss_enable_clk()  local
92 		for (i = 0; i < num_clk; i++) {  in msm_dss_enable_clk()
95 				clk_arry[i].clk_name);  in msm_dss_enable_clk()
96 			rc = clk_prepare_enable(clk_arry[i].clk);  in msm_dss_enable_clk()
101 					clk_arry[i].clk_name, rc);  in msm_dss_enable_clk()
103 			if (rc && i) {  in msm_dss_enable_clk()
104 				msm_dss_enable_clk(&clk_arry[i - 1],  in msm_dss_enable_clk()
105 					i - 1, false);  in msm_dss_enable_clk()
110 		for (i = num_clk - 1; i >= 0; i--) {  in msm_dss_enable_clk()
113 				clk_arry[i].clk_name);  in msm_dss_enable_clk()
115 			clk_disable_unprepare(clk_arry[i].clk);  in msm_dss_enable_clk()
125 	u32 i, rc = 0;  in msm_dss_parse_clock()  local
145 	for (i = 0; i < num_clk; i++) {  in msm_dss_parse_clock()
147 						   "clock-names", i,  in msm_dss_parse_clock()
151 				i);  in msm_dss_parse_clock()
154 		strlcpy(mp->clk_config[i].clk_name, clock_name,  in msm_dss_parse_clock()
155 			sizeof(mp->clk_config[i].clk_name));  in msm_dss_parse_clock()
157 		mp->clk_config[i].type = DSS_CLK_AHB;  in msm_dss_parse_clock()
172 	for (i = 0; i < num_clk; i++) {  in msm_dss_parse_clock()
173 		u32 rate = clk_get_rate(mp->clk_config[i].clk);  in msm_dss_parse_clock()
176 		mp->clk_config[i].rate = rate;  in msm_dss_parse_clock()
177 		mp->clk_config[i].type = DSS_CLK_PCLK;  in msm_dss_parse_clock()
178 		mp->clk_config[i].max_rate = rate;  in msm_dss_parse_clock()