1068 static inline uint32_t REG_A6XX_CP_SCRATCH(uint32_t i0) { return 0x00000883 + 0x1*i0; }  in REG_A6XX_CP_SCRATCH()
1070 static inline uint32_t REG_A6XX_CP_SCRATCH_REG(uint32_t i0) { return 0x00000883 + 0x1*i0; }  in REG_A6XX_CP_SCRATCH_REG()
1072 static inline uint32_t REG_A6XX_CP_PROTECT(uint32_t i0) { return 0x00000850 + 0x1*i0; }  in REG_A6XX_CP_PROTECT()
1074 static inline uint32_t REG_A6XX_CP_PROTECT_REG(uint32_t i0) { return 0x00000850 + 0x1*i0; }  in REG_A6XX_CP_PROTECT_REG()
2622 static inline uint32_t REG_A6XX_VSC_PIPE_CONFIG(uint32_t i0) { return 0x00000c10 + 0x1*i0; }  in REG_A6XX_VSC_PIPE_CONFIG()
2624 static inline uint32_t REG_A6XX_VSC_PIPE_CONFIG_REG(uint32_t i0) { return 0x00000c10 + 0x1*i0; }  in REG_A6XX_VSC_PIPE_CONFIG_REG()
2670 static inline uint32_t REG_A6XX_VSC_STATE(uint32_t i0) { return 0x00000c38 + 0x1*i0; }  in REG_A6XX_VSC_STATE()
2672 static inline uint32_t REG_A6XX_VSC_STATE_REG(uint32_t i0) { return 0x00000c38 + 0x1*i0; }  in REG_A6XX_VSC_STATE_REG()
2674 static inline uint32_t REG_A6XX_VSC_PRIM_STRM_SIZE(uint32_t i0) { return 0x00000c58 + 0x1*i0; }  in REG_A6XX_VSC_PRIM_STRM_SIZE()
2676 static inline uint32_t REG_A6XX_VSC_PRIM_STRM_SIZE_REG(uint32_t i0) { return 0x00000c58 + 0x1*i0; }  in REG_A6XX_VSC_PRIM_STRM_SIZE_REG()
2678 static inline uint32_t REG_A6XX_VSC_DRAW_STRM_SIZE(uint32_t i0) { return 0x00000c78 + 0x1*i0; }  in REG_A6XX_VSC_DRAW_STRM_SIZE()
2680 static inline uint32_t REG_A6XX_VSC_DRAW_STRM_SIZE_REG(uint32_t i0) { return 0x00000c78 + 0x1*i0; }  in REG_A6XX_VSC_DRAW_STRM_SIZE_REG()
2766 static inline uint32_t REG_A6XX_GRAS_CL_VPORT(uint32_t i0) { return 0x00008010 + 0x6*i0; }  in REG_A6XX_GRAS_CL_VPORT()
2768 static inline uint32_t REG_A6XX_GRAS_CL_VPORT_XOFFSET(uint32_t i0) { return 0x00008010 + 0x6*i0; }  in REG_A6XX_GRAS_CL_VPORT_XOFFSET()
2776 static inline uint32_t REG_A6XX_GRAS_CL_VPORT_XSCALE(uint32_t i0) { return 0x00008011 + 0x6*i0; }  in REG_A6XX_GRAS_CL_VPORT_XSCALE()
2784 static inline uint32_t REG_A6XX_GRAS_CL_VPORT_YOFFSET(uint32_t i0) { return 0x00008012 + 0x6*i0; }  in REG_A6XX_GRAS_CL_VPORT_YOFFSET()
2792 static inline uint32_t REG_A6XX_GRAS_CL_VPORT_YSCALE(uint32_t i0) { return 0x00008013 + 0x6*i0; }  in REG_A6XX_GRAS_CL_VPORT_YSCALE()
2800 static inline uint32_t REG_A6XX_GRAS_CL_VPORT_ZOFFSET(uint32_t i0) { return 0x00008014 + 0x6*i0; }  in REG_A6XX_GRAS_CL_VPORT_ZOFFSET()
2808 static inline uint32_t REG_A6XX_GRAS_CL_VPORT_ZSCALE(uint32_t i0) { return 0x00008015 + 0x6*i0; }  in REG_A6XX_GRAS_CL_VPORT_ZSCALE()
2816 static inline uint32_t REG_A6XX_GRAS_CL_Z_CLAMP(uint32_t i0) { return 0x00008070 + 0x2*i0; }  in REG_A6XX_GRAS_CL_Z_CLAMP()
2818 static inline uint32_t REG_A6XX_GRAS_CL_Z_CLAMP_MIN(uint32_t i0) { return 0x00008070 + 0x2*i0; }  in REG_A6XX_GRAS_CL_Z_CLAMP_MIN()
2826 static inline uint32_t REG_A6XX_GRAS_CL_Z_CLAMP_MAX(uint32_t i0) { return 0x00008071 + 0x2*i0; }  in REG_A6XX_GRAS_CL_Z_CLAMP_MAX()
3114 static inline uint32_t REG_A6XX_GRAS_SC_SCREEN_SCISSOR(uint32_t i0) { return 0x000080b0 + 0x2*i0; }  in REG_A6XX_GRAS_SC_SCREEN_SCISSOR()
3116 static inline uint32_t REG_A6XX_GRAS_SC_SCREEN_SCISSOR_TL(uint32_t i0) { return 0x000080b0 + 0x2*i0…  in REG_A6XX_GRAS_SC_SCREEN_SCISSOR_TL()
3130 static inline uint32_t REG_A6XX_GRAS_SC_SCREEN_SCISSOR_BR(uint32_t i0) { return 0x000080b1 + 0x2*i0…  in REG_A6XX_GRAS_SC_SCREEN_SCISSOR_BR()
3144 static inline uint32_t REG_A6XX_GRAS_SC_VIEWPORT_SCISSOR(uint32_t i0) { return 0x000080d0 + 0x2*i0;…  in REG_A6XX_GRAS_SC_VIEWPORT_SCISSOR()
3146 static inline uint32_t REG_A6XX_GRAS_SC_VIEWPORT_SCISSOR_TL(uint32_t i0) { return 0x000080d0 + 0x2*…  in REG_A6XX_GRAS_SC_VIEWPORT_SCISSOR_TL()
3160 static inline uint32_t REG_A6XX_GRAS_SC_VIEWPORT_SCISSOR_BR(uint32_t i0) { return 0x000080d1 + 0x2*…  in REG_A6XX_GRAS_SC_VIEWPORT_SCISSOR_BR()
3793 static inline uint32_t REG_A6XX_RB_MRT(uint32_t i0) { return 0x00008820 + 0x8*i0; }  in REG_A6XX_RB_MRT()
3795 static inline uint32_t REG_A6XX_RB_MRT_CONTROL(uint32_t i0) { return 0x00008820 + 0x8*i0; }  in REG_A6XX_RB_MRT_CONTROL()
3812 static inline uint32_t REG_A6XX_RB_MRT_BLEND_CONTROL(uint32_t i0) { return 0x00008821 + 0x8*i0; }  in REG_A6XX_RB_MRT_BLEND_CONTROL()
3850 static inline uint32_t REG_A6XX_RB_MRT_BUF_INFO(uint32_t i0) { return 0x00008822 + 0x8*i0; }  in REG_A6XX_RB_MRT_BUF_INFO()
3876 static inline uint32_t REG_A6XX_RB_MRT_PITCH(uint32_t i0) { return 0x00008823 + 0x8*i0; }  in REG_A6XX_RB_MRT_PITCH()
3884 static inline uint32_t REG_A6XX_RB_MRT_ARRAY_PITCH(uint32_t i0) { return 0x00008824 + 0x8*i0; }  in REG_A6XX_RB_MRT_ARRAY_PITCH()
3892 static inline uint32_t REG_A6XX_RB_MRT_BASE_LO(uint32_t i0) { return 0x00008825 + 0x8*i0; }  in REG_A6XX_RB_MRT_BASE_LO()
3894 static inline uint32_t REG_A6XX_RB_MRT_BASE_HI(uint32_t i0) { return 0x00008826 + 0x8*i0; }  in REG_A6XX_RB_MRT_BASE_HI()
3896 static inline uint32_t REG_A6XX_RB_MRT_BASE(uint32_t i0) { return 0x00008825 + 0x8*i0; }  in REG_A6XX_RB_MRT_BASE()
3904 static inline uint32_t REG_A6XX_RB_MRT_BASE_GMEM(uint32_t i0) { return 0x00008827 + 0x8*i0; }  in REG_A6XX_RB_MRT_BASE_GMEM()
4494 static inline uint32_t REG_A6XX_RB_MRT_FLAG_BUFFER(uint32_t i0) { return 0x00008903 + 0x3*i0; }  in REG_A6XX_RB_MRT_FLAG_BUFFER()
4496 static inline uint32_t REG_A6XX_RB_MRT_FLAG_BUFFER_ADDR_LO(uint32_t i0) { return 0x00008903 + 0x3*i…  in REG_A6XX_RB_MRT_FLAG_BUFFER_ADDR_LO()
4498 static inline uint32_t REG_A6XX_RB_MRT_FLAG_BUFFER_ADDR_HI(uint32_t i0) { return 0x00008904 + 0x3*i…  in REG_A6XX_RB_MRT_FLAG_BUFFER_ADDR_HI()
4500 static inline uint32_t REG_A6XX_RB_MRT_FLAG_BUFFER_ADDR(uint32_t i0) { return 0x00008903 + 0x3*i0; }  in REG_A6XX_RB_MRT_FLAG_BUFFER_ADDR()
4508 static inline uint32_t REG_A6XX_RB_MRT_FLAG_BUFFER_PITCH(uint32_t i0) { return 0x00008905 + 0x3*i0;…  in REG_A6XX_RB_MRT_FLAG_BUFFER_PITCH()
4907 static inline uint32_t REG_A6XX_VPC_VARYING_INTERP(uint32_t i0) { return 0x00009200 + 0x1*i0; }  in REG_A6XX_VPC_VARYING_INTERP()
4909 static inline uint32_t REG_A6XX_VPC_VARYING_INTERP_MODE(uint32_t i0) { return 0x00009200 + 0x1*i0; }  in REG_A6XX_VPC_VARYING_INTERP_MODE()
4911 static inline uint32_t REG_A6XX_VPC_VARYING_PS_REPL(uint32_t i0) { return 0x00009208 + 0x1*i0; }  in REG_A6XX_VPC_VARYING_PS_REPL()
4913 static inline uint32_t REG_A6XX_VPC_VARYING_PS_REPL_MODE(uint32_t i0) { return 0x00009208 + 0x1*i0;…  in REG_A6XX_VPC_VARYING_PS_REPL_MODE()
4919 static inline uint32_t REG_A6XX_VPC_VAR(uint32_t i0) { return 0x00009212 + 0x1*i0; }  in REG_A6XX_VPC_VAR()
4921 static inline uint32_t REG_A6XX_VPC_VAR_DISABLE(uint32_t i0) { return 0x00009212 + 0x1*i0; }  in REG_A6XX_VPC_VAR_DISABLE()
4972 static inline uint32_t REG_A6XX_VPC_SO(uint32_t i0) { return 0x0000921a + 0x7*i0; }  in REG_A6XX_VPC_SO()
4974 static inline uint32_t REG_A6XX_VPC_SO_BUFFER_BASE(uint32_t i0) { return 0x0000921a + 0x7*i0; }  in REG_A6XX_VPC_SO_BUFFER_BASE()
4982 static inline uint32_t REG_A6XX_VPC_SO_BUFFER_BASE_LO(uint32_t i0) { return 0x0000921a + 0x7*i0; }  in REG_A6XX_VPC_SO_BUFFER_BASE_LO()
4984 static inline uint32_t REG_A6XX_VPC_SO_BUFFER_BASE_HI(uint32_t i0) { return 0x0000921b + 0x7*i0; }  in REG_A6XX_VPC_SO_BUFFER_BASE_HI()
4986 static inline uint32_t REG_A6XX_VPC_SO_BUFFER_SIZE(uint32_t i0) { return 0x0000921c + 0x7*i0; }  in REG_A6XX_VPC_SO_BUFFER_SIZE()
4994 static inline uint32_t REG_A6XX_VPC_SO_NCOMP(uint32_t i0) { return 0x0000921d + 0x7*i0; }  in REG_A6XX_VPC_SO_NCOMP()
4996 static inline uint32_t REG_A6XX_VPC_SO_BUFFER_OFFSET(uint32_t i0) { return 0x0000921e + 0x7*i0; }  in REG_A6XX_VPC_SO_BUFFER_OFFSET()
5004 static inline uint32_t REG_A6XX_VPC_SO_FLUSH_BASE(uint32_t i0) { return 0x0000921f + 0x7*i0; }  in REG_A6XX_VPC_SO_FLUSH_BASE()
5012 static inline uint32_t REG_A6XX_VPC_SO_FLUSH_BASE_LO(uint32_t i0) { return 0x0000921f + 0x7*i0; }  in REG_A6XX_VPC_SO_FLUSH_BASE_LO()
5014 static inline uint32_t REG_A6XX_VPC_SO_FLUSH_BASE_HI(uint32_t i0) { return 0x00009220 + 0x7*i0; }  in REG_A6XX_VPC_SO_FLUSH_BASE_HI()
5512 static inline uint32_t REG_A6XX_VFD_FETCH(uint32_t i0) { return 0x0000a010 + 0x4*i0; }  in REG_A6XX_VFD_FETCH()
5514 static inline uint32_t REG_A6XX_VFD_FETCH_BASE(uint32_t i0) { return 0x0000a010 + 0x4*i0; }  in REG_A6XX_VFD_FETCH_BASE()
5516 static inline uint32_t REG_A6XX_VFD_FETCH_BASE_LO(uint32_t i0) { return 0x0000a010 + 0x4*i0; }  in REG_A6XX_VFD_FETCH_BASE_LO()
5518 static inline uint32_t REG_A6XX_VFD_FETCH_BASE_HI(uint32_t i0) { return 0x0000a011 + 0x4*i0; }  in REG_A6XX_VFD_FETCH_BASE_HI()
5520 static inline uint32_t REG_A6XX_VFD_FETCH_SIZE(uint32_t i0) { return 0x0000a012 + 0x4*i0; }  in REG_A6XX_VFD_FETCH_SIZE()
5522 static inline uint32_t REG_A6XX_VFD_FETCH_STRIDE(uint32_t i0) { return 0x0000a013 + 0x4*i0; }  in REG_A6XX_VFD_FETCH_STRIDE()
5524 static inline uint32_t REG_A6XX_VFD_DECODE(uint32_t i0) { return 0x0000a090 + 0x2*i0; }  in REG_A6XX_VFD_DECODE()
5526 static inline uint32_t REG_A6XX_VFD_DECODE_INSTR(uint32_t i0) { return 0x0000a090 + 0x2*i0; }  in REG_A6XX_VFD_DECODE_INSTR()
5555 static inline uint32_t REG_A6XX_VFD_DECODE_STEP_RATE(uint32_t i0) { return 0x0000a091 + 0x2*i0; }  in REG_A6XX_VFD_DECODE_STEP_RATE()
5557 static inline uint32_t REG_A6XX_VFD_DEST_CNTL(uint32_t i0) { return 0x0000a0d0 + 0x1*i0; }  in REG_A6XX_VFD_DEST_CNTL()
5559 static inline uint32_t REG_A6XX_VFD_DEST_CNTL_INSTR(uint32_t i0) { return 0x0000a0d0 + 0x1*i0; }  in REG_A6XX_VFD_DEST_CNTL_INSTR()
5615 static inline uint32_t REG_A6XX_SP_VS_OUT(uint32_t i0) { return 0x0000a803 + 0x1*i0; }  in REG_A6XX_SP_VS_OUT()
5617 static inline uint32_t REG_A6XX_SP_VS_OUT_REG(uint32_t i0) { return 0x0000a803 + 0x1*i0; }  in REG_A6XX_SP_VS_OUT_REG()
5643 static inline uint32_t REG_A6XX_SP_VS_VPC_DST(uint32_t i0) { return 0x0000a813 + 0x1*i0; }  in REG_A6XX_SP_VS_VPC_DST()
5645 static inline uint32_t REG_A6XX_SP_VS_VPC_DST_REG(uint32_t i0) { return 0x0000a813 + 0x1*i0; }  in REG_A6XX_SP_VS_VPC_DST_REG()
5811 static inline uint32_t REG_A6XX_SP_DS_OUT(uint32_t i0) { return 0x0000a843 + 0x1*i0; }  in REG_A6XX_SP_DS_OUT()
5813 static inline uint32_t REG_A6XX_SP_DS_OUT_REG(uint32_t i0) { return 0x0000a843 + 0x1*i0; }  in REG_A6XX_SP_DS_OUT_REG()
5839 static inline uint32_t REG_A6XX_SP_DS_VPC_DST(uint32_t i0) { return 0x0000a853 + 0x1*i0; }  in REG_A6XX_SP_DS_VPC_DST()
5841 static inline uint32_t REG_A6XX_SP_DS_VPC_DST_REG(uint32_t i0) { return 0x0000a853 + 0x1*i0; }  in REG_A6XX_SP_DS_VPC_DST_REG()
5950 static inline uint32_t REG_A6XX_SP_GS_OUT(uint32_t i0) { return 0x0000a874 + 0x1*i0; }  in REG_A6XX_SP_GS_OUT()
5952 static inline uint32_t REG_A6XX_SP_GS_OUT_REG(uint32_t i0) { return 0x0000a874 + 0x1*i0; }  in REG_A6XX_SP_GS_OUT_REG()
5978 static inline uint32_t REG_A6XX_SP_GS_VPC_DST(uint32_t i0) { return 0x0000a884 + 0x1*i0; }  in REG_A6XX_SP_GS_VPC_DST()
5980 static inline uint32_t REG_A6XX_SP_GS_VPC_DST_REG(uint32_t i0) { return 0x0000a884 + 0x1*i0; }  in REG_A6XX_SP_GS_VPC_DST_REG()
6204 static inline uint32_t REG_A6XX_SP_FS_MRT(uint32_t i0) { return 0x0000a996 + 0x1*i0; }  in REG_A6XX_SP_FS_MRT()
6206 static inline uint32_t REG_A6XX_SP_FS_MRT_REG(uint32_t i0) { return 0x0000a996 + 0x1*i0; }  in REG_A6XX_SP_FS_MRT_REG()
6231 static inline uint32_t REG_A6XX_SP_FS_PREFETCH(uint32_t i0) { return 0x0000a99f + 0x1*i0; }  in REG_A6XX_SP_FS_PREFETCH()
6233 static inline uint32_t REG_A6XX_SP_FS_PREFETCH_CMD(uint32_t i0) { return 0x0000a99f + 0x1*i0; }  in REG_A6XX_SP_FS_PREFETCH_CMD()
6272 static inline uint32_t REG_A6XX_SP_FS_BINDLESS_PREFETCH(uint32_t i0) { return 0x0000a9a3 + 0x1*i0; }  in REG_A6XX_SP_FS_BINDLESS_PREFETCH()
6274 static inline uint32_t REG_A6XX_SP_FS_BINDLESS_PREFETCH_CMD(uint32_t i0) { return 0x0000a9a3 + 0x1*…  in REG_A6XX_SP_FS_BINDLESS_PREFETCH_CMD()
6320 static inline uint32_t REG_A6XX_SP_CS_BINDLESS_BASE(uint32_t i0) { return 0x0000a9e8 + 0x2*i0; }  in REG_A6XX_SP_CS_BINDLESS_BASE()
6322 static inline uint32_t REG_A6XX_SP_CS_BINDLESS_BASE_ADDR(uint32_t i0) { return 0x0000a9e8 + 0x2*i0;…  in REG_A6XX_SP_CS_BINDLESS_BASE_ADDR()
6324 static inline uint32_t REG_A6XX_SP_FS_OUTPUT(uint32_t i0) { return 0x0000a98e + 0x1*i0; }  in REG_A6XX_SP_FS_OUTPUT()
6326 static inline uint32_t REG_A6XX_SP_FS_OUTPUT_REG(uint32_t i0) { return 0x0000a98e + 0x1*i0; }  in REG_A6XX_SP_FS_OUTPUT_REG()
6431 static inline uint32_t REG_A6XX_SP_BINDLESS_BASE(uint32_t i0) { return 0x0000ab10 + 0x2*i0; }  in REG_A6XX_SP_BINDLESS_BASE()
6433 static inline uint32_t REG_A6XX_SP_BINDLESS_BASE_ADDR(uint32_t i0) { return 0x0000ab10 + 0x2*i0; }  in REG_A6XX_SP_BINDLESS_BASE_ADDR()
6935 static inline uint32_t REG_A6XX_HLSQ_CS_BINDLESS_BASE(uint32_t i0) { return 0x0000b9c0 + 0x2*i0; }  in REG_A6XX_HLSQ_CS_BINDLESS_BASE()
6937 static inline uint32_t REG_A6XX_HLSQ_CS_BINDLESS_BASE_ADDR(uint32_t i0) { return 0x0000b9c0 + 0x2*i…  in REG_A6XX_HLSQ_CS_BINDLESS_BASE_ADDR()
7005 static inline uint32_t REG_A6XX_HLSQ_BINDLESS_BASE(uint32_t i0) { return 0x0000bb20 + 0x2*i0; }  in REG_A6XX_HLSQ_BINDLESS_BASE()
7007 static inline uint32_t REG_A6XX_HLSQ_BINDLESS_BASE_ADDR(uint32_t i0) { return 0x0000bb20 + 0x2*i0; }  in REG_A6XX_HLSQ_BINDLESS_BASE_ADDR()