Lines Matching defs:i0

1033 static inline uint32_t REG_A5XX_CP_SCRATCH(uint32_t i0) { return 0x00000b78 + 0x1*i0; }  in REG_A5XX_CP_SCRATCH()
1035 static inline uint32_t REG_A5XX_CP_SCRATCH_REG(uint32_t i0) { return 0x00000b78 + 0x1*i0; } in REG_A5XX_CP_SCRATCH_REG()
1037 static inline uint32_t REG_A5XX_CP_PROTECT(uint32_t i0) { return 0x00000880 + 0x1*i0; } in REG_A5XX_CP_PROTECT()
1039 static inline uint32_t REG_A5XX_CP_PROTECT_REG(uint32_t i0) { return 0x00000880 + 0x1*i0; } in REG_A5XX_CP_PROTECT_REG()
2131 static inline uint32_t REG_A5XX_VSC_PIPE_CONFIG(uint32_t i0) { return 0x00000bd0 + 0x1*i0; } in REG_A5XX_VSC_PIPE_CONFIG()
2133 static inline uint32_t REG_A5XX_VSC_PIPE_CONFIG_REG(uint32_t i0) { return 0x00000bd0 + 0x1*i0; } in REG_A5XX_VSC_PIPE_CONFIG_REG()
2159 static inline uint32_t REG_A5XX_VSC_PIPE_DATA_ADDRESS(uint32_t i0) { return 0x00000be0 + 0x2*i0; } in REG_A5XX_VSC_PIPE_DATA_ADDRESS()
2161 static inline uint32_t REG_A5XX_VSC_PIPE_DATA_ADDRESS_LO(uint32_t i0) { return 0x00000be0 + 0x2*i0;… in REG_A5XX_VSC_PIPE_DATA_ADDRESS_LO()
2163 static inline uint32_t REG_A5XX_VSC_PIPE_DATA_ADDRESS_HI(uint32_t i0) { return 0x00000be1 + 0x2*i0;… in REG_A5XX_VSC_PIPE_DATA_ADDRESS_HI()
2165 static inline uint32_t REG_A5XX_VSC_PIPE_DATA_LENGTH(uint32_t i0) { return 0x00000c00 + 0x1*i0; } in REG_A5XX_VSC_PIPE_DATA_LENGTH()
2167 static inline uint32_t REG_A5XX_VSC_PIPE_DATA_LENGTH_REG(uint32_t i0) { return 0x00000c00 + 0x1*i0;… in REG_A5XX_VSC_PIPE_DATA_LENGTH_REG()
3225 static inline uint32_t REG_A5XX_RB_MRT(uint32_t i0) { return 0x0000e150 + 0x7*i0; } in REG_A5XX_RB_MRT()
3227 static inline uint32_t REG_A5XX_RB_MRT_CONTROL(uint32_t i0) { return 0x0000e150 + 0x7*i0; } in REG_A5XX_RB_MRT_CONTROL()
3244 static inline uint32_t REG_A5XX_RB_MRT_BLEND_CONTROL(uint32_t i0) { return 0x0000e151 + 0x7*i0; } in REG_A5XX_RB_MRT_BLEND_CONTROL()
3282 static inline uint32_t REG_A5XX_RB_MRT_BUF_INFO(uint32_t i0) { return 0x0000e152 + 0x7*i0; } in REG_A5XX_RB_MRT_BUF_INFO()
3309 static inline uint32_t REG_A5XX_RB_MRT_PITCH(uint32_t i0) { return 0x0000e153 + 0x7*i0; } in REG_A5XX_RB_MRT_PITCH()
3317 static inline uint32_t REG_A5XX_RB_MRT_ARRAY_PITCH(uint32_t i0) { return 0x0000e154 + 0x7*i0; } in REG_A5XX_RB_MRT_ARRAY_PITCH()
3325 static inline uint32_t REG_A5XX_RB_MRT_BASE_LO(uint32_t i0) { return 0x0000e155 + 0x7*i0; } in REG_A5XX_RB_MRT_BASE_LO()
3327 static inline uint32_t REG_A5XX_RB_MRT_BASE_HI(uint32_t i0) { return 0x0000e156 + 0x7*i0; } in REG_A5XX_RB_MRT_BASE_HI()
3734 static inline uint32_t REG_A5XX_RB_MRT_FLAG_BUFFER(uint32_t i0) { return 0x0000e243 + 0x4*i0; } in REG_A5XX_RB_MRT_FLAG_BUFFER()
3736 static inline uint32_t REG_A5XX_RB_MRT_FLAG_BUFFER_ADDR_LO(uint32_t i0) { return 0x0000e243 + 0x4*i… in REG_A5XX_RB_MRT_FLAG_BUFFER_ADDR_LO()
3738 static inline uint32_t REG_A5XX_RB_MRT_FLAG_BUFFER_ADDR_HI(uint32_t i0) { return 0x0000e244 + 0x4*i… in REG_A5XX_RB_MRT_FLAG_BUFFER_ADDR_HI()
3740 static inline uint32_t REG_A5XX_RB_MRT_FLAG_BUFFER_PITCH(uint32_t i0) { return 0x0000e245 + 0x4*i0;… in REG_A5XX_RB_MRT_FLAG_BUFFER_PITCH()
3748 static inline uint32_t REG_A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH(uint32_t i0) { return 0x0000e246 + 0… in REG_A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH()
3789 static inline uint32_t REG_A5XX_VPC_VARYING_INTERP(uint32_t i0) { return 0x0000e282 + 0x1*i0; } in REG_A5XX_VPC_VARYING_INTERP()
3791 static inline uint32_t REG_A5XX_VPC_VARYING_INTERP_MODE(uint32_t i0) { return 0x0000e282 + 0x1*i0; } in REG_A5XX_VPC_VARYING_INTERP_MODE()
3793 static inline uint32_t REG_A5XX_VPC_VARYING_PS_REPL(uint32_t i0) { return 0x0000e28a + 0x1*i0; } in REG_A5XX_VPC_VARYING_PS_REPL()
3795 static inline uint32_t REG_A5XX_VPC_VARYING_PS_REPL_MODE(uint32_t i0) { return 0x0000e28a + 0x1*i0;… in REG_A5XX_VPC_VARYING_PS_REPL_MODE()
3801 static inline uint32_t REG_A5XX_VPC_VAR(uint32_t i0) { return 0x0000e294 + 0x1*i0; } in REG_A5XX_VPC_VAR()
3803 static inline uint32_t REG_A5XX_VPC_VAR_DISABLE(uint32_t i0) { return 0x0000e294 + 0x1*i0; } in REG_A5XX_VPC_VAR_DISABLE()
3866 static inline uint32_t REG_A5XX_VPC_SO(uint32_t i0) { return 0x0000e2a7 + 0x7*i0; } in REG_A5XX_VPC_SO()
3868 static inline uint32_t REG_A5XX_VPC_SO_BUFFER_BASE_LO(uint32_t i0) { return 0x0000e2a7 + 0x7*i0; } in REG_A5XX_VPC_SO_BUFFER_BASE_LO()
3870 static inline uint32_t REG_A5XX_VPC_SO_BUFFER_BASE_HI(uint32_t i0) { return 0x0000e2a8 + 0x7*i0; } in REG_A5XX_VPC_SO_BUFFER_BASE_HI()
3872 static inline uint32_t REG_A5XX_VPC_SO_BUFFER_SIZE(uint32_t i0) { return 0x0000e2a9 + 0x7*i0; } in REG_A5XX_VPC_SO_BUFFER_SIZE()
3874 static inline uint32_t REG_A5XX_VPC_SO_NCOMP(uint32_t i0) { return 0x0000e2aa + 0x7*i0; } in REG_A5XX_VPC_SO_NCOMP()
3876 static inline uint32_t REG_A5XX_VPC_SO_BUFFER_OFFSET(uint32_t i0) { return 0x0000e2ab + 0x7*i0; } in REG_A5XX_VPC_SO_BUFFER_OFFSET()
3878 static inline uint32_t REG_A5XX_VPC_SO_FLUSH_BASE_LO(uint32_t i0) { return 0x0000e2ac + 0x7*i0; } in REG_A5XX_VPC_SO_FLUSH_BASE_LO()
3880 static inline uint32_t REG_A5XX_VPC_SO_FLUSH_BASE_HI(uint32_t i0) { return 0x0000e2ad + 0x7*i0; } in REG_A5XX_VPC_SO_FLUSH_BASE_HI()
4019 static inline uint32_t REG_A5XX_VFD_FETCH(uint32_t i0) { return 0x0000e40a + 0x4*i0; } in REG_A5XX_VFD_FETCH()
4021 static inline uint32_t REG_A5XX_VFD_FETCH_BASE_LO(uint32_t i0) { return 0x0000e40a + 0x4*i0; } in REG_A5XX_VFD_FETCH_BASE_LO()
4023 static inline uint32_t REG_A5XX_VFD_FETCH_BASE_HI(uint32_t i0) { return 0x0000e40b + 0x4*i0; } in REG_A5XX_VFD_FETCH_BASE_HI()
4025 static inline uint32_t REG_A5XX_VFD_FETCH_SIZE(uint32_t i0) { return 0x0000e40c + 0x4*i0; } in REG_A5XX_VFD_FETCH_SIZE()
4027 static inline uint32_t REG_A5XX_VFD_FETCH_STRIDE(uint32_t i0) { return 0x0000e40d + 0x4*i0; } in REG_A5XX_VFD_FETCH_STRIDE()
4029 static inline uint32_t REG_A5XX_VFD_DECODE(uint32_t i0) { return 0x0000e48a + 0x2*i0; } in REG_A5XX_VFD_DECODE()
4031 static inline uint32_t REG_A5XX_VFD_DECODE_INSTR(uint32_t i0) { return 0x0000e48a + 0x2*i0; } in REG_A5XX_VFD_DECODE_INSTR()
4054 static inline uint32_t REG_A5XX_VFD_DECODE_STEP_RATE(uint32_t i0) { return 0x0000e48b + 0x2*i0; } in REG_A5XX_VFD_DECODE_STEP_RATE()
4056 static inline uint32_t REG_A5XX_VFD_DEST_CNTL(uint32_t i0) { return 0x0000e4ca + 0x1*i0; } in REG_A5XX_VFD_DEST_CNTL()
4058 static inline uint32_t REG_A5XX_VFD_DEST_CNTL_INSTR(uint32_t i0) { return 0x0000e4ca + 0x1*i0; } in REG_A5XX_VFD_DEST_CNTL_INSTR()
4206 static inline uint32_t REG_A5XX_SP_VS_OUT(uint32_t i0) { return 0x0000e593 + 0x1*i0; } in REG_A5XX_SP_VS_OUT()
4208 static inline uint32_t REG_A5XX_SP_VS_OUT_REG(uint32_t i0) { return 0x0000e593 + 0x1*i0; } in REG_A5XX_SP_VS_OUT_REG()
4234 static inline uint32_t REG_A5XX_SP_VS_VPC_DST(uint32_t i0) { return 0x0000e5a3 + 0x1*i0; } in REG_A5XX_SP_VS_VPC_DST()
4236 static inline uint32_t REG_A5XX_SP_VS_VPC_DST_REG(uint32_t i0) { return 0x0000e5a3 + 0x1*i0; } in REG_A5XX_SP_VS_VPC_DST_REG()
4327 static inline uint32_t REG_A5XX_SP_FS_OUTPUT(uint32_t i0) { return 0x0000e5cb + 0x1*i0; } in REG_A5XX_SP_FS_OUTPUT()
4329 static inline uint32_t REG_A5XX_SP_FS_OUTPUT_REG(uint32_t i0) { return 0x0000e5cb + 0x1*i0; } in REG_A5XX_SP_FS_OUTPUT_REG()
4338 static inline uint32_t REG_A5XX_SP_FS_MRT(uint32_t i0) { return 0x0000e5d3 + 0x1*i0; } in REG_A5XX_SP_FS_MRT()
4340 static inline uint32_t REG_A5XX_SP_FS_MRT_REG(uint32_t i0) { return 0x0000e5d3 + 0x1*i0; } in REG_A5XX_SP_FS_MRT_REG()