Lines Matching +full:e +full:- +full:ddc
1 // SPDX-License-Identifier: GPL-2.0+
3 * i.MX drm driver - Television Encoder (TVEv2)
8 #include <linux/clk-provider.h>
18 #include <video/imx-ipu-v3.h>
25 #include "imx-drm.h"
112 struct i2c_adapter *ddc; member
124 static inline struct imx_tve *enc_to_tve(struct drm_encoder *e) in enc_to_tve() argument
126 return container_of(e, struct imx_tve, encoder); in enc_to_tve()
131 clk_prepare_enable(tve->clk); in tve_enable()
132 regmap_update_bits(tve->regmap, TVE_COM_CONF_REG, TVE_EN, TVE_EN); in tve_enable()
135 regmap_write(tve->regmap, TVE_STAT_REG, 0xffffffff); in tve_enable()
138 if (tve->mode == TVE_MODE_VGA) in tve_enable()
139 regmap_write(tve->regmap, TVE_INT_CONT_REG, 0); in tve_enable()
141 regmap_write(tve->regmap, TVE_INT_CONT_REG, in tve_enable()
149 regmap_update_bits(tve->regmap, TVE_COM_CONF_REG, TVE_EN, 0); in tve_disable()
150 clk_disable_unprepare(tve->clk); in tve_disable()
155 return -ENOTSUPP; in tve_setup_tvout()
164 /* set gain to (1 + 10/128) to provide 0.7V peak-to-peak amplitude */ in tve_setup_vga()
165 ret = regmap_update_bits(tve->regmap, TVE_TVDAC0_CONT_REG, in tve_setup_vga()
170 ret = regmap_update_bits(tve->regmap, TVE_TVDAC1_CONT_REG, in tve_setup_vga()
175 ret = regmap_update_bits(tve->regmap, TVE_TVDAC2_CONT_REG, in tve_setup_vga()
187 ret = regmap_update_bits(tve->regmap, TVE_COM_CONF_REG, mask, val); in tve_setup_vga()
192 return regmap_update_bits(tve->regmap, TVE_TST_MODE_REG, in tve_setup_vga()
202 if (!tve->ddc) in imx_tve_connector_get_modes()
205 edid = drm_get_edid(connector, tve->ddc); in imx_tve_connector_get_modes()
222 rate = clk_round_rate(tve->clk, 2000UL * mode->clock) / 2000; in imx_tve_connector_mode_valid()
223 if (rate == mode->clock) in imx_tve_connector_mode_valid()
227 rate = clk_round_rate(tve->clk, 1000UL * mode->clock) / 1000; in imx_tve_connector_mode_valid()
228 if (rate == mode->clock) in imx_tve_connector_mode_valid()
231 dev_warn(tve->dev, "ignoring mode %dx%d\n", in imx_tve_connector_mode_valid()
232 mode->hdisplay, mode->vdisplay); in imx_tve_connector_mode_valid()
249 * we should try 4k * mode->clock first, in imx_tve_encoder_mode_set()
252 rate = 2000UL * mode->clock; in imx_tve_encoder_mode_set()
253 clk_set_rate(tve->clk, rate); in imx_tve_encoder_mode_set()
254 rounded_rate = clk_get_rate(tve->clk); in imx_tve_encoder_mode_set()
257 clk_set_rate(tve->di_clk, rounded_rate / div); in imx_tve_encoder_mode_set()
259 ret = clk_set_parent(tve->di_sel_clk, tve->di_clk); in imx_tve_encoder_mode_set()
261 dev_err(tve->dev, "failed to set di_sel parent to tve_di: %d\n", in imx_tve_encoder_mode_set()
265 regmap_update_bits(tve->regmap, TVE_COM_CONF_REG, in imx_tve_encoder_mode_set()
268 if (tve->mode == TVE_MODE_VGA) in imx_tve_encoder_mode_set()
273 dev_err(tve->dev, "failed to set configuration: %d\n", ret); in imx_tve_encoder_mode_set()
297 imx_crtc_state->bus_format = MEDIA_BUS_FMT_GBR888_1X24; in imx_tve_atomic_check()
298 imx_crtc_state->di_hsync_pin = tve->di_hsync_pin; in imx_tve_atomic_check()
299 imx_crtc_state->di_vsync_pin = tve->di_vsync_pin; in imx_tve_atomic_check()
329 regmap_read(tve->regmap, TVE_STAT_REG, &val); in imx_tve_irq_handler()
332 regmap_write(tve->regmap, TVE_STAT_REG, 0xffffffff); in imx_tve_irq_handler()
344 ret = regmap_read(tve->regmap, TVE_COM_CONF_REG, &val); in clk_tve_di_recalc_rate()
390 ret = regmap_update_bits(tve->regmap, TVE_COM_CONF_REG, in clk_tve_di_set_rate()
394 dev_err(tve->dev, "failed to set divider: %d\n", ret); in clk_tve_di_set_rate()
417 tve_di_parent[0] = __clk_get_name(tve->clk); in tve_clk_init()
420 tve->clk_hw_di.init = &init; in tve_clk_init()
421 tve->di_clk = clk_register(tve->dev, &tve->clk_hw_di); in tve_clk_init()
422 if (IS_ERR(tve->di_clk)) { in tve_clk_init()
423 dev_err(tve->dev, "failed to register TVE output clock: %ld\n", in tve_clk_init()
424 PTR_ERR(tve->di_clk)); in tve_clk_init()
425 return PTR_ERR(tve->di_clk); in tve_clk_init()
436 encoder_type = tve->mode == TVE_MODE_VGA ? in imx_tve_register()
439 ret = imx_drm_encoder_parse_of(drm, &tve->encoder, tve->dev->of_node); in imx_tve_register()
443 drm_encoder_helper_add(&tve->encoder, &imx_tve_encoder_helper_funcs); in imx_tve_register()
444 drm_simple_encoder_init(drm, &tve->encoder, encoder_type); in imx_tve_register()
446 drm_connector_helper_add(&tve->connector, in imx_tve_register()
448 drm_connector_init_with_ddc(drm, &tve->connector, in imx_tve_register()
451 tve->ddc); in imx_tve_register()
453 drm_connector_attach_encoder(&tve->connector, &tve->encoder); in imx_tve_register()
462 regulator_disable(tve->dac_reg); in imx_tve_disable_regulator()
492 ret = of_property_read_string(np, "fsl,tve-mode", &bm); in of_get_tve_mode()
500 return -EINVAL; in of_get_tve_mode()
507 struct device_node *np = dev->of_node; in imx_tve_bind()
519 tve->dev = dev; in imx_tve_bind()
521 ddc_node = of_parse_phandle(np, "ddc-i2c-bus", 0); in imx_tve_bind()
523 tve->ddc = of_find_i2c_adapter_by_node(ddc_node); in imx_tve_bind()
527 tve->mode = of_get_tve_mode(np); in imx_tve_bind()
528 if (tve->mode != TVE_MODE_VGA) { in imx_tve_bind()
530 return -EINVAL; in imx_tve_bind()
533 if (tve->mode == TVE_MODE_VGA) { in imx_tve_bind()
534 ret = of_property_read_u32(np, "fsl,hsync-pin", in imx_tve_bind()
535 &tve->di_hsync_pin); in imx_tve_bind()
542 ret = of_property_read_u32(np, "fsl,vsync-pin", in imx_tve_bind()
543 &tve->di_vsync_pin); in imx_tve_bind()
557 tve->regmap = devm_regmap_init_mmio_clk(dev, "tve", base, in imx_tve_bind()
559 if (IS_ERR(tve->regmap)) { in imx_tve_bind()
561 PTR_ERR(tve->regmap)); in imx_tve_bind()
562 return PTR_ERR(tve->regmap); in imx_tve_bind()
571 "imx-tve", tve); in imx_tve_bind()
577 tve->dac_reg = devm_regulator_get(dev, "dac"); in imx_tve_bind()
578 if (!IS_ERR(tve->dac_reg)) { in imx_tve_bind()
579 if (regulator_get_voltage(tve->dac_reg) != IMX_TVE_DAC_VOLTAGE) in imx_tve_bind()
581 ret = regulator_enable(tve->dac_reg); in imx_tve_bind()
589 tve->clk = devm_clk_get(dev, "tve"); in imx_tve_bind()
590 if (IS_ERR(tve->clk)) { in imx_tve_bind()
592 PTR_ERR(tve->clk)); in imx_tve_bind()
593 return PTR_ERR(tve->clk); in imx_tve_bind()
597 tve->di_sel_clk = devm_clk_get(dev, "di_sel"); in imx_tve_bind()
598 if (IS_ERR(tve->di_sel_clk)) { in imx_tve_bind()
600 PTR_ERR(tve->di_sel_clk)); in imx_tve_bind()
601 return PTR_ERR(tve->di_sel_clk); in imx_tve_bind()
608 ret = regmap_read(tve->regmap, TVE_COM_CONF_REG, &val); in imx_tve_bind()
616 return -ENODEV; in imx_tve_bind()
620 ret = regmap_write(tve->regmap, TVE_CD_CONT_REG, 0); in imx_tve_bind()
639 tve = devm_kzalloc(&pdev->dev, sizeof(*tve), GFP_KERNEL); in imx_tve_probe()
641 return -ENOMEM; in imx_tve_probe()
645 return component_add(&pdev->dev, &imx_tve_ops); in imx_tve_probe()
650 component_del(&pdev->dev, &imx_tve_ops); in imx_tve_remove()
655 { .compatible = "fsl,imx53-tve", },
665 .name = "imx-tve",
674 MODULE_ALIAS("platform:imx-tve");