2  * SPDX-License-Identifier: MIT
17 #define TEST_OA_CONFIG_UUID "12345678-1234-1234-1234-1234567890ab"
26 		return -ENOMEM;  in alloc_empty_config()
28 	oa_config->perf = perf;  in alloc_empty_config()
29 	kref_init(&oa_config->ref);  in alloc_empty_config()
31 	strlcpy(oa_config->uuid, TEST_OA_CONFIG_UUID, sizeof(oa_config->uuid));  in alloc_empty_config()
33 	mutex_lock(&perf->metrics_lock);  in alloc_empty_config()
35 	oa_config->id = idr_alloc(&perf->metrics_idr, oa_config, 2, 0, GFP_KERNEL);  in alloc_empty_config()
36 	if (oa_config->id < 0)  {  in alloc_empty_config()
37 		mutex_unlock(&perf->metrics_lock);  in alloc_empty_config()
39 		return -ENOMEM;  in alloc_empty_config()
42 	mutex_unlock(&perf->metrics_lock);  in alloc_empty_config()
53 	mutex_lock(&perf->metrics_lock);  in destroy_empty_config()
55 	idr_for_each_entry(&perf->metrics_idr, tmp, id) {  in destroy_empty_config()
56 		if (!strcmp(tmp->uuid, TEST_OA_CONFIG_UUID)) {  in destroy_empty_config()
63 		idr_remove(&perf->metrics_idr, oa_config->id);  in destroy_empty_config()
65 	mutex_unlock(&perf->metrics_lock);  in destroy_empty_config()
77 	mutex_lock(&perf->metrics_lock);  in get_empty_config()
79 	idr_for_each_entry(&perf->metrics_idr, tmp, id) {  in get_empty_config()
80 		if (!strcmp(tmp->uuid, TEST_OA_CONFIG_UUID)) {  in get_empty_config()
86 	mutex_unlock(&perf->metrics_lock);  in get_empty_config()
97 		.engine = intel_engine_lookup_user(perf->i915,  in test_stream()
101 		.oa_format = IS_GEN(perf->i915, 12) ?  in test_stream()
109 	props.metrics_set = oa_config->id;  in test_stream()
117 	stream->perf = perf;  in test_stream()
119 	mutex_lock(&perf->lock);  in test_stream()
124 	mutex_unlock(&perf->lock);  in test_stream()
133 	struct i915_perf *perf = stream->perf;  in stream_destroy()
135 	mutex_lock(&perf->lock);  in stream_destroy()
137 	mutex_unlock(&perf->lock);  in stream_destroy()
147 	stream = test_stream(&i915->perf);  in live_sanitycheck()
149 		return -EINVAL;  in live_sanitycheck()
157 	u32 *cs;  in write_timestamp()  local
160 	cs = intel_ring_begin(rq, 6);  in write_timestamp()
161 	if (IS_ERR(cs))  in write_timestamp()
162 		return PTR_ERR(cs);  in write_timestamp()
165 	if (INTEL_GEN(rq->engine->i915) >= 8)  in write_timestamp()
168 	*cs++ = GFX_OP_PIPE_CONTROL(len);  in write_timestamp()
169 	*cs++ = PIPE_CONTROL_GLOBAL_GTT_IVB |  in write_timestamp()
172 	*cs++ = slot * sizeof(u32);  in write_timestamp()
173 	*cs++ = 0;  in write_timestamp()
174 	*cs++ = 0;  in write_timestamp()
175 	*cs++ = 0;  in write_timestamp()
177 	intel_ring_advance(rq, cs);  in write_timestamp()
184 	while (!intel_read_status_page(rq->engine, slot) &&  in poll_status()
204 	stream = test_stream(&i915->perf);  in live_noa_delay()
206 		return -ENOMEM;  in live_noa_delay()
208 	expected = atomic64_read(&stream->perf->noa_programming_delay);  in live_noa_delay()
210 	if (stream->engine->class != RENDER_CLASS) {  in live_noa_delay()
211 		err = -ENODEV;  in live_noa_delay()
216 		intel_write_status_page(stream->engine, 0x100 + i, 0);  in live_noa_delay()
218 	rq = intel_engine_create_kernel_request(stream->engine);  in live_noa_delay()
224 	if (rq->engine->emit_init_breadcrumb) {  in live_noa_delay()
225 		err = rq->engine->emit_init_breadcrumb(rq);  in live_noa_delay()
238 	err = rq->engine->emit_bb_start(rq,  in live_noa_delay()
239 					i915_ggtt_offset(stream->noa_wait), 0,  in live_noa_delay()
263 	delay = intel_read_status_page(stream->engine, 0x102);  in live_noa_delay()
264 	delay -= intel_read_status_page(stream->engine, 0x100);  in live_noa_delay()
269 	if (4 * delay < 3 * expected || 2 * delay > 3 * expected) {  in live_noa_delay()
272 		       div_u64(3 * expected, 4000),  in live_noa_delay()
273 		       div_u64(3 * expected, 2000));  in live_noa_delay()
274 		err = -EINVAL;  in live_noa_delay()
289 	u32 *cs, *store;  in live_noa_gpr()  local
297 	stream = test_stream(&i915->perf);  in live_noa_gpr()
299 		return -ENOMEM;  in live_noa_gpr()
301 	gpr0 = i915_mmio_reg_offset(GEN8_RING_CS_GPR(stream->engine->mmio_base, 0));  in live_noa_gpr()
303 	ce = intel_context_create(stream->engine);  in live_noa_gpr()
309 	/* Poison the ce->vm so we detect writes not to the GGTT gt->scratch */  in live_noa_gpr()
310 	scratch = kmap(__px_page(ce->vm->scratch[0]));  in live_noa_gpr()
320 	if (rq->engine->emit_init_breadcrumb) {  in live_noa_gpr()
321 		err = rq->engine->emit_init_breadcrumb(rq);  in live_noa_gpr()
329 	cs = intel_ring_begin(rq, 2 * 32 + 2);  in live_noa_gpr()
330 	if (IS_ERR(cs)) {  in live_noa_gpr()
331 		err = PTR_ERR(cs);  in live_noa_gpr()
336 	*cs++ = MI_LOAD_REGISTER_IMM(32);  in live_noa_gpr()
338 		*cs++ = gpr0 + i * sizeof(u32);  in live_noa_gpr()
339 		*cs++ = STACK_MAGIC;  in live_noa_gpr()
341 	*cs++ = MI_NOOP;  in live_noa_gpr()
342 	intel_ring_advance(rq, cs);  in live_noa_gpr()
345 	err = rq->engine->emit_bb_start(rq,  in live_noa_gpr()
346 					i915_ggtt_offset(stream->noa_wait), 0,  in live_noa_gpr()
354 	store = memset32(rq->engine->status_page.addr + 512, 0, 32);  in live_noa_gpr()
358 		cs = intel_ring_begin(rq, 4);  in live_noa_gpr()
359 		if (IS_ERR(cs)) {  in live_noa_gpr()
360 			err = PTR_ERR(cs);  in live_noa_gpr()
370 		*cs++ = cmd;  in live_noa_gpr()
371 		*cs++ = gpr0 + i * sizeof(u32);  in live_noa_gpr()
372 		*cs++ = i915_ggtt_offset(rq->engine->status_page.vma) +  in live_noa_gpr()
375 		*cs++ = 0;  in live_noa_gpr()
376 		intel_ring_advance(rq, cs);  in live_noa_gpr()
383 		intel_gt_set_wedged(stream->engine->gt);  in live_noa_gpr()
384 		err = -EIO;  in live_noa_gpr()
395 		err = -EINVAL;  in live_noa_gpr()
402 		err = -EINVAL;  in live_noa_gpr()
408 	kunmap(__px_page(ce->vm->scratch[0]));  in live_noa_gpr()
422 	struct i915_perf *perf = &i915->perf;  in i915_perf_live_selftests()
425 	if (!perf->metrics_kobj || !perf->ops.enable_metric_set)  in i915_perf_live_selftests()
428 	if (intel_gt_is_wedged(&i915->gt))  in i915_perf_live_selftests()
431 	err = alloc_empty_config(&i915->perf);  in i915_perf_live_selftests()
437 	destroy_empty_config(&i915->perf);  in i915_perf_live_selftests()