Lines Matching +full:0 +full:xd800
51 mmio_debug->unclaimed_mmio_check = 0; in mmio_debug_suspend()
80 if (id >= 0 && id < FW_DOMAIN_ID_COUNT) in intel_uncore_forcewake_domain_to_str()
101 fw_clear(d, 0xffff); in fw_domain_reset()
129 return __wait_for_ack(d, ack, 0); in wait_ack_clear()
150 ACK_CLEAR = 0,
159 const u32 value = type == ACK_SET ? ack_bit : 0; in fw_domain_wait_ack_with_fallback()
191 DRM_DEBUG_DRIVER("%s had to use fallback to %s ack, 0x%x (passes %u)\n", in fw_domain_wait_ack_with_fallback()
197 return ack_detected ? 0 : -ETIMEDOUT; in fw_domain_wait_ack_with_fallback()
324 * w/a for a sporadic read returning 0 by waiting for the GT in __gen6_gt_wait_for_thread_c0()
328 wait_for_atomic_us(gt_thread_status(uncore) == 0, 5000), in __gen6_gt_wait_for_thread_c0()
390 if (--domain->wake_count == 0) in intel_uncore_fw_release_timer()
416 active_domains = 0; in intel_uncore_forcewake_reset()
420 if (hrtimer_cancel(&domain->timer) == 0) in intel_uncore_forcewake_reset()
433 if (active_domains == 0) in intel_uncore_forcewake_reset()
436 if (--retry_count == 0) { in intel_uncore_forcewake_reset()
495 drm_dbg(&uncore->i915->drm, "GTFIFODBG = 0x08%x\n", fifodbg); in gen6_check_for_fifo_debug()
830 #define NEEDS_FORCE_WAKE(reg) ((reg) < 0x40000)
838 __fwd = 0; \
849 return 0; in fw_range_cmp()
854 unsigned int start__ = 0, end__ = (num); \
859 if (ret__ < 0) { \
861 } else if (ret__ > 0) { \
882 return 0; in find_fw_domain()
893 "Uninitialized forcewake domain(s) 0x%x accessed at 0x%x\n", in find_fw_domain()
904 GEN_FW_RANGE(0x2000, 0x3fff, FORCEWAKE_RENDER),
905 GEN_FW_RANGE(0x5000, 0x7fff, FORCEWAKE_RENDER),
906 GEN_FW_RANGE(0xb000, 0x11fff, FORCEWAKE_RENDER),
907 GEN_FW_RANGE(0x12000, 0x13fff, FORCEWAKE_MEDIA),
908 GEN_FW_RANGE(0x22000, 0x23fff, FORCEWAKE_MEDIA),
909 GEN_FW_RANGE(0x2e000, 0x2ffff, FORCEWAKE_RENDER),
910 GEN_FW_RANGE(0x30000, 0x3ffff, FORCEWAKE_MEDIA),
915 enum forcewake_domains __fwd = 0; \
929 RING_TAIL(RENDER_RING_BASE), /* 0x2000 (base) */
930 GEN6_RPNSWREQ, /* 0xA008 */
931 GEN6_RC_VIDEO_FREQ, /* 0xA00C */
932 RING_TAIL(GEN6_BSD_RING_BASE), /* 0x12000 (base) */
933 RING_TAIL(VEBOX_RING_BASE), /* 0x1a000 (base) */
934 RING_TAIL(BLT_RING_BASE), /* 0x22000 (base) */
939 RING_TAIL(RENDER_RING_BASE), /* 0x2000 (base) */
940 GEN6_RPNSWREQ, /* 0xA008 */
941 GEN6_RC_VIDEO_FREQ, /* 0xA00C */
942 RING_TAIL(BLT_RING_BASE), /* 0x22000 (base) */
943 RING_TAIL(GEN11_BSD_RING_BASE), /* 0x1C0000 (base) */
944 RING_TAIL(GEN11_BSD2_RING_BASE), /* 0x1C4000 (base) */
945 RING_TAIL(GEN11_VEBOX_RING_BASE), /* 0x1C8000 (base) */
946 RING_TAIL(GEN11_BSD3_RING_BASE), /* 0x1D0000 (base) */
947 RING_TAIL(GEN11_BSD4_RING_BASE), /* 0x1D4000 (base) */
948 RING_TAIL(GEN11_VEBOX2_RING_BASE), /* 0x1D8000 (base) */
953 RING_TAIL(RENDER_RING_BASE), /* 0x2000 (base) */
954 GEN6_RPNSWREQ, /* 0xA008 */
955 GEN6_RC_VIDEO_FREQ, /* 0xA00C */
956 RING_TAIL(BLT_RING_BASE), /* 0x22000 (base) */
957 RING_TAIL(GEN11_BSD_RING_BASE), /* 0x1C0000 (base) */
958 RING_TAIL(GEN11_BSD2_RING_BASE), /* 0x1C4000 (base) */
959 RING_TAIL(GEN11_VEBOX_RING_BASE), /* 0x1C8000 (base) */
960 RING_TAIL(GEN11_BSD3_RING_BASE), /* 0x1D0000 (base) */
961 RING_TAIL(GEN11_BSD4_RING_BASE), /* 0x1D4000 (base) */
962 RING_TAIL(GEN11_VEBOX2_RING_BASE), /* 0x1D8000 (base) */
975 return 0; in mmio_reg_cmp()
1002 __fwd = 0; \
1008 GEN_FW_RANGE(0x2000, 0x3fff, FORCEWAKE_RENDER),
1009 GEN_FW_RANGE(0x4000, 0x4fff, FORCEWAKE_RENDER | FORCEWAKE_MEDIA),
1010 GEN_FW_RANGE(0x5200, 0x7fff, FORCEWAKE_RENDER),
1011 GEN_FW_RANGE(0x8000, 0x82ff, FORCEWAKE_RENDER | FORCEWAKE_MEDIA),
1012 GEN_FW_RANGE(0x8300, 0x84ff, FORCEWAKE_RENDER),
1013 GEN_FW_RANGE(0x8500, 0x85ff, FORCEWAKE_RENDER | FORCEWAKE_MEDIA),
1014 GEN_FW_RANGE(0x8800, 0x88ff, FORCEWAKE_MEDIA),
1015 GEN_FW_RANGE(0x9000, 0xafff, FORCEWAKE_RENDER | FORCEWAKE_MEDIA),
1016 GEN_FW_RANGE(0xb000, 0xb47f, FORCEWAKE_RENDER),
1017 GEN_FW_RANGE(0xd000, 0xd7ff, FORCEWAKE_MEDIA),
1018 GEN_FW_RANGE(0xe000, 0xe7ff, FORCEWAKE_RENDER),
1019 GEN_FW_RANGE(0xf000, 0xffff, FORCEWAKE_RENDER | FORCEWAKE_MEDIA),
1020 GEN_FW_RANGE(0x12000, 0x13fff, FORCEWAKE_MEDIA),
1021 GEN_FW_RANGE(0x1a000, 0x1bfff, FORCEWAKE_MEDIA),
1022 GEN_FW_RANGE(0x1e800, 0x1e9ff, FORCEWAKE_MEDIA),
1023 GEN_FW_RANGE(0x30000, 0x37fff, FORCEWAKE_MEDIA),
1028 enum forcewake_domains __fwd = 0; \
1036 enum forcewake_domains __fwd = 0; \
1045 enum forcewake_domains __fwd = 0; \
1054 GEN_FW_RANGE(0x0, 0xaff, FORCEWAKE_BLITTER),
1055 GEN_FW_RANGE(0xb00, 0x1fff, 0), /* uncore range */
1056 GEN_FW_RANGE(0x2000, 0x26ff, FORCEWAKE_RENDER),
1057 GEN_FW_RANGE(0x2700, 0x2fff, FORCEWAKE_BLITTER),
1058 GEN_FW_RANGE(0x3000, 0x3fff, FORCEWAKE_RENDER),
1059 GEN_FW_RANGE(0x4000, 0x51ff, FORCEWAKE_BLITTER),
1060 GEN_FW_RANGE(0x5200, 0x7fff, FORCEWAKE_RENDER),
1061 GEN_FW_RANGE(0x8000, 0x812f, FORCEWAKE_BLITTER),
1062 GEN_FW_RANGE(0x8130, 0x813f, FORCEWAKE_MEDIA),
1063 GEN_FW_RANGE(0x8140, 0x815f, FORCEWAKE_RENDER),
1064 GEN_FW_RANGE(0x8160, 0x82ff, FORCEWAKE_BLITTER),
1065 GEN_FW_RANGE(0x8300, 0x84ff, FORCEWAKE_RENDER),
1066 GEN_FW_RANGE(0x8500, 0x87ff, FORCEWAKE_BLITTER),
1067 GEN_FW_RANGE(0x8800, 0x89ff, FORCEWAKE_MEDIA),
1068 GEN_FW_RANGE(0x8a00, 0x8bff, FORCEWAKE_BLITTER),
1069 GEN_FW_RANGE(0x8c00, 0x8cff, FORCEWAKE_RENDER),
1070 GEN_FW_RANGE(0x8d00, 0x93ff, FORCEWAKE_BLITTER),
1071 GEN_FW_RANGE(0x9400, 0x97ff, FORCEWAKE_RENDER | FORCEWAKE_MEDIA),
1072 GEN_FW_RANGE(0x9800, 0xafff, FORCEWAKE_BLITTER),
1073 GEN_FW_RANGE(0xb000, 0xb47f, FORCEWAKE_RENDER),
1074 GEN_FW_RANGE(0xb480, 0xcfff, FORCEWAKE_BLITTER),
1075 GEN_FW_RANGE(0xd000, 0xd7ff, FORCEWAKE_MEDIA),
1076 GEN_FW_RANGE(0xd800, 0xdfff, FORCEWAKE_BLITTER),
1077 GEN_FW_RANGE(0xe000, 0xe8ff, FORCEWAKE_RENDER),
1078 GEN_FW_RANGE(0xe900, 0x11fff, FORCEWAKE_BLITTER),
1079 GEN_FW_RANGE(0x12000, 0x13fff, FORCEWAKE_MEDIA),
1080 GEN_FW_RANGE(0x14000, 0x19fff, FORCEWAKE_BLITTER),
1081 GEN_FW_RANGE(0x1a000, 0x1e9ff, FORCEWAKE_MEDIA),
1082 GEN_FW_RANGE(0x1ea00, 0x243ff, FORCEWAKE_BLITTER),
1083 GEN_FW_RANGE(0x24400, 0x247ff, FORCEWAKE_RENDER),
1084 GEN_FW_RANGE(0x24800, 0x2ffff, FORCEWAKE_BLITTER),
1085 GEN_FW_RANGE(0x30000, 0x3ffff, FORCEWAKE_MEDIA),
1090 GEN_FW_RANGE(0x0, 0x1fff, 0), /* uncore range */
1091 GEN_FW_RANGE(0x2000, 0x26ff, FORCEWAKE_RENDER),
1092 GEN_FW_RANGE(0x2700, 0x2fff, FORCEWAKE_BLITTER),
1093 GEN_FW_RANGE(0x3000, 0x3fff, FORCEWAKE_RENDER),
1094 GEN_FW_RANGE(0x4000, 0x51ff, FORCEWAKE_BLITTER),
1095 GEN_FW_RANGE(0x5200, 0x7fff, FORCEWAKE_RENDER),
1096 GEN_FW_RANGE(0x8000, 0x813f, FORCEWAKE_BLITTER),
1097 GEN_FW_RANGE(0x8140, 0x815f, FORCEWAKE_RENDER),
1098 GEN_FW_RANGE(0x8160, 0x82ff, FORCEWAKE_BLITTER),
1099 GEN_FW_RANGE(0x8300, 0x84ff, FORCEWAKE_RENDER),
1100 GEN_FW_RANGE(0x8500, 0x87ff, FORCEWAKE_BLITTER),
1101 GEN_FW_RANGE(0x8800, 0x8bff, 0),
1102 GEN_FW_RANGE(0x8c00, 0x8cff, FORCEWAKE_RENDER),
1103 GEN_FW_RANGE(0x8d00, 0x94cf, FORCEWAKE_BLITTER),
1104 GEN_FW_RANGE(0x94d0, 0x955f, FORCEWAKE_RENDER),
1105 GEN_FW_RANGE(0x9560, 0x95ff, 0),
1106 GEN_FW_RANGE(0x9600, 0xafff, FORCEWAKE_BLITTER),
1107 GEN_FW_RANGE(0xb000, 0xb47f, FORCEWAKE_RENDER),
1108 GEN_FW_RANGE(0xb480, 0xdeff, FORCEWAKE_BLITTER),
1109 GEN_FW_RANGE(0xdf00, 0xe8ff, FORCEWAKE_RENDER),
1110 GEN_FW_RANGE(0xe900, 0x16dff, FORCEWAKE_BLITTER),
1111 GEN_FW_RANGE(0x16e00, 0x19fff, FORCEWAKE_RENDER),
1112 GEN_FW_RANGE(0x1a000, 0x23fff, FORCEWAKE_BLITTER),
1113 GEN_FW_RANGE(0x24000, 0x2407f, 0),
1114 GEN_FW_RANGE(0x24080, 0x2417f, FORCEWAKE_BLITTER),
1115 GEN_FW_RANGE(0x24180, 0x242ff, FORCEWAKE_RENDER),
1116 GEN_FW_RANGE(0x24300, 0x243ff, FORCEWAKE_BLITTER),
1117 GEN_FW_RANGE(0x24400, 0x24fff, FORCEWAKE_RENDER),
1118 GEN_FW_RANGE(0x25000, 0x3ffff, FORCEWAKE_BLITTER),
1119 GEN_FW_RANGE(0x40000, 0x1bffff, 0),
1120 GEN_FW_RANGE(0x1c0000, 0x1c3fff, FORCEWAKE_MEDIA_VDBOX0),
1121 GEN_FW_RANGE(0x1c4000, 0x1c7fff, 0),
1122 GEN_FW_RANGE(0x1c8000, 0x1cffff, FORCEWAKE_MEDIA_VEBOX0),
1123 GEN_FW_RANGE(0x1d0000, 0x1d3fff, FORCEWAKE_MEDIA_VDBOX2),
1124 GEN_FW_RANGE(0x1d4000, 0x1dbfff, 0)
1129 GEN_FW_RANGE(0x0, 0xaff, FORCEWAKE_BLITTER),
1130 GEN_FW_RANGE(0xb00, 0x1fff, 0), /* uncore range */
1131 GEN_FW_RANGE(0x2000, 0x26ff, FORCEWAKE_RENDER),
1132 GEN_FW_RANGE(0x2700, 0x2fff, FORCEWAKE_BLITTER),
1133 GEN_FW_RANGE(0x3000, 0x3fff, FORCEWAKE_RENDER),
1134 GEN_FW_RANGE(0x4000, 0x51ff, FORCEWAKE_BLITTER),
1135 GEN_FW_RANGE(0x5200, 0x7fff, FORCEWAKE_RENDER),
1136 GEN_FW_RANGE(0x8000, 0x813f, FORCEWAKE_BLITTER),
1137 GEN_FW_RANGE(0x8140, 0x815f, FORCEWAKE_RENDER),
1138 GEN_FW_RANGE(0x8160, 0x82ff, FORCEWAKE_BLITTER),
1139 GEN_FW_RANGE(0x8300, 0x84ff, FORCEWAKE_RENDER),
1140 GEN_FW_RANGE(0x8500, 0x8bff, FORCEWAKE_BLITTER),
1141 GEN_FW_RANGE(0x8c00, 0x8cff, FORCEWAKE_RENDER),
1142 GEN_FW_RANGE(0x8d00, 0x93ff, FORCEWAKE_BLITTER),
1143 GEN_FW_RANGE(0x9400, 0x97ff, FORCEWAKE_ALL),
1144 GEN_FW_RANGE(0x9800, 0xafff, FORCEWAKE_BLITTER),
1145 GEN_FW_RANGE(0xb000, 0xb47f, FORCEWAKE_RENDER),
1146 GEN_FW_RANGE(0xb480, 0xdfff, FORCEWAKE_BLITTER),
1147 GEN_FW_RANGE(0xe000, 0xe8ff, FORCEWAKE_RENDER),
1148 GEN_FW_RANGE(0xe900, 0x147ff, FORCEWAKE_BLITTER),
1149 GEN_FW_RANGE(0x14800, 0x148ff, FORCEWAKE_RENDER),
1150 GEN_FW_RANGE(0x14900, 0x19fff, FORCEWAKE_BLITTER),
1151 GEN_FW_RANGE(0x1a000, 0x1a7ff, FORCEWAKE_RENDER),
1152 GEN_FW_RANGE(0x1a800, 0x1afff, FORCEWAKE_BLITTER),
1153 GEN_FW_RANGE(0x1b000, 0x1bfff, FORCEWAKE_RENDER),
1154 GEN_FW_RANGE(0x1c000, 0x243ff, FORCEWAKE_BLITTER),
1155 GEN_FW_RANGE(0x24400, 0x247ff, FORCEWAKE_RENDER),
1156 GEN_FW_RANGE(0x24800, 0x3ffff, FORCEWAKE_BLITTER),
1157 GEN_FW_RANGE(0x40000, 0x1bffff, 0),
1158 GEN_FW_RANGE(0x1c0000, 0x1c3fff, FORCEWAKE_MEDIA_VDBOX0),
1159 GEN_FW_RANGE(0x1c4000, 0x1c7fff, FORCEWAKE_MEDIA_VDBOX1),
1160 GEN_FW_RANGE(0x1c8000, 0x1cbfff, FORCEWAKE_MEDIA_VEBOX0),
1161 GEN_FW_RANGE(0x1cc000, 0x1cffff, FORCEWAKE_BLITTER),
1162 GEN_FW_RANGE(0x1d0000, 0x1d3fff, FORCEWAKE_MEDIA_VDBOX2),
1163 GEN_FW_RANGE(0x1d4000, 0x1d7fff, FORCEWAKE_MEDIA_VDBOX3),
1164 GEN_FW_RANGE(0x1d8000, 0x1dbfff, FORCEWAKE_MEDIA_VEBOX1)
1172 * hence harmless to write 0 into. */ in ilk_dummy_write()
1173 __raw_uncore_write32(uncore, MI_MODE, 0); in ilk_dummy_write()
1184 "Unclaimed %s register 0x%x\n", in __unclaimed_reg_debug()
1225 u##x val = 0; \
1267 u##x val = 0; \
1444 } while (0)
1452 } while (0)
1458 } while (0)
1464 } while (0)
1487 d->wake_count = 0; in __fw_domain_init()
1514 return 0; in __fw_domain_init()
1546 int ret = 0; in intel_uncore_fw_domains_init()
1567 for (i = 0; i < I915_MAX_VCS; i++) { in intel_uncore_fw_domains_init()
1575 for (i = 0; i < I915_MAX_VECS; i++) { in intel_uncore_fw_domains_init()
1630 __raw_uncore_write32(uncore, FORCEWAKE, 0); in intel_uncore_fw_domains_init()
1662 drm_WARN_ON(&i915->drm, !ret && uncore->fw_domains == 0); in intel_uncore_fw_domains_init()
1718 mmio_bar = IS_GEN(i915, 2) ? 1 : 0; in uncore_mmio_setup()
1737 return 0; in uncore_mmio_setup()
1782 forcewake_early_sanitize(uncore, 0); in uncore_forcewake_init()
1819 return 0; in uncore_forcewake_init()
1861 return 0; in intel_uncore_init_mmio()
1884 for (i = 0; i < I915_MAX_VCS; i++) { in intel_uncore_prune_engine_fw_domains()
1894 for (i = 0; i < I915_MAX_VECS; i++) { in intel_uncore_prune_engine_fw_domains()
1941 int ret = 0; in i915_reg_read_ioctl()
1969 else if (entry->size == 8 && flags == 0) in i915_reg_read_ioctl()
1972 else if (entry->size == 4 && flags == 0) in i915_reg_read_ioctl()
1974 else if (entry->size == 2 && flags == 0) in i915_reg_read_ioctl()
1977 else if (entry->size == 1 && flags == 0) in i915_reg_read_ioctl()
2011 * Return: 0 if the register matches the desired condition, or -ETIMEDOUT.
2021 u32 reg_value = 0; in __intel_wait_for_register_fw()
2032 ret = _wait_for_atomic(done, fast_timeout_us, 0); in __intel_wait_for_register_fw()
2060 * Return: 0 if the register matches the desired condition, or -ETIMEDOUT.
2082 fast_timeout_us, 0, ®_value); in __intel_wait_for_register()
2120 if (unlikely(uncore->debug->unclaimed_mmio_check <= 0)) in intel_uncore_arm_unclaimed_mmio_detection()
2159 enum forcewake_domains fw_domains = 0; in intel_uncore_forcewake_for_reg()
2164 return 0; in intel_uncore_forcewake_for_reg()