109 	/* ss_en represents entire subslice mask across all slices */  in gen11_compute_sseu_info()
343 	 * to each of the enabled slices.  in gen9_sseu_info_init()
350 	 * Iterate through enabled slices and subslices to  in gen9_sseu_info_init()
445 	 * to each of the enabled slices.  in bdw_sseu_info_init()
462 	 * Iterate through enabled slices and subslices to  in bdw_sseu_info_init()
525 	 * There isn't a register to tell us how many slices/subslices. We  in hsw_sseu_info_init()
610 	u8 slices, subslices;  in intel_sseu_make_rpcs()  local
627 	slices = hweight8(req_sseu->slice_mask);  in intel_sseu_make_rpcs()
642 	 * If enabled subslice count is greater than four, two whole slices must  in intel_sseu_make_rpcs()
656 	    slices == 1 &&  in intel_sseu_make_rpcs()
661 		slices *= 2;  in intel_sseu_make_rpcs()
671 		u32 mask, val = slices;  in intel_sseu_make_rpcs()