Lines Matching full:engine
144 * intel_engine_context_size() - return the size of the context for an engine
146 * @class: engine class
148 * Each engine class may require a different amount of space for a context
151 * Return: size (in bytes) of an engine class specific context image
242 static void __sprint_engine_name(struct intel_engine_cs *engine) in __sprint_engine_name() argument
245 * Before we know what the uABI name for this engine will be, in __sprint_engine_name()
246 * we still would like to keep track of this engine in the debug logs. in __sprint_engine_name()
249 GEM_WARN_ON(snprintf(engine->name, sizeof(engine->name), "%s'%u", in __sprint_engine_name()
250 intel_engine_class_repr(engine->class), in __sprint_engine_name()
251 engine->instance) >= sizeof(engine->name)); in __sprint_engine_name()
254 void intel_engine_set_hwsp_writemask(struct intel_engine_cs *engine, u32 mask) in intel_engine_set_hwsp_writemask() argument
258 * per-engine HWSTAM until gen6. in intel_engine_set_hwsp_writemask()
260 if (INTEL_GEN(engine->i915) < 6 && engine->class != RENDER_CLASS) in intel_engine_set_hwsp_writemask()
263 if (INTEL_GEN(engine->i915) >= 3) in intel_engine_set_hwsp_writemask()
264 ENGINE_WRITE(engine, RING_HWSTAM, mask); in intel_engine_set_hwsp_writemask()
266 ENGINE_WRITE16(engine, RING_HWSTAM, mask); in intel_engine_set_hwsp_writemask()
269 static void intel_engine_sanitize_mmio(struct intel_engine_cs *engine) in intel_engine_sanitize_mmio() argument
272 intel_engine_set_hwsp_writemask(engine, ~0u); in intel_engine_sanitize_mmio()
279 struct intel_engine_cs *engine; in intel_engine_setup() local
284 if (GEM_DEBUG_WARN_ON(id >= ARRAY_SIZE(gt->engine))) in intel_engine_setup()
296 engine = kzalloc(sizeof(*engine), GFP_KERNEL); in intel_engine_setup()
297 if (!engine) in intel_engine_setup()
300 BUILD_BUG_ON(BITS_PER_TYPE(engine->mask) < I915_NUM_ENGINES); in intel_engine_setup()
302 engine->id = id; in intel_engine_setup()
303 engine->legacy_idx = INVALID_ENGINE; in intel_engine_setup()
304 engine->mask = BIT(id); in intel_engine_setup()
305 engine->i915 = i915; in intel_engine_setup()
306 engine->gt = gt; in intel_engine_setup()
307 engine->uncore = gt->uncore; in intel_engine_setup()
308 engine->hw_id = engine->guc_id = info->hw_id; in intel_engine_setup()
309 engine->mmio_base = __engine_mmio_base(i915, info->mmio_bases); in intel_engine_setup()
311 engine->class = info->class; in intel_engine_setup()
312 engine->instance = info->instance; in intel_engine_setup()
313 __sprint_engine_name(engine); in intel_engine_setup()
315 engine->props.heartbeat_interval_ms = in intel_engine_setup()
317 engine->props.max_busywait_duration_ns = in intel_engine_setup()
319 engine->props.preempt_timeout_ms = in intel_engine_setup()
321 engine->props.stop_timeout_ms = in intel_engine_setup()
323 engine->props.timeslice_duration_ms = in intel_engine_setup()
327 if (INTEL_GEN(i915) == 12 && engine->class == RENDER_CLASS) in intel_engine_setup()
328 engine->props.preempt_timeout_ms = 0; in intel_engine_setup()
330 engine->defaults = engine->props; /* never to change again */ in intel_engine_setup()
332 engine->context_size = intel_engine_context_size(gt, engine->class); in intel_engine_setup()
333 if (WARN_ON(engine->context_size > BIT(20))) in intel_engine_setup()
334 engine->context_size = 0; in intel_engine_setup()
335 if (engine->context_size) in intel_engine_setup()
339 engine->schedule = NULL; in intel_engine_setup()
341 ewma__engine_latency_init(&engine->latency); in intel_engine_setup()
342 seqlock_init(&engine->stats.lock); in intel_engine_setup()
344 ATOMIC_INIT_NOTIFIER_HEAD(&engine->context_status_notifier); in intel_engine_setup()
347 intel_engine_sanitize_mmio(engine); in intel_engine_setup()
349 gt->engine_class[info->class][info->instance] = engine; in intel_engine_setup()
350 gt->engine[id] = engine; in intel_engine_setup()
355 static void __setup_engine_capabilities(struct intel_engine_cs *engine) in __setup_engine_capabilities() argument
357 struct drm_i915_private *i915 = engine->i915; in __setup_engine_capabilities()
359 if (engine->class == VIDEO_DECODE_CLASS) { in __setup_engine_capabilities()
361 * HEVC support is present on first engine instance in __setup_engine_capabilities()
365 (INTEL_GEN(i915) >= 9 && engine->instance == 0)) in __setup_engine_capabilities()
366 engine->uabi_capabilities |= in __setup_engine_capabilities()
370 * SFC block is present only on even logical engine in __setup_engine_capabilities()
374 (engine->gt->info.vdbox_sfc_access & in __setup_engine_capabilities()
375 BIT(engine->instance))) || in __setup_engine_capabilities()
376 (INTEL_GEN(i915) >= 9 && engine->instance == 0)) in __setup_engine_capabilities()
377 engine->uabi_capabilities |= in __setup_engine_capabilities()
379 } else if (engine->class == VIDEO_ENHANCEMENT_CLASS) { in __setup_engine_capabilities()
381 engine->uabi_capabilities |= in __setup_engine_capabilities()
388 struct intel_engine_cs *engine; in intel_setup_engine_capabilities() local
391 for_each_engine(engine, gt, id) in intel_setup_engine_capabilities()
392 __setup_engine_capabilities(engine); in intel_setup_engine_capabilities()
401 struct intel_engine_cs *engine; in intel_engines_release() local
405 * Before we release the resources held by engine, we must be certain in intel_engines_release()
418 for_each_engine(engine, gt, id) { in intel_engines_release()
419 if (!engine->release) in intel_engines_release()
422 intel_wakeref_wait_for_idle(&engine->wakeref); in intel_engines_release()
423 GEM_BUG_ON(intel_engine_pm_is_awake(engine)); in intel_engines_release()
425 engine->release(engine); in intel_engines_release()
426 engine->release = NULL; in intel_engines_release()
428 memset(&engine->reset, 0, sizeof(engine->reset)); in intel_engines_release()
432 void intel_engine_free_request_pool(struct intel_engine_cs *engine) in intel_engine_free_request_pool() argument
434 if (!engine->request_pool) in intel_engine_free_request_pool()
437 kmem_cache_free(i915_request_slab_cache(), engine->request_pool); in intel_engine_free_request_pool()
442 struct intel_engine_cs *engine; in intel_engines_free() local
448 for_each_engine(engine, gt, id) { in intel_engines_free()
449 intel_engine_free_request_pool(engine); in intel_engines_free()
450 kfree(engine); in intel_engines_free()
451 gt->engine[id] = NULL; in intel_engines_free()
458 * the blitter forcewake domain to read the engine fuses, but at the same time
461 * domains based on the full engine mask in the platform capabilities before
530 * intel_engines_init_mmio() - allocate and prepare the Engine Command Streamers
584 void intel_engine_init_execlists(struct intel_engine_cs *engine) in intel_engine_init_execlists() argument
586 struct intel_engine_execlists * const execlists = &engine->execlists; in intel_engine_init_execlists()
600 static void cleanup_status_page(struct intel_engine_cs *engine) in cleanup_status_page() argument
605 intel_engine_set_hwsp_writemask(engine, ~0u); in cleanup_status_page()
607 vma = fetch_and_zero(&engine->status_page.vma); in cleanup_status_page()
611 if (!HWS_NEEDS_PHYSICAL(engine->i915)) in cleanup_status_page()
618 static int pin_ggtt_status_page(struct intel_engine_cs *engine, in pin_ggtt_status_page() argument
623 if (!HAS_LLC(engine->i915) && i915_ggtt_has_aperture(engine->gt->ggtt)) in pin_ggtt_status_page()
642 static int init_status_page(struct intel_engine_cs *engine) in init_status_page() argument
656 obj = i915_gem_object_create_internal(engine->i915, PAGE_SIZE); in init_status_page()
658 drm_err(&engine->i915->drm, in init_status_page()
665 vma = i915_vma_instance(obj, &engine->gt->ggtt->vm, NULL); in init_status_page()
677 engine->status_page.addr = memset(vaddr, 0, PAGE_SIZE); in init_status_page()
678 engine->status_page.vma = vma; in init_status_page()
680 if (!HWS_NEEDS_PHYSICAL(engine->i915)) { in init_status_page()
681 ret = pin_ggtt_status_page(engine, vma); in init_status_page()
695 static int engine_setup_common(struct intel_engine_cs *engine) in engine_setup_common() argument
699 init_llist_head(&engine->barrier_tasks); in engine_setup_common()
701 err = init_status_page(engine); in engine_setup_common()
705 engine->breadcrumbs = intel_breadcrumbs_create(engine); in engine_setup_common()
706 if (!engine->breadcrumbs) { in engine_setup_common()
711 intel_engine_init_active(engine, ENGINE_PHYSICAL); in engine_setup_common()
712 intel_engine_init_execlists(engine); in engine_setup_common()
713 intel_engine_init_cmd_parser(engine); in engine_setup_common()
714 intel_engine_init__pm(engine); in engine_setup_common()
715 intel_engine_init_retire(engine); in engine_setup_common()
718 engine->sseu = in engine_setup_common()
719 intel_sseu_from_device_info(&engine->gt->info.sseu); in engine_setup_common()
721 intel_engine_init_workarounds(engine); in engine_setup_common()
722 intel_engine_init_whitelist(engine); in engine_setup_common()
723 intel_engine_init_ctx_wa(engine); in engine_setup_common()
728 cleanup_status_page(engine); in engine_setup_common()
740 struct intel_engine_cs *engine = ce->engine; in measure_breadcrumb_dw() local
744 GEM_BUG_ON(!engine->gt->scratch); in measure_breadcrumb_dw()
750 frame->rq.engine = engine; in measure_breadcrumb_dw()
763 spin_lock_irq(&engine->active.lock); in measure_breadcrumb_dw()
765 dw = engine->emit_fini_breadcrumb(&frame->rq, frame->cs) - frame->cs; in measure_breadcrumb_dw()
767 spin_unlock_irq(&engine->active.lock); in measure_breadcrumb_dw()
777 intel_engine_init_active(struct intel_engine_cs *engine, unsigned int subclass) in intel_engine_init_active() argument
779 INIT_LIST_HEAD(&engine->active.requests); in intel_engine_init_active()
780 INIT_LIST_HEAD(&engine->active.hold); in intel_engine_init_active()
782 spin_lock_init(&engine->active.lock); in intel_engine_init_active()
783 lockdep_set_subclass(&engine->active.lock, subclass); in intel_engine_init_active()
792 lock_map_acquire(&engine->active.lock.dep_map); in intel_engine_init_active()
793 lock_map_release(&engine->active.lock.dep_map); in intel_engine_init_active()
799 create_pinned_context(struct intel_engine_cs *engine, in create_pinned_context() argument
807 ce = intel_context_create(engine); in create_pinned_context()
832 create_kernel_context(struct intel_engine_cs *engine) in create_kernel_context() argument
836 return create_pinned_context(engine, I915_GEM_HWS_SEQNO_ADDR, in create_kernel_context()
842 * @engine: Engine to initialize.
844 * Initializes @engine@ structure members shared between legacy and execlists
847 * Typcally done at later stages of submission mode specific engine setup.
851 static int engine_init_common(struct intel_engine_cs *engine) in engine_init_common() argument
856 engine->set_default_submission(engine); in engine_init_common()
866 ce = create_kernel_context(engine); in engine_init_common()
874 engine->emit_fini_breadcrumb_dw = ret; in engine_init_common()
875 engine->kernel_context = ce; in engine_init_common()
886 int (*setup)(struct intel_engine_cs *engine); in intel_engines_init()
887 struct intel_engine_cs *engine; in intel_engines_init() local
896 for_each_engine(engine, gt, id) { in intel_engines_init()
897 err = engine_setup_common(engine); in intel_engines_init()
901 err = setup(engine); in intel_engines_init()
905 err = engine_init_common(engine); in intel_engines_init()
909 intel_engine_add_user(engine); in intel_engines_init()
916 * intel_engines_cleanup_common - cleans up the engine state created by
918 * @engine: Engine to cleanup.
922 void intel_engine_cleanup_common(struct intel_engine_cs *engine) in intel_engine_cleanup_common() argument
924 GEM_BUG_ON(!list_empty(&engine->active.requests)); in intel_engine_cleanup_common()
925 tasklet_kill(&engine->execlists.tasklet); /* flush the callback */ in intel_engine_cleanup_common()
927 cleanup_status_page(engine); in intel_engine_cleanup_common()
928 intel_breadcrumbs_free(engine->breadcrumbs); in intel_engine_cleanup_common()
930 intel_engine_fini_retire(engine); in intel_engine_cleanup_common()
931 intel_engine_cleanup_cmd_parser(engine); in intel_engine_cleanup_common()
933 if (engine->default_state) in intel_engine_cleanup_common()
934 fput(engine->default_state); in intel_engine_cleanup_common()
936 if (engine->kernel_context) { in intel_engine_cleanup_common()
937 intel_context_unpin(engine->kernel_context); in intel_engine_cleanup_common()
938 intel_context_put(engine->kernel_context); in intel_engine_cleanup_common()
940 GEM_BUG_ON(!llist_empty(&engine->barrier_tasks)); in intel_engine_cleanup_common()
942 intel_wa_list_free(&engine->ctx_wa_list); in intel_engine_cleanup_common()
943 intel_wa_list_free(&engine->wa_list); in intel_engine_cleanup_common()
944 intel_wa_list_free(&engine->whitelist); in intel_engine_cleanup_common()
948 * intel_engine_resume - re-initializes the HW state of the engine
949 * @engine: Engine to resume.
953 int intel_engine_resume(struct intel_engine_cs *engine) in intel_engine_resume() argument
955 intel_engine_apply_workarounds(engine); in intel_engine_resume()
956 intel_engine_apply_whitelist(engine); in intel_engine_resume()
958 return engine->resume(engine); in intel_engine_resume()
961 u64 intel_engine_get_active_head(const struct intel_engine_cs *engine) in intel_engine_get_active_head() argument
963 struct drm_i915_private *i915 = engine->i915; in intel_engine_get_active_head()
968 acthd = ENGINE_READ64(engine, RING_ACTHD, RING_ACTHD_UDW); in intel_engine_get_active_head()
970 acthd = ENGINE_READ(engine, RING_ACTHD); in intel_engine_get_active_head()
972 acthd = ENGINE_READ(engine, ACTHD); in intel_engine_get_active_head()
977 u64 intel_engine_get_last_batch_head(const struct intel_engine_cs *engine) in intel_engine_get_last_batch_head() argument
981 if (INTEL_GEN(engine->i915) >= 8) in intel_engine_get_last_batch_head()
982 bbaddr = ENGINE_READ64(engine, RING_BBADDR, RING_BBADDR_UDW); in intel_engine_get_last_batch_head()
984 bbaddr = ENGINE_READ(engine, RING_BBADDR); in intel_engine_get_last_batch_head()
989 static unsigned long stop_timeout(const struct intel_engine_cs *engine) in stop_timeout() argument
996 * the engine to quiesce. We've stopped submission to the engine, and in stop_timeout()
998 * leave the engine idle. So they should not be caught unaware by in stop_timeout()
1001 return READ_ONCE(engine->props.stop_timeout_ms); in stop_timeout()
1004 int intel_engine_stop_cs(struct intel_engine_cs *engine) in intel_engine_stop_cs() argument
1006 struct intel_uncore *uncore = engine->uncore; in intel_engine_stop_cs()
1007 const u32 base = engine->mmio_base; in intel_engine_stop_cs()
1011 if (INTEL_GEN(engine->i915) < 3) in intel_engine_stop_cs()
1014 ENGINE_TRACE(engine, "\n"); in intel_engine_stop_cs()
1021 1000, stop_timeout(engine), in intel_engine_stop_cs()
1023 ENGINE_TRACE(engine, "timed out on STOP_RING -> IDLE\n"); in intel_engine_stop_cs()
1033 void intel_engine_cancel_stop_cs(struct intel_engine_cs *engine) in intel_engine_cancel_stop_cs() argument
1035 ENGINE_TRACE(engine, "\n"); in intel_engine_cancel_stop_cs()
1037 ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING)); in intel_engine_cancel_stop_cs()
1052 read_subslice_reg(const struct intel_engine_cs *engine, in read_subslice_reg() argument
1055 struct drm_i915_private *i915 = engine->i915; in read_subslice_reg()
1056 struct intel_uncore *uncore = engine->uncore; in read_subslice_reg()
1097 void intel_engine_get_instdone(const struct intel_engine_cs *engine, in intel_engine_get_instdone() argument
1100 struct drm_i915_private *i915 = engine->i915; in intel_engine_get_instdone()
1101 const struct sseu_dev_info *sseu = &engine->gt->info.sseu; in intel_engine_get_instdone()
1102 struct intel_uncore *uncore = engine->uncore; in intel_engine_get_instdone()
1103 u32 mmio_base = engine->mmio_base; in intel_engine_get_instdone()
1114 if (engine->id != RCS0) in intel_engine_get_instdone()
1127 read_subslice_reg(engine, slice, subslice, in intel_engine_get_instdone()
1130 read_subslice_reg(engine, slice, subslice, in intel_engine_get_instdone()
1138 if (engine->id != RCS0) in intel_engine_get_instdone()
1154 if (engine->id == RCS0) in intel_engine_get_instdone()
1166 static bool ring_is_idle(struct intel_engine_cs *engine) in ring_is_idle() argument
1170 if (I915_SELFTEST_ONLY(!engine->mmio_base)) in ring_is_idle()
1173 if (!intel_engine_pm_get_if_awake(engine)) in ring_is_idle()
1177 if ((ENGINE_READ(engine, RING_HEAD) & HEAD_ADDR) != in ring_is_idle()
1178 (ENGINE_READ(engine, RING_TAIL) & TAIL_ADDR)) in ring_is_idle()
1182 if (INTEL_GEN(engine->i915) > 2 && in ring_is_idle()
1183 !(ENGINE_READ(engine, RING_MI_MODE) & MODE_IDLE)) in ring_is_idle()
1186 intel_engine_pm_put(engine); in ring_is_idle()
1191 void intel_engine_flush_submission(struct intel_engine_cs *engine) in intel_engine_flush_submission() argument
1193 struct tasklet_struct *t = &engine->execlists.tasklet; in intel_engine_flush_submission()
1213 * intel_engine_is_idle() - Report if the engine has finished process all work
1214 * @engine: the intel_engine_cs
1217 * to hardware, and that the engine is idle.
1219 bool intel_engine_is_idle(struct intel_engine_cs *engine) in intel_engine_is_idle() argument
1222 if (intel_gt_is_wedged(engine->gt)) in intel_engine_is_idle()
1225 if (!intel_engine_pm_is_awake(engine)) in intel_engine_is_idle()
1229 if (execlists_active(&engine->execlists)) { in intel_engine_is_idle()
1230 synchronize_hardirq(engine->i915->drm.pdev->irq); in intel_engine_is_idle()
1232 intel_engine_flush_submission(engine); in intel_engine_is_idle()
1234 if (execlists_active(&engine->execlists)) in intel_engine_is_idle()
1239 if (!RB_EMPTY_ROOT(&engine->execlists.queue.rb_root)) in intel_engine_is_idle()
1243 return ring_is_idle(engine); in intel_engine_is_idle()
1248 struct intel_engine_cs *engine; in intel_engines_are_idle() local
1262 for_each_engine(engine, gt, id) { in intel_engines_are_idle()
1263 if (!intel_engine_is_idle(engine)) in intel_engines_are_idle()
1272 struct intel_engine_cs *engine; in intel_engines_reset_default_submission() local
1275 for_each_engine(engine, gt, id) in intel_engines_reset_default_submission()
1276 engine->set_default_submission(engine); in intel_engines_reset_default_submission()
1279 bool intel_engine_can_store_dword(struct intel_engine_cs *engine) in intel_engine_can_store_dword() argument
1281 switch (INTEL_GEN(engine->i915)) { in intel_engine_can_store_dword()
1286 return !(IS_I915G(engine->i915) || IS_I915GM(engine->i915)); in intel_engine_can_store_dword()
1288 return !IS_I965G(engine->i915); /* who knows! */ in intel_engine_can_store_dword()
1290 return engine->class != VIDEO_DECODE_CLASS; /* b0rked */ in intel_engine_can_store_dword()
1339 * Even though we are holding the engine->active.lock here, there in get_timeline()
1417 static void intel_engine_print_registers(struct intel_engine_cs *engine, in intel_engine_print_registers() argument
1420 struct drm_i915_private *dev_priv = engine->i915; in intel_engine_print_registers()
1421 struct intel_engine_execlists * const execlists = &engine->execlists; in intel_engine_print_registers()
1424 if (engine->id == RENDER_CLASS && IS_GEN_RANGE(dev_priv, 4, 7)) in intel_engine_print_registers()
1425 drm_printf(m, "\tCCID: 0x%08x\n", ENGINE_READ(engine, CCID)); in intel_engine_print_registers()
1428 ENGINE_READ(engine, RING_EXECLIST_STATUS_HI)); in intel_engine_print_registers()
1430 ENGINE_READ(engine, RING_EXECLIST_STATUS_LO)); in intel_engine_print_registers()
1433 ENGINE_READ(engine, RING_START)); in intel_engine_print_registers()
1435 ENGINE_READ(engine, RING_HEAD) & HEAD_ADDR); in intel_engine_print_registers()
1437 ENGINE_READ(engine, RING_TAIL) & TAIL_ADDR); in intel_engine_print_registers()
1439 ENGINE_READ(engine, RING_CTL), in intel_engine_print_registers()
1440 ENGINE_READ(engine, RING_CTL) & (RING_WAIT | RING_WAIT_SEMAPHORE) ? " [waiting]" : ""); in intel_engine_print_registers()
1441 if (INTEL_GEN(engine->i915) > 2) { in intel_engine_print_registers()
1443 ENGINE_READ(engine, RING_MI_MODE), in intel_engine_print_registers()
1444 ENGINE_READ(engine, RING_MI_MODE) & (MODE_IDLE) ? " [idle]" : ""); in intel_engine_print_registers()
1449 ENGINE_READ(engine, RING_IMR)); in intel_engine_print_registers()
1451 ENGINE_READ(engine, RING_ESR)); in intel_engine_print_registers()
1453 ENGINE_READ(engine, RING_EMR)); in intel_engine_print_registers()
1455 ENGINE_READ(engine, RING_EIR)); in intel_engine_print_registers()
1458 addr = intel_engine_get_active_head(engine); in intel_engine_print_registers()
1461 addr = intel_engine_get_last_batch_head(engine); in intel_engine_print_registers()
1465 addr = ENGINE_READ64(engine, RING_DMA_FADD, RING_DMA_FADD_UDW); in intel_engine_print_registers()
1467 addr = ENGINE_READ(engine, RING_DMA_FADD); in intel_engine_print_registers()
1469 addr = ENGINE_READ(engine, DMA_FADD_I8XX); in intel_engine_print_registers()
1474 ENGINE_READ(engine, RING_IPEIR)); in intel_engine_print_registers()
1476 ENGINE_READ(engine, RING_IPEHR)); in intel_engine_print_registers()
1478 drm_printf(m, "\tIPEIR: 0x%08x\n", ENGINE_READ(engine, IPEIR)); in intel_engine_print_registers()
1479 drm_printf(m, "\tIPEHR: 0x%08x\n", ENGINE_READ(engine, IPEHR)); in intel_engine_print_registers()
1485 &engine->status_page.addr[I915_HWS_CSB_BUF0_INDEX]; in intel_engine_print_registers()
1492 &engine->execlists.tasklet.state)), in intel_engine_print_registers()
1493 enableddisabled(!atomic_read(&engine->execlists.tasklet.count)), in intel_engine_print_registers()
1494 repr_timer(&engine->execlists.preempt), in intel_engine_print_registers()
1495 repr_timer(&engine->execlists.timer)); in intel_engine_print_registers()
1501 ENGINE_READ(engine, RING_EXECLIST_STATUS_LO), in intel_engine_print_registers()
1502 ENGINE_READ(engine, RING_EXECLIST_STATUS_HI), in intel_engine_print_registers()
1551 ENGINE_READ(engine, RING_PP_DIR_BASE)); in intel_engine_print_registers()
1553 ENGINE_READ(engine, RING_PP_DIR_BASE_READ)); in intel_engine_print_registers()
1555 ENGINE_READ(engine, RING_PP_DIR_DCLV)); in intel_engine_print_registers()
1603 void intel_engine_dump(struct intel_engine_cs *engine, in intel_engine_dump() argument
1607 struct i915_gpu_error * const error = &engine->i915->gpu_error; in intel_engine_dump()
1621 if (intel_gt_is_wedged(engine->gt)) in intel_engine_dump()
1624 drm_printf(m, "\tAwake? %d\n", atomic_read(&engine->wakeref.count)); in intel_engine_dump()
1626 yesno(!llist_empty(&engine->barrier_tasks))); in intel_engine_dump()
1628 ewma__engine_latency_read(&engine->latency)); in intel_engine_dump()
1629 if (intel_engine_supports_stats(engine)) in intel_engine_dump()
1631 ktime_to_ms(intel_engine_get_busy_time(engine, in intel_engine_dump()
1634 engine->fw_domain, atomic_read(&engine->fw_active)); in intel_engine_dump()
1637 rq = READ_ONCE(engine->heartbeat.systole); in intel_engine_dump()
1643 i915_reset_engine_count(error, engine), in intel_engine_dump()
1648 spin_lock_irqsave(&engine->active.lock, flags); in intel_engine_dump()
1649 rq = intel_engine_find_active_request(engine); in intel_engine_dump()
1679 drm_printf(m, "\tOn hold?: %lu\n", list_count(&engine->active.hold)); in intel_engine_dump()
1680 spin_unlock_irqrestore(&engine->active.lock, flags); in intel_engine_dump()
1682 drm_printf(m, "\tMMIO base: 0x%08x\n", engine->mmio_base); in intel_engine_dump()
1683 wakeref = intel_runtime_pm_get_if_in_use(engine->uncore->rpm); in intel_engine_dump()
1685 intel_engine_print_registers(engine, m); in intel_engine_dump()
1686 intel_runtime_pm_put(engine->uncore->rpm, wakeref); in intel_engine_dump()
1691 intel_execlists_show_requests(engine, m, print_request, 8); in intel_engine_dump()
1694 hexdump(m, engine->status_page.addr, PAGE_SIZE); in intel_engine_dump()
1696 drm_printf(m, "Idle? %s\n", yesno(intel_engine_is_idle(engine))); in intel_engine_dump()
1698 intel_engine_print_breadcrumbs(engine, m); in intel_engine_dump()
1701 static ktime_t __intel_engine_get_busy_time(struct intel_engine_cs *engine, in __intel_engine_get_busy_time() argument
1704 ktime_t total = engine->stats.total; in __intel_engine_get_busy_time()
1707 * If the engine is executing something at the moment in __intel_engine_get_busy_time()
1711 if (atomic_read(&engine->stats.active)) in __intel_engine_get_busy_time()
1712 total = ktime_add(total, ktime_sub(*now, engine->stats.start)); in __intel_engine_get_busy_time()
1718 * intel_engine_get_busy_time() - Return current accumulated engine busyness
1719 * @engine: engine to report on
1722 * Returns accumulated time @engine was busy since engine stats were enabled.
1724 ktime_t intel_engine_get_busy_time(struct intel_engine_cs *engine, ktime_t *now) in intel_engine_get_busy_time() argument
1730 seq = read_seqbegin(&engine->stats.lock); in intel_engine_get_busy_time()
1731 total = __intel_engine_get_busy_time(engine, now); in intel_engine_get_busy_time()
1732 } while (read_seqretry(&engine->stats.lock, seq)); in intel_engine_get_busy_time()
1739 u32 ring = ENGINE_READ(rq->engine, RING_START); in match_ring()
1745 intel_engine_find_active_request(struct intel_engine_cs *engine) in intel_engine_find_active_request() argument
1750 * We are called by the error capture, reset and to dump engine in intel_engine_find_active_request()
1756 * not need an engine->irq_seqno_barrier() before the seqno reads. in intel_engine_find_active_request()
1760 lockdep_assert_held(&engine->active.lock); in intel_engine_find_active_request()
1763 request = execlists_active(&engine->execlists); in intel_engine_find_active_request()
1778 list_for_each_entry(request, &engine->active.requests, sched.link) { in intel_engine_find_active_request()