Lines Matching +full:cs +full:- +full:1
1 // SPDX-License-Identifier: MIT
13 #define batch_advance(Y, CS) GEM_BUG_ON((Y)->end != (CS)) argument
53 bv->max_primitives = 280; in batch_get_defaults()
54 bv->max_urb_entries = MAX_URB_ENTRIES; in batch_get_defaults()
55 bv->surface_height = 16 * 16; in batch_get_defaults()
56 bv->surface_width = 32 * 2 * 16; in batch_get_defaults()
58 bv->max_primitives = 128; in batch_get_defaults()
59 bv->max_urb_entries = MAX_URB_ENTRIES / 2; in batch_get_defaults()
60 bv->surface_height = 16 * 8; in batch_get_defaults()
61 bv->surface_width = 32 * 16; in batch_get_defaults()
63 bv->cmd_size = bv->max_primitives * 4096; in batch_get_defaults()
64 bv->state_size = STATE_SIZE; in batch_get_defaults()
65 bv->state_start = bv->cmd_size; in batch_get_defaults()
66 bv->batch_size = bv->cmd_size + bv->state_size; in batch_get_defaults()
67 bv->scratch_size = bv->surface_height * bv->surface_width; in batch_get_defaults()
68 bv->max_size = bv->batch_size + bv->scratch_size; in batch_get_defaults()
75 bc->vma = vma; in batch_init()
76 bc->offset = offset; in batch_init()
77 bc->start = start + bc->offset / sizeof(*bc->start); in batch_init()
78 bc->end = bc->start; in batch_init()
79 bc->max_items = max_bytes / sizeof(*bc->start); in batch_init()
82 static u32 batch_offset(const struct batch_chunk *bc, u32 *cs) in batch_offset() argument
84 return (cs - bc->start) * sizeof(*bc->start) + bc->offset; in batch_offset()
89 return bc->vma->node.start; in batch_addr()
94 GEM_BUG_ON((bc->end - bc->start) >= bc->max_items); in batch_add()
95 *bc->end++ = d; in batch_add()
103 u32 *end = PTR_ALIGN(bc->end, align); in batch_alloc_items()
105 memset32(bc->end, 0, end - bc->end); in batch_alloc_items()
106 bc->end = end; in batch_alloc_items()
109 map = bc->end; in batch_alloc_items()
110 bc->end += items; in batch_alloc_items()
117 GEM_BUG_ON(!IS_ALIGNED(bytes, sizeof(*bc->start))); in batch_alloc_bytes()
118 return batch_alloc_items(bc, align, bytes / sizeof(*bc->start)); in batch_alloc_bytes()
126 u32 surface_h = bv->surface_height; in gen7_fill_surface_state()
127 u32 surface_w = bv->surface_width; in gen7_fill_surface_state()
128 u32 *cs = batch_alloc_items(state, 32, 8); in gen7_fill_surface_state() local
129 u32 offset = batch_offset(state, cs); in gen7_fill_surface_state()
131 #define SURFACE_2D 1 in gen7_fill_surface_state()
133 #define RENDER_CACHE_READ_WRITE 1 in gen7_fill_surface_state()
135 *cs++ = SURFACE_2D << 29 | in gen7_fill_surface_state()
139 *cs++ = batch_addr(state) + dst_offset; in gen7_fill_surface_state()
141 *cs++ = ((surface_h / 4 - 1) << 16) | (surface_w / 4 - 1); in gen7_fill_surface_state()
142 *cs++ = surface_w; in gen7_fill_surface_state()
143 *cs++ = 0; in gen7_fill_surface_state()
144 *cs++ = 0; in gen7_fill_surface_state()
145 *cs++ = 0; in gen7_fill_surface_state()
148 *cs++ = SHADER_CHANNELS(4, 5, 6, 7); in gen7_fill_surface_state()
149 batch_advance(state, cs); in gen7_fill_surface_state()
158 u32 surface_start = gen7_fill_surface_state(state, bv->batch_size, bv); in gen7_fill_binding_table()
159 u32 *cs = batch_alloc_items(state, 32, 8); in gen7_fill_binding_table() local
160 u32 offset = batch_offset(state, cs); in gen7_fill_binding_table()
162 *cs++ = surface_start - state->offset; in gen7_fill_binding_table()
163 *cs++ = 0; in gen7_fill_binding_table()
164 *cs++ = 0; in gen7_fill_binding_table()
165 *cs++ = 0; in gen7_fill_binding_table()
166 *cs++ = 0; in gen7_fill_binding_table()
167 *cs++ = 0; in gen7_fill_binding_table()
168 *cs++ = 0; in gen7_fill_binding_table()
169 *cs++ = 0; in gen7_fill_binding_table()
170 batch_advance(state, cs); in gen7_fill_binding_table()
192 gen7_fill_kernel_data(state, kernel->data, kernel->size); in gen7_fill_interface_descriptor()
194 u32 *cs = batch_alloc_items(state, 32, 8 * count); in gen7_fill_interface_descriptor() local
195 u32 offset = batch_offset(state, cs); in gen7_fill_interface_descriptor()
197 *cs++ = kernel_offset; in gen7_fill_interface_descriptor()
198 *cs++ = (1 << 7) | (1 << 13); in gen7_fill_interface_descriptor()
199 *cs++ = 0; in gen7_fill_interface_descriptor()
200 *cs++ = (binding_table - state->offset) | 1; in gen7_fill_interface_descriptor()
201 *cs++ = 0; in gen7_fill_interface_descriptor()
202 *cs++ = 0; in gen7_fill_interface_descriptor()
203 *cs++ = 0; in gen7_fill_interface_descriptor()
204 *cs++ = 0; in gen7_fill_interface_descriptor()
206 /* 1 - 63dummy idds */ in gen7_fill_interface_descriptor()
207 memset32(cs, 0x00, (count - 1) * 8); in gen7_fill_interface_descriptor()
208 batch_advance(state, cs + (count - 1) * 8); in gen7_fill_interface_descriptor()
217 u32 *cs = batch_alloc_items(batch, 0, 12); in gen7_emit_state_base_address() local
219 *cs++ = STATE_BASE_ADDRESS | (12 - 2); in gen7_emit_state_base_address()
221 *cs++ = batch_addr(batch) | BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address()
223 *cs++ = batch_addr(batch) | surface_state_base | BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address()
225 *cs++ = batch_addr(batch) | BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address()
227 *cs++ = batch_addr(batch) | BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address()
229 *cs++ = batch_addr(batch) | BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address()
232 *cs++ = 0; in gen7_emit_state_base_address()
233 *cs++ = BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address()
234 *cs++ = 0; in gen7_emit_state_base_address()
235 *cs++ = BASE_ADDRESS_MODIFY; in gen7_emit_state_base_address()
236 *cs++ = 0; in gen7_emit_state_base_address()
237 *cs++ = 0; in gen7_emit_state_base_address()
238 batch_advance(batch, cs); in gen7_emit_state_base_address()
247 u32 urb_entries = bv->max_urb_entries; in gen7_emit_vfe_state()
248 u32 threads = bv->max_primitives - 1; in gen7_emit_vfe_state()
249 u32 *cs = batch_alloc_items(batch, 32, 8); in gen7_emit_vfe_state() local
251 *cs++ = MEDIA_VFE_STATE | (8 - 2); in gen7_emit_vfe_state()
254 *cs++ = 0; in gen7_emit_vfe_state()
257 *cs++ = threads << 16 | urb_entries << 8 | mode << 2; in gen7_emit_vfe_state()
259 *cs++ = 0; in gen7_emit_vfe_state()
262 *cs++ = urb_size << 16 | curbe_size; in gen7_emit_vfe_state()
265 *cs++ = 0; in gen7_emit_vfe_state()
266 *cs++ = 0; in gen7_emit_vfe_state()
267 *cs++ = 0; in gen7_emit_vfe_state()
268 batch_advance(batch, cs); in gen7_emit_vfe_state()
276 u32 *cs = batch_alloc_items(batch, 8, 4); in gen7_emit_interface_descriptor_load() local
278 *cs++ = MEDIA_INTERFACE_DESCRIPTOR_LOAD | (4 - 2); in gen7_emit_interface_descriptor_load()
279 *cs++ = 0; in gen7_emit_interface_descriptor_load()
280 *cs++ = count * 8 * sizeof(*cs); in gen7_emit_interface_descriptor_load()
283 * interface descriptor address - it is relative to the dynamics base in gen7_emit_interface_descriptor_load()
286 *cs++ = interface_descriptor; in gen7_emit_interface_descriptor_load()
287 batch_advance(batch, cs); in gen7_emit_interface_descriptor_load()
299 u32 *cs; in gen7_emit_media_object() local
304 cs = batch_alloc_items(batch, 8, media_batch_size); in gen7_emit_media_object()
306 *cs++ = MEDIA_OBJECT | (media_batch_size - 2); in gen7_emit_media_object()
309 *cs++ = 0; in gen7_emit_media_object()
312 *cs++ = 0; in gen7_emit_media_object()
313 *cs++ = 0; in gen7_emit_media_object()
316 *cs++ = 0; in gen7_emit_media_object()
317 *cs++ = 0; in gen7_emit_media_object()
320 *cs++ = (y_offset << 16) | (x_offset); in gen7_emit_media_object()
321 *cs++ = 0; in gen7_emit_media_object()
322 *cs++ = GT3_INLINE_DATA_DELAYS; in gen7_emit_media_object()
324 *cs++ = 0; in gen7_emit_media_object()
326 batch_advance(batch, cs); in gen7_emit_media_object()
331 u32 *cs = batch_alloc_items(batch, 0, 5); in gen7_emit_pipeline_flush() local
333 *cs++ = GFX_OP_PIPE_CONTROL(5); in gen7_emit_pipeline_flush()
334 *cs++ = PIPE_CONTROL_STATE_CACHE_INVALIDATE | in gen7_emit_pipeline_flush()
336 *cs++ = 0; in gen7_emit_pipeline_flush()
337 *cs++ = 0; in gen7_emit_pipeline_flush()
338 *cs++ = 0; in gen7_emit_pipeline_flush()
339 batch_advance(batch, cs); in gen7_emit_pipeline_flush()
346 struct drm_i915_private *i915 = vma->vm->i915; in emit_batch()
353 batch_init(&cmds, vma, start, 0, bv->cmd_size); in emit_batch()
354 batch_init(&state, vma, start, bv->state_start, bv->state_size); in emit_batch()
368 gen7_emit_vfe_state(&cmds, bv, urb_size - 1, 0, 0); in emit_batch()
374 for (i = 0; i < bv->max_primitives; i++) in emit_batch()
386 batch_get_defaults(engine->i915, &bv); in gen7_setup_clear_gpr_bb()
390 GEM_BUG_ON(vma->obj->base.size < bv.max_size); in gen7_setup_clear_gpr_bb()
392 batch = i915_gem_object_pin_map(vma->obj, I915_MAP_WC); in gen7_setup_clear_gpr_bb()
398 i915_gem_object_flush_map(vma->obj); in gen7_setup_clear_gpr_bb()
399 __i915_gem_object_release_map(vma->obj); in gen7_setup_clear_gpr_bb()