Lines Matching +full:panel +full:- +full:dpi
36 #include "tc35876x-dsi-lvds.h"
91 DRM_ERROR("MIPI: DPI FIFO was never cleared\n"); in mdfld_wait_for_DPI_CTRL_FIFO()
123 struct drm_psb_private *dev_priv = dev->dev_private; in dsi_set_pipe_plane_enable_state()
127 u32 dspcntr = dev_priv->dspcntr[pipe]; in dsi_set_pipe_plane_enable_state()
141 dev_err(&dev->pdev->dev, "%s: Pipe enable timeout\n", in dsi_set_pipe_plane_enable_state()
168 dev_err(&dev->pdev->dev, "%s: Pipe disable timeout\n", in dsi_set_pipe_plane_enable_state()
172 dev_err(&dev->pdev->dev, "%s: FIFO not empty\n", in dsi_set_pipe_plane_enable_state()
184 struct drm_device *dev = dsi_config->dev; in mdfld_dsi_configure_down()
185 struct drm_psb_private *dev_priv = dev->dev_private; in mdfld_dsi_configure_down()
187 if (!dev_priv->dpi_panel_on[pipe]) { in mdfld_dsi_configure_down()
188 dev_err(dev->dev, "DPI panel is already off\n"); in mdfld_dsi_configure_down()
205 struct drm_device *dev = dsi_config->dev; in mdfld_dsi_configure_up()
206 struct drm_psb_private *dev_priv = dev->dev_private; in mdfld_dsi_configure_up()
208 if (dev_priv->dpi_panel_on[pipe]) { in mdfld_dsi_configure_up()
209 dev_err(dev->dev, "DPI panel is already on\n"); in mdfld_dsi_configure_up()
235 struct drm_device *dev = dsi_config->dev; in mdfld_dsi_tpo_ic_init()
236 u32 dcsChannelNumber = dsi_config->channel_num; in mdfld_dsi_tpo_ic_init()
427 * Calculate the dpi time basing on a given drm mode @mode
439 pclk_hactive = mode->hdisplay; in mdfld_dsi_dpi_timing_calculation()
440 pclk_hfp = mode->hsync_start - mode->hdisplay; in mdfld_dsi_dpi_timing_calculation()
441 pclk_hsync = mode->hsync_end - mode->hsync_start; in mdfld_dsi_dpi_timing_calculation()
442 pclk_hbp = mode->htotal - mode->hsync_end; in mdfld_dsi_dpi_timing_calculation()
444 pclk_vfp = mode->vsync_start - mode->vdisplay; in mdfld_dsi_dpi_timing_calculation()
445 pclk_vsync = mode->vsync_end - mode->vsync_start; in mdfld_dsi_dpi_timing_calculation()
446 pclk_vbp = mode->vtotal - mode->vsync_end; in mdfld_dsi_dpi_timing_calculation()
452 dpi_timing->hsync_count = mdfld_dsi_dpi_to_byte_clock_count( in mdfld_dsi_dpi_timing_calculation()
454 dpi_timing->hbp_count = mdfld_dsi_dpi_to_byte_clock_count( in mdfld_dsi_dpi_timing_calculation()
456 dpi_timing->hfp_count = mdfld_dsi_dpi_to_byte_clock_count( in mdfld_dsi_dpi_timing_calculation()
458 dpi_timing->hactive_count = mdfld_dsi_dpi_to_byte_clock_count( in mdfld_dsi_dpi_timing_calculation()
460 dpi_timing->vsync_count = mdfld_dsi_dpi_to_byte_clock_count( in mdfld_dsi_dpi_timing_calculation()
462 dpi_timing->vbp_count = mdfld_dsi_dpi_to_byte_clock_count( in mdfld_dsi_dpi_timing_calculation()
464 dpi_timing->vfp_count = mdfld_dsi_dpi_to_byte_clock_count( in mdfld_dsi_dpi_timing_calculation()
473 struct drm_device *dev = dsi_config->dev; in mdfld_dsi_dpi_controller_init()
474 int lane_count = dsi_config->lane_count; in mdfld_dsi_dpi_controller_init()
476 struct drm_display_mode *mode = dsi_config->mode; in mdfld_dsi_dpi_controller_init()
479 /*un-ready device*/ in mdfld_dsi_dpi_controller_init()
490 val |= dsi_config->channel_num << DSI_DPI_VIRT_CHANNEL_OFFSET; in mdfld_dsi_dpi_controller_init()
492 switch (dsi_config->bpp) { in mdfld_dsi_dpi_controller_init()
504 dsi_config->bpp); in mdfld_dsi_dpi_controller_init()
509 (mode->vtotal * mode->htotal * dsi_config->bpp / in mdfld_dsi_dpi_controller_init()
523 mode->vdisplay << 16 | mode->hdisplay); in mdfld_dsi_dpi_controller_init()
525 /*set DPI timing registers*/ in mdfld_dsi_dpi_controller_init()
527 dsi_config->lane_count, dsi_config->bpp); in mdfld_dsi_dpi_controller_init()
550 val = dsi_config->video_mode | DSI_DPI_COMPLETE_LAST_LINE; in mdfld_dsi_dpi_controller_init()
574 struct drm_device *dev = output->dev; in mdfld_dsi_dpi_turn_on()
591 output->panel_on = 1; in mdfld_dsi_dpi_turn_on()
594 for TMD panel in mdfld_dsi_dpi_turn_on()
596 dev_priv->dpi_panel_on2 = true; in mdfld_dsi_dpi_turn_on()
598 dev_priv->dpi_panel_on = true; */ in mdfld_dsi_dpi_turn_on()
604 struct drm_device *dev = output->dev; in mdfld_dsi_dpi_shut_down()
607 if ((!output->panel_on) || output->first_boot) { in mdfld_dsi_dpi_shut_down()
608 output->first_boot = 0; in mdfld_dsi_dpi_shut_down()
612 /* Wait for dpi fifo to empty */ in mdfld_dsi_dpi_shut_down()
626 output->panel_on = 0; in mdfld_dsi_dpi_shut_down()
627 output->first_boot = 0; in mdfld_dsi_dpi_shut_down()
630 for TMD panel in mdfld_dsi_dpi_shut_down()
632 dev_priv->dpi_panel_on2 = false; in mdfld_dsi_dpi_shut_down()
634 dev_priv->dpi_panel_on = false; */ in mdfld_dsi_dpi_shut_down()
645 struct drm_device *dev = dsi_config->dev; in mdfld_dsi_dpi_set_power()
646 struct drm_psb_private *dev_priv = dev->dev_private; in mdfld_dsi_dpi_set_power()
666 dev_priv->dpi_panel_on[pipe] = true; in mdfld_dsi_dpi_set_power()
680 dev_priv->dpi_panel_on[pipe] = false; in mdfld_dsi_dpi_set_power()
697 struct drm_display_mode *fixed_mode = dsi_config->fixed_mode; in mdfld_dsi_dpi_mode_fixup()
700 adjusted_mode->hdisplay = fixed_mode->hdisplay; in mdfld_dsi_dpi_mode_fixup()
701 adjusted_mode->hsync_start = fixed_mode->hsync_start; in mdfld_dsi_dpi_mode_fixup()
702 adjusted_mode->hsync_end = fixed_mode->hsync_end; in mdfld_dsi_dpi_mode_fixup()
703 adjusted_mode->htotal = fixed_mode->htotal; in mdfld_dsi_dpi_mode_fixup()
704 adjusted_mode->vdisplay = fixed_mode->vdisplay; in mdfld_dsi_dpi_mode_fixup()
705 adjusted_mode->vsync_start = fixed_mode->vsync_start; in mdfld_dsi_dpi_mode_fixup()
706 adjusted_mode->vsync_end = fixed_mode->vsync_end; in mdfld_dsi_dpi_mode_fixup()
707 adjusted_mode->vtotal = fixed_mode->vtotal; in mdfld_dsi_dpi_mode_fixup()
708 adjusted_mode->clock = fixed_mode->clock; in mdfld_dsi_dpi_mode_fixup()
729 struct drm_device *dev = dsi_config->dev; in mipi_set_properties()
748 struct drm_device *dev = dsi_config->dev; in mdfld_mipi_set_video_timing()
750 struct drm_display_mode *mode = dsi_config->mode; in mdfld_mipi_set_video_timing()
753 dsi_config->lane_count, in mdfld_mipi_set_video_timing()
754 dsi_config->bpp); in mdfld_mipi_set_video_timing()
757 mode->vdisplay << 16 | mode->hdisplay); in mdfld_mipi_set_video_timing()
776 struct drm_device *dev = dsi_config->dev; in mdfld_mipi_config()
777 int lane_count = dsi_config->lane_count; in mdfld_mipi_config()
798 struct drm_device *dev = dsi_config->dev; in mdfld_set_pipe_timing()
799 struct drm_display_mode *mode = dsi_config->mode; in mdfld_set_pipe_timing()
801 REG_WRITE(HTOTAL_A, ((mode->htotal - 1) << 16) | (mode->hdisplay - 1)); in mdfld_set_pipe_timing()
802 REG_WRITE(HBLANK_A, ((mode->htotal - 1) << 16) | (mode->hdisplay - 1)); in mdfld_set_pipe_timing()
804 ((mode->hsync_end - 1) << 16) | (mode->hsync_start - 1)); in mdfld_set_pipe_timing()
806 REG_WRITE(VTOTAL_A, ((mode->vtotal - 1) << 16) | (mode->vdisplay - 1)); in mdfld_set_pipe_timing()
807 REG_WRITE(VBLANK_A, ((mode->vtotal - 1) << 16) | (mode->vdisplay - 1)); in mdfld_set_pipe_timing()
809 ((mode->vsync_end - 1) << 16) | (mode->vsync_start - 1)); in mdfld_set_pipe_timing()
812 ((mode->hdisplay - 1) << 16) | (mode->vdisplay - 1)); in mdfld_set_pipe_timing()
825 struct drm_device *dev = dsi_config->dev; in mdfld_dsi_dpi_mode_set()
826 struct drm_psb_private *dev_priv = dev->dev_private; in mdfld_dsi_dpi_mode_set()
837 pipeconf = dev_priv->pipeconf[pipe]; in mdfld_dsi_dpi_mode_set()
838 dspcntr = dev_priv->dspcntr[pipe]; in mdfld_dsi_dpi_mode_set()
870 dev_err(&dev->pdev->dev, "%s: DSI PLL lock timeout\n", in mdfld_dsi_dpi_mode_set()
881 ((mode->vdisplay - 1) << 16) | (mode->hdisplay - 1)); in mdfld_dsi_dpi_mode_set()
899 /* set up DSI controller DPI interface */ in mdfld_dsi_dpi_mode_set()
902 /* Configure MIPI Bridge and Panel */ in mdfld_dsi_dpi_mode_set()
904 dev_priv->dpi_panel_on[pipe] = true; in mdfld_dsi_dpi_mode_set()
906 /*turn on DPI interface*/ in mdfld_dsi_dpi_mode_set()
935 * Init DSI DPI encoder.
937 * return pointer of newly allocated DPI encoder, NULL on error
951 pipe = dsi_connector->pipe; in mdfld_dsi_dpi_init()
956 /* panel hard-reset */ in mdfld_dsi_dpi_init()
957 if (p_funcs->reset) { in mdfld_dsi_dpi_init()
958 ret = p_funcs->reset(dev, pipe); in mdfld_dsi_dpi_init()
960 DRM_ERROR("Panel %d hard-reset failed\n", pipe); in mdfld_dsi_dpi_init()
965 /* panel drvIC init */ in mdfld_dsi_dpi_init()
966 if (p_funcs->drv_ic_init) in mdfld_dsi_dpi_init()
967 p_funcs->drv_ic_init(dsi_config, pipe); in mdfld_dsi_dpi_init()
969 /* panel power mode detect */ in mdfld_dsi_dpi_init()
972 DRM_ERROR("Panel %d get power mode failed\n", pipe); in mdfld_dsi_dpi_init()
973 dsi_connector->status = connector_status_disconnected; in mdfld_dsi_dpi_init()
976 dsi_connector->status = connector_status_connected; in mdfld_dsi_dpi_init()
986 dpi_output->panel_on = 0; in mdfld_dsi_dpi_init()
987 dpi_output->dev = dev; in mdfld_dsi_dpi_init()
989 dpi_output->p_funcs = p_funcs; in mdfld_dsi_dpi_init()
990 dpi_output->first_boot = 1; in mdfld_dsi_dpi_init()
996 connector = &dsi_connector->base.base; in mdfld_dsi_dpi_init()
997 encoder = &dpi_output->base.base.base; in mdfld_dsi_dpi_init()
1000 p_funcs->encoder_helper_funcs); in mdfld_dsi_dpi_init()
1006 if (dsi_connector->pipe) { in mdfld_dsi_dpi_init()
1007 encoder->possible_crtcs = (1 << 2); in mdfld_dsi_dpi_init()
1008 encoder->possible_clones = 0; in mdfld_dsi_dpi_init()
1010 encoder->possible_crtcs = (1 << 0); in mdfld_dsi_dpi_init()
1011 encoder->possible_clones = 0; in mdfld_dsi_dpi_init()
1014 dsi_connector->base.encoder = &dpi_output->base.base; in mdfld_dsi_dpi_init()
1016 return &dpi_output->base; in mdfld_dsi_dpi_init()