Lines Matching +full:phy +full:- +full:dsi +full:- +full:supply
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Samsung SoC MIPI DSI Master driver.
18 #include <linux/phy/phy.h>
104 #define DSIM_MAIN_VRESOL(x, num_bits) (((x) & ((1 << (num_bits)) - 1)) << 16)
105 #define DSIM_MAIN_HRESOL(x, num_bits) (((x) & ((1 << (num_bits)) - 1)) << 0)
264 struct phy *phy; member
321 static inline void exynos_dsi_write(struct exynos_dsi *dsi, enum reg_idx idx, in exynos_dsi_write() argument
325 writel(val, dsi->reg_base + dsi->driver_data->reg_ofs[idx]); in exynos_dsi_write()
328 static inline u32 exynos_dsi_read(struct exynos_dsi *dsi, enum reg_idx idx) in exynos_dsi_read() argument
330 return readl(dsi->reg_base + dsi->driver_data->reg_ofs[idx]); in exynos_dsi_read()
510 { .compatible = "samsung,exynos3250-mipi-dsi",
512 { .compatible = "samsung,exynos4210-mipi-dsi",
514 { .compatible = "samsung,exynos5410-mipi-dsi",
516 { .compatible = "samsung,exynos5422-mipi-dsi",
518 { .compatible = "samsung,exynos5433-mipi-dsi",
523 static void exynos_dsi_wait_for_reset(struct exynos_dsi *dsi) in exynos_dsi_wait_for_reset() argument
525 if (wait_for_completion_timeout(&dsi->completed, msecs_to_jiffies(300))) in exynos_dsi_wait_for_reset()
528 dev_err(dsi->dev, "timeout waiting for reset\n"); in exynos_dsi_wait_for_reset()
531 static void exynos_dsi_reset(struct exynos_dsi *dsi) in exynos_dsi_reset() argument
533 u32 reset_val = dsi->driver_data->reg_values[RESET_TYPE]; in exynos_dsi_reset()
535 reinit_completion(&dsi->completed); in exynos_dsi_reset()
536 exynos_dsi_write(dsi, DSIM_SWRST_REG, reset_val); in exynos_dsi_reset()
543 static unsigned long exynos_dsi_pll_find_pms(struct exynos_dsi *dsi, in exynos_dsi_pll_find_pms() argument
546 const struct exynos_dsi_driver_data *driver_data = dsi->driver_data; in exynos_dsi_pll_find_pms()
571 tmp > driver_data->max_freq * MHZ) in exynos_dsi_pll_find_pms()
577 delta = abs(fout - tmp); in exynos_dsi_pll_find_pms()
597 static unsigned long exynos_dsi_set_pll(struct exynos_dsi *dsi, in exynos_dsi_set_pll() argument
600 const struct exynos_dsi_driver_data *driver_data = dsi->driver_data; in exynos_dsi_set_pll()
607 fin = dsi->pll_clk_rate; in exynos_dsi_set_pll()
608 fout = exynos_dsi_pll_find_pms(dsi, fin, freq, &p, &m, &s); in exynos_dsi_set_pll()
610 dev_err(dsi->dev, in exynos_dsi_set_pll()
614 dev_dbg(dsi->dev, "PLL freq %lu, (p %d, m %d, s %d)\n", fout, p, m, s); in exynos_dsi_set_pll()
616 writel(driver_data->reg_values[PLL_TIMER], in exynos_dsi_set_pll()
617 dsi->reg_base + driver_data->plltmr_reg); in exynos_dsi_set_pll()
621 if (driver_data->has_freqband) { in exynos_dsi_set_pll()
634 dev_dbg(dsi->dev, "band %d\n", band); in exynos_dsi_set_pll()
639 exynos_dsi_write(dsi, DSIM_PLLCTRL_REG, reg); in exynos_dsi_set_pll()
643 if (timeout-- == 0) { in exynos_dsi_set_pll()
644 dev_err(dsi->dev, "PLL failed to stabilize\n"); in exynos_dsi_set_pll()
647 reg = exynos_dsi_read(dsi, DSIM_STATUS_REG); in exynos_dsi_set_pll()
653 static int exynos_dsi_enable_clock(struct exynos_dsi *dsi) in exynos_dsi_enable_clock() argument
659 hs_clk = exynos_dsi_set_pll(dsi, dsi->burst_clk_rate); in exynos_dsi_enable_clock()
661 dev_err(dsi->dev, "failed to configure DSI PLL\n"); in exynos_dsi_enable_clock()
662 return -EFAULT; in exynos_dsi_enable_clock()
666 esc_div = DIV_ROUND_UP(byte_clk, dsi->esc_clk_rate); in exynos_dsi_enable_clock()
674 dev_dbg(dsi->dev, "hs_clk = %lu, byte_clk = %lu, esc_clk = %lu\n", in exynos_dsi_enable_clock()
677 reg = exynos_dsi_read(dsi, DSIM_CLKCTRL_REG); in exynos_dsi_enable_clock()
684 | DSIM_LANE_ESC_CLK_EN_DATA(BIT(dsi->lanes) - 1) in exynos_dsi_enable_clock()
687 exynos_dsi_write(dsi, DSIM_CLKCTRL_REG, reg); in exynos_dsi_enable_clock()
692 static void exynos_dsi_set_phy_ctrl(struct exynos_dsi *dsi) in exynos_dsi_set_phy_ctrl() argument
694 const struct exynos_dsi_driver_data *driver_data = dsi->driver_data; in exynos_dsi_set_phy_ctrl()
695 const unsigned int *reg_values = driver_data->reg_values; in exynos_dsi_set_phy_ctrl()
698 if (driver_data->has_freqband) in exynos_dsi_set_phy_ctrl()
701 /* B D-PHY: D-PHY Master & Slave Analog Block control */ in exynos_dsi_set_phy_ctrl()
704 exynos_dsi_write(dsi, DSIM_PHYCTRL_REG, reg); in exynos_dsi_set_phy_ctrl()
707 * T LPX: Transmitted length of any Low-Power state period in exynos_dsi_set_phy_ctrl()
708 * T HS-EXIT: Time that the transmitter drives LP-11 following a HS in exynos_dsi_set_phy_ctrl()
712 exynos_dsi_write(dsi, DSIM_PHYTIMING_REG, reg); in exynos_dsi_set_phy_ctrl()
715 * T CLK-PREPARE: Time that the transmitter drives the Clock Lane LP-00 in exynos_dsi_set_phy_ctrl()
716 * Line state immediately before the HS-0 Line state starting the in exynos_dsi_set_phy_ctrl()
718 * T CLK-ZERO: Time that the transmitter drives the HS-0 state prior to in exynos_dsi_set_phy_ctrl()
722 * Interval is defined as the period from the end of T HS-TRAIL to in exynos_dsi_set_phy_ctrl()
723 * the beginning of T CLK-TRAIL in exynos_dsi_set_phy_ctrl()
724 * T CLK-TRAIL: Time that the transmitter drives the HS-0 state after in exynos_dsi_set_phy_ctrl()
732 exynos_dsi_write(dsi, DSIM_PHYTIMING1_REG, reg); in exynos_dsi_set_phy_ctrl()
735 * T HS-PREPARE: Time that the transmitter drives the Data Lane LP-00 in exynos_dsi_set_phy_ctrl()
736 * Line state immediately before the HS-0 Line state starting the in exynos_dsi_set_phy_ctrl()
738 * T HS-ZERO: Time that the transmitter drives the HS-0 state prior to in exynos_dsi_set_phy_ctrl()
740 * T HS-TRAIL: Time that the transmitter drives the flipped differential in exynos_dsi_set_phy_ctrl()
745 exynos_dsi_write(dsi, DSIM_PHYTIMING2_REG, reg); in exynos_dsi_set_phy_ctrl()
748 static void exynos_dsi_disable_clock(struct exynos_dsi *dsi) in exynos_dsi_disable_clock() argument
752 reg = exynos_dsi_read(dsi, DSIM_CLKCTRL_REG); in exynos_dsi_disable_clock()
755 exynos_dsi_write(dsi, DSIM_CLKCTRL_REG, reg); in exynos_dsi_disable_clock()
757 reg = exynos_dsi_read(dsi, DSIM_PLLCTRL_REG); in exynos_dsi_disable_clock()
759 exynos_dsi_write(dsi, DSIM_PLLCTRL_REG, reg); in exynos_dsi_disable_clock()
762 static void exynos_dsi_enable_lane(struct exynos_dsi *dsi, u32 lane) in exynos_dsi_enable_lane() argument
764 u32 reg = exynos_dsi_read(dsi, DSIM_CONFIG_REG); in exynos_dsi_enable_lane()
765 reg |= (DSIM_NUM_OF_DATA_LANE(dsi->lanes - 1) | DSIM_LANE_EN_CLK | in exynos_dsi_enable_lane()
767 exynos_dsi_write(dsi, DSIM_CONFIG_REG, reg); in exynos_dsi_enable_lane()
770 static int exynos_dsi_init_link(struct exynos_dsi *dsi) in exynos_dsi_init_link() argument
772 const struct exynos_dsi_driver_data *driver_data = dsi->driver_data; in exynos_dsi_init_link()
778 reg = exynos_dsi_read(dsi, DSIM_FIFOCTRL_REG); in exynos_dsi_init_link()
780 exynos_dsi_write(dsi, DSIM_FIFOCTRL_REG, reg); in exynos_dsi_init_link()
785 exynos_dsi_write(dsi, DSIM_FIFOCTRL_REG, reg); in exynos_dsi_init_link()
788 /* DSI configuration */ in exynos_dsi_init_link()
793 * If this bit is set[= MIPI_DSI_MODE_VIDEO], dsi will support video in exynos_dsi_init_link()
796 if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO) { in exynos_dsi_init_link()
803 if (!(dsi->mode_flags & MIPI_DSI_MODE_VSYNC_FLUSH)) in exynos_dsi_init_link()
805 if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) in exynos_dsi_init_link()
807 if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) in exynos_dsi_init_link()
809 if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_AUTO_VERT) in exynos_dsi_init_link()
811 if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HSE) in exynos_dsi_init_link()
813 if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HFP)) in exynos_dsi_init_link()
815 if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HBP)) in exynos_dsi_init_link()
817 if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HSA)) in exynos_dsi_init_link()
821 if (!(dsi->mode_flags & MIPI_DSI_MODE_EOT_PACKET)) in exynos_dsi_init_link()
824 switch (dsi->format) { in exynos_dsi_init_link()
838 dev_err(dsi->dev, "invalid pixel format\n"); in exynos_dsi_init_link()
839 return -EINVAL; in exynos_dsi_init_link()
843 * Use non-continuous clock mode if the periparal wants and in exynos_dsi_init_link()
846 * In non-continous clock mode, host controller will turn off in exynos_dsi_init_link()
847 * the HS clock between high-speed transmissions to reduce in exynos_dsi_init_link()
850 if (driver_data->has_clklane_stop && in exynos_dsi_init_link()
851 dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) { in exynos_dsi_init_link()
854 exynos_dsi_write(dsi, DSIM_CONFIG_REG, reg); in exynos_dsi_init_link()
856 lanes_mask = BIT(dsi->lanes) - 1; in exynos_dsi_init_link()
857 exynos_dsi_enable_lane(dsi, lanes_mask); in exynos_dsi_init_link()
862 if (timeout-- == 0) { in exynos_dsi_init_link()
863 dev_err(dsi->dev, "waiting for bus lanes timed out\n"); in exynos_dsi_init_link()
864 return -EFAULT; in exynos_dsi_init_link()
867 reg = exynos_dsi_read(dsi, DSIM_STATUS_REG); in exynos_dsi_init_link()
873 reg = exynos_dsi_read(dsi, DSIM_ESCMODE_REG); in exynos_dsi_init_link()
875 reg |= DSIM_STOP_STATE_CNT(driver_data->reg_values[STOP_STATE_CNT]); in exynos_dsi_init_link()
876 exynos_dsi_write(dsi, DSIM_ESCMODE_REG, reg); in exynos_dsi_init_link()
879 exynos_dsi_write(dsi, DSIM_TIMEOUT_REG, reg); in exynos_dsi_init_link()
884 static void exynos_dsi_set_display_mode(struct exynos_dsi *dsi) in exynos_dsi_set_display_mode() argument
886 struct drm_display_mode *m = &dsi->encoder.crtc->state->adjusted_mode; in exynos_dsi_set_display_mode()
887 unsigned int num_bits_resol = dsi->driver_data->num_bits_resol; in exynos_dsi_set_display_mode()
890 if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO) { in exynos_dsi_set_display_mode()
892 | DSIM_STABLE_VFP(m->vsync_start - m->vdisplay) in exynos_dsi_set_display_mode()
893 | DSIM_MAIN_VBP(m->vtotal - m->vsync_end); in exynos_dsi_set_display_mode()
894 exynos_dsi_write(dsi, DSIM_MVPORCH_REG, reg); in exynos_dsi_set_display_mode()
896 reg = DSIM_MAIN_HFP(m->hsync_start - m->hdisplay) in exynos_dsi_set_display_mode()
897 | DSIM_MAIN_HBP(m->htotal - m->hsync_end); in exynos_dsi_set_display_mode()
898 exynos_dsi_write(dsi, DSIM_MHPORCH_REG, reg); in exynos_dsi_set_display_mode()
900 reg = DSIM_MAIN_VSA(m->vsync_end - m->vsync_start) in exynos_dsi_set_display_mode()
901 | DSIM_MAIN_HSA(m->hsync_end - m->hsync_start); in exynos_dsi_set_display_mode()
902 exynos_dsi_write(dsi, DSIM_MSYNC_REG, reg); in exynos_dsi_set_display_mode()
904 reg = DSIM_MAIN_HRESOL(m->hdisplay, num_bits_resol) | in exynos_dsi_set_display_mode()
905 DSIM_MAIN_VRESOL(m->vdisplay, num_bits_resol); in exynos_dsi_set_display_mode()
907 exynos_dsi_write(dsi, DSIM_MDRESOL_REG, reg); in exynos_dsi_set_display_mode()
909 dev_dbg(dsi->dev, "LCD size = %dx%d\n", m->hdisplay, m->vdisplay); in exynos_dsi_set_display_mode()
912 static void exynos_dsi_set_display_enable(struct exynos_dsi *dsi, bool enable) in exynos_dsi_set_display_enable() argument
916 reg = exynos_dsi_read(dsi, DSIM_MDRESOL_REG); in exynos_dsi_set_display_enable()
921 exynos_dsi_write(dsi, DSIM_MDRESOL_REG, reg); in exynos_dsi_set_display_enable()
924 static int exynos_dsi_wait_for_hdr_fifo(struct exynos_dsi *dsi) in exynos_dsi_wait_for_hdr_fifo() argument
929 u32 reg = exynos_dsi_read(dsi, DSIM_FIFOCTRL_REG); in exynos_dsi_wait_for_hdr_fifo()
936 } while (--timeout); in exynos_dsi_wait_for_hdr_fifo()
938 return -ETIMEDOUT; in exynos_dsi_wait_for_hdr_fifo()
941 static void exynos_dsi_set_cmd_lpm(struct exynos_dsi *dsi, bool lpm) in exynos_dsi_set_cmd_lpm() argument
943 u32 v = exynos_dsi_read(dsi, DSIM_ESCMODE_REG); in exynos_dsi_set_cmd_lpm()
950 exynos_dsi_write(dsi, DSIM_ESCMODE_REG, v); in exynos_dsi_set_cmd_lpm()
953 static void exynos_dsi_force_bta(struct exynos_dsi *dsi) in exynos_dsi_force_bta() argument
955 u32 v = exynos_dsi_read(dsi, DSIM_ESCMODE_REG); in exynos_dsi_force_bta()
957 exynos_dsi_write(dsi, DSIM_ESCMODE_REG, v); in exynos_dsi_force_bta()
960 static void exynos_dsi_send_to_fifo(struct exynos_dsi *dsi, in exynos_dsi_send_to_fifo() argument
963 struct device *dev = dsi->dev; in exynos_dsi_send_to_fifo()
964 struct mipi_dsi_packet *pkt = &xfer->packet; in exynos_dsi_send_to_fifo()
965 const u8 *payload = pkt->payload + xfer->tx_done; in exynos_dsi_send_to_fifo()
966 u16 length = pkt->payload_length - xfer->tx_done; in exynos_dsi_send_to_fifo()
967 bool first = !xfer->tx_done; in exynos_dsi_send_to_fifo()
971 xfer, length, xfer->tx_done, xfer->rx_len, xfer->rx_done); in exynos_dsi_send_to_fifo()
976 xfer->tx_done += length; in exynos_dsi_send_to_fifo()
981 exynos_dsi_write(dsi, DSIM_PAYLOAD_REG, reg); in exynos_dsi_send_to_fifo()
983 length -= 4; in exynos_dsi_send_to_fifo()
996 exynos_dsi_write(dsi, DSIM_PAYLOAD_REG, reg); in exynos_dsi_send_to_fifo()
1004 reg = get_unaligned_le32(pkt->header); in exynos_dsi_send_to_fifo()
1005 if (exynos_dsi_wait_for_hdr_fifo(dsi)) { in exynos_dsi_send_to_fifo()
1010 if (NEQV(xfer->flags & MIPI_DSI_MSG_USE_LPM, in exynos_dsi_send_to_fifo()
1011 dsi->state & DSIM_STATE_CMD_LPM)) { in exynos_dsi_send_to_fifo()
1012 exynos_dsi_set_cmd_lpm(dsi, xfer->flags & MIPI_DSI_MSG_USE_LPM); in exynos_dsi_send_to_fifo()
1013 dsi->state ^= DSIM_STATE_CMD_LPM; in exynos_dsi_send_to_fifo()
1016 exynos_dsi_write(dsi, DSIM_PKTHDR_REG, reg); in exynos_dsi_send_to_fifo()
1018 if (xfer->flags & MIPI_DSI_MSG_REQ_ACK) in exynos_dsi_send_to_fifo()
1019 exynos_dsi_force_bta(dsi); in exynos_dsi_send_to_fifo()
1022 static void exynos_dsi_read_from_fifo(struct exynos_dsi *dsi, in exynos_dsi_read_from_fifo() argument
1025 u8 *payload = xfer->rx_payload + xfer->rx_done; in exynos_dsi_read_from_fifo()
1026 bool first = !xfer->rx_done; in exynos_dsi_read_from_fifo()
1027 struct device *dev = dsi->dev; in exynos_dsi_read_from_fifo()
1032 reg = exynos_dsi_read(dsi, DSIM_RXFIFO_REG); in exynos_dsi_read_from_fifo()
1037 if (xfer->rx_len >= 2) { in exynos_dsi_read_from_fifo()
1039 ++xfer->rx_done; in exynos_dsi_read_from_fifo()
1045 ++xfer->rx_done; in exynos_dsi_read_from_fifo()
1046 xfer->rx_len = xfer->rx_done; in exynos_dsi_read_from_fifo()
1047 xfer->result = 0; in exynos_dsi_read_from_fifo()
1050 dev_err(dev, "DSI Error Report: 0x%04x\n", in exynos_dsi_read_from_fifo()
1052 xfer->result = 0; in exynos_dsi_read_from_fifo()
1057 if (length > xfer->rx_len) { in exynos_dsi_read_from_fifo()
1060 xfer->rx_len, length); in exynos_dsi_read_from_fifo()
1061 length = xfer->rx_len; in exynos_dsi_read_from_fifo()
1062 } else if (length < xfer->rx_len) in exynos_dsi_read_from_fifo()
1063 xfer->rx_len = length; in exynos_dsi_read_from_fifo()
1066 length = xfer->rx_len - xfer->rx_done; in exynos_dsi_read_from_fifo()
1067 xfer->rx_done += length; in exynos_dsi_read_from_fifo()
1071 reg = exynos_dsi_read(dsi, DSIM_RXFIFO_REG); in exynos_dsi_read_from_fifo()
1077 length -= 4; in exynos_dsi_read_from_fifo()
1081 reg = exynos_dsi_read(dsi, DSIM_RXFIFO_REG); in exynos_dsi_read_from_fifo()
1094 if (xfer->rx_done == xfer->rx_len) in exynos_dsi_read_from_fifo()
1095 xfer->result = 0; in exynos_dsi_read_from_fifo()
1100 reg = exynos_dsi_read(dsi, DSIM_RXFIFO_REG); in exynos_dsi_read_from_fifo()
1103 } while (--length); in exynos_dsi_read_from_fifo()
1106 static void exynos_dsi_transfer_start(struct exynos_dsi *dsi) in exynos_dsi_transfer_start() argument
1113 spin_lock_irqsave(&dsi->transfer_lock, flags); in exynos_dsi_transfer_start()
1115 if (list_empty(&dsi->transfer_list)) { in exynos_dsi_transfer_start()
1116 spin_unlock_irqrestore(&dsi->transfer_lock, flags); in exynos_dsi_transfer_start()
1120 xfer = list_first_entry(&dsi->transfer_list, in exynos_dsi_transfer_start()
1123 spin_unlock_irqrestore(&dsi->transfer_lock, flags); in exynos_dsi_transfer_start()
1125 if (xfer->packet.payload_length && in exynos_dsi_transfer_start()
1126 xfer->tx_done == xfer->packet.payload_length) in exynos_dsi_transfer_start()
1130 exynos_dsi_send_to_fifo(dsi, xfer); in exynos_dsi_transfer_start()
1132 if (xfer->packet.payload_length || xfer->rx_len) in exynos_dsi_transfer_start()
1135 xfer->result = 0; in exynos_dsi_transfer_start()
1136 complete(&xfer->completed); in exynos_dsi_transfer_start()
1138 spin_lock_irqsave(&dsi->transfer_lock, flags); in exynos_dsi_transfer_start()
1140 list_del_init(&xfer->list); in exynos_dsi_transfer_start()
1141 start = !list_empty(&dsi->transfer_list); in exynos_dsi_transfer_start()
1143 spin_unlock_irqrestore(&dsi->transfer_lock, flags); in exynos_dsi_transfer_start()
1149 static bool exynos_dsi_transfer_finish(struct exynos_dsi *dsi) in exynos_dsi_transfer_finish() argument
1155 spin_lock_irqsave(&dsi->transfer_lock, flags); in exynos_dsi_transfer_finish()
1157 if (list_empty(&dsi->transfer_list)) { in exynos_dsi_transfer_finish()
1158 spin_unlock_irqrestore(&dsi->transfer_lock, flags); in exynos_dsi_transfer_finish()
1162 xfer = list_first_entry(&dsi->transfer_list, in exynos_dsi_transfer_finish()
1165 spin_unlock_irqrestore(&dsi->transfer_lock, flags); in exynos_dsi_transfer_finish()
1167 dev_dbg(dsi->dev, in exynos_dsi_transfer_finish()
1169 xfer, xfer->packet.payload_length, xfer->tx_done, xfer->rx_len, in exynos_dsi_transfer_finish()
1170 xfer->rx_done); in exynos_dsi_transfer_finish()
1172 if (xfer->tx_done != xfer->packet.payload_length) in exynos_dsi_transfer_finish()
1175 if (xfer->rx_done != xfer->rx_len) in exynos_dsi_transfer_finish()
1176 exynos_dsi_read_from_fifo(dsi, xfer); in exynos_dsi_transfer_finish()
1178 if (xfer->rx_done != xfer->rx_len) in exynos_dsi_transfer_finish()
1181 spin_lock_irqsave(&dsi->transfer_lock, flags); in exynos_dsi_transfer_finish()
1183 list_del_init(&xfer->list); in exynos_dsi_transfer_finish()
1184 start = !list_empty(&dsi->transfer_list); in exynos_dsi_transfer_finish()
1186 spin_unlock_irqrestore(&dsi->transfer_lock, flags); in exynos_dsi_transfer_finish()
1188 if (!xfer->rx_len) in exynos_dsi_transfer_finish()
1189 xfer->result = 0; in exynos_dsi_transfer_finish()
1190 complete(&xfer->completed); in exynos_dsi_transfer_finish()
1195 static void exynos_dsi_remove_transfer(struct exynos_dsi *dsi, in exynos_dsi_remove_transfer() argument
1201 spin_lock_irqsave(&dsi->transfer_lock, flags); in exynos_dsi_remove_transfer()
1203 if (!list_empty(&dsi->transfer_list) && in exynos_dsi_remove_transfer()
1204 xfer == list_first_entry(&dsi->transfer_list, in exynos_dsi_remove_transfer()
1206 list_del_init(&xfer->list); in exynos_dsi_remove_transfer()
1207 start = !list_empty(&dsi->transfer_list); in exynos_dsi_remove_transfer()
1208 spin_unlock_irqrestore(&dsi->transfer_lock, flags); in exynos_dsi_remove_transfer()
1210 exynos_dsi_transfer_start(dsi); in exynos_dsi_remove_transfer()
1214 list_del_init(&xfer->list); in exynos_dsi_remove_transfer()
1216 spin_unlock_irqrestore(&dsi->transfer_lock, flags); in exynos_dsi_remove_transfer()
1219 static int exynos_dsi_transfer(struct exynos_dsi *dsi, in exynos_dsi_transfer() argument
1225 xfer->tx_done = 0; in exynos_dsi_transfer()
1226 xfer->rx_done = 0; in exynos_dsi_transfer()
1227 xfer->result = -ETIMEDOUT; in exynos_dsi_transfer()
1228 init_completion(&xfer->completed); in exynos_dsi_transfer()
1230 spin_lock_irqsave(&dsi->transfer_lock, flags); in exynos_dsi_transfer()
1232 stopped = list_empty(&dsi->transfer_list); in exynos_dsi_transfer()
1233 list_add_tail(&xfer->list, &dsi->transfer_list); in exynos_dsi_transfer()
1235 spin_unlock_irqrestore(&dsi->transfer_lock, flags); in exynos_dsi_transfer()
1238 exynos_dsi_transfer_start(dsi); in exynos_dsi_transfer()
1240 wait_for_completion_timeout(&xfer->completed, in exynos_dsi_transfer()
1242 if (xfer->result == -ETIMEDOUT) { in exynos_dsi_transfer()
1243 struct mipi_dsi_packet *pkt = &xfer->packet; in exynos_dsi_transfer()
1244 exynos_dsi_remove_transfer(dsi, xfer); in exynos_dsi_transfer()
1245 dev_err(dsi->dev, "xfer timed out: %*ph %*ph\n", 4, pkt->header, in exynos_dsi_transfer()
1246 (int)pkt->payload_length, pkt->payload); in exynos_dsi_transfer()
1247 return -ETIMEDOUT; in exynos_dsi_transfer()
1251 return xfer->result; in exynos_dsi_transfer()
1256 struct exynos_dsi *dsi = dev_id; in exynos_dsi_irq() local
1259 status = exynos_dsi_read(dsi, DSIM_INTSRC_REG); in exynos_dsi_irq()
1263 dev_warn(dsi->dev, "spurious interrupt\n"); in exynos_dsi_irq()
1266 exynos_dsi_write(dsi, DSIM_INTSRC_REG, status); in exynos_dsi_irq()
1272 exynos_dsi_write(dsi, DSIM_INTMSK_REG, mask); in exynos_dsi_irq()
1273 complete(&dsi->completed); in exynos_dsi_irq()
1281 if (exynos_dsi_transfer_finish(dsi)) in exynos_dsi_irq()
1282 exynos_dsi_transfer_start(dsi); in exynos_dsi_irq()
1289 struct exynos_dsi *dsi = (struct exynos_dsi *)dev_id; in exynos_dsi_te_irq_handler() local
1290 struct drm_encoder *encoder = &dsi->encoder; in exynos_dsi_te_irq_handler()
1292 if (dsi->state & DSIM_STATE_VIDOUT_AVAILABLE) in exynos_dsi_te_irq_handler()
1293 exynos_drm_crtc_te_handler(encoder->crtc); in exynos_dsi_te_irq_handler()
1298 static void exynos_dsi_enable_irq(struct exynos_dsi *dsi) in exynos_dsi_enable_irq() argument
1300 enable_irq(dsi->irq); in exynos_dsi_enable_irq()
1302 if (gpio_is_valid(dsi->te_gpio)) in exynos_dsi_enable_irq()
1303 enable_irq(gpio_to_irq(dsi->te_gpio)); in exynos_dsi_enable_irq()
1306 static void exynos_dsi_disable_irq(struct exynos_dsi *dsi) in exynos_dsi_disable_irq() argument
1308 if (gpio_is_valid(dsi->te_gpio)) in exynos_dsi_disable_irq()
1309 disable_irq(gpio_to_irq(dsi->te_gpio)); in exynos_dsi_disable_irq()
1311 disable_irq(dsi->irq); in exynos_dsi_disable_irq()
1314 static int exynos_dsi_init(struct exynos_dsi *dsi) in exynos_dsi_init() argument
1316 const struct exynos_dsi_driver_data *driver_data = dsi->driver_data; in exynos_dsi_init()
1318 exynos_dsi_reset(dsi); in exynos_dsi_init()
1319 exynos_dsi_enable_irq(dsi); in exynos_dsi_init()
1321 if (driver_data->reg_values[RESET_TYPE] == DSIM_FUNCRST) in exynos_dsi_init()
1322 exynos_dsi_enable_lane(dsi, BIT(dsi->lanes) - 1); in exynos_dsi_init()
1324 exynos_dsi_enable_clock(dsi); in exynos_dsi_init()
1325 if (driver_data->wait_for_reset) in exynos_dsi_init()
1326 exynos_dsi_wait_for_reset(dsi); in exynos_dsi_init()
1327 exynos_dsi_set_phy_ctrl(dsi); in exynos_dsi_init()
1328 exynos_dsi_init_link(dsi); in exynos_dsi_init()
1333 static int exynos_dsi_register_te_irq(struct exynos_dsi *dsi, in exynos_dsi_register_te_irq() argument
1339 dsi->te_gpio = of_get_named_gpio(panel->of_node, "te-gpios", 0); in exynos_dsi_register_te_irq()
1340 if (dsi->te_gpio == -ENOENT) in exynos_dsi_register_te_irq()
1343 if (!gpio_is_valid(dsi->te_gpio)) { in exynos_dsi_register_te_irq()
1344 ret = dsi->te_gpio; in exynos_dsi_register_te_irq()
1345 dev_err(dsi->dev, "cannot get te-gpios, %d\n", ret); in exynos_dsi_register_te_irq()
1349 ret = gpio_request(dsi->te_gpio, "te_gpio"); in exynos_dsi_register_te_irq()
1351 dev_err(dsi->dev, "gpio request failed with %d\n", ret); in exynos_dsi_register_te_irq()
1355 te_gpio_irq = gpio_to_irq(dsi->te_gpio); in exynos_dsi_register_te_irq()
1359 IRQF_TRIGGER_RISING, "TE", dsi); in exynos_dsi_register_te_irq()
1361 dev_err(dsi->dev, "request interrupt failed with %d\n", ret); in exynos_dsi_register_te_irq()
1362 gpio_free(dsi->te_gpio); in exynos_dsi_register_te_irq()
1370 static void exynos_dsi_unregister_te_irq(struct exynos_dsi *dsi) in exynos_dsi_unregister_te_irq() argument
1372 if (gpio_is_valid(dsi->te_gpio)) { in exynos_dsi_unregister_te_irq()
1373 free_irq(gpio_to_irq(dsi->te_gpio), dsi); in exynos_dsi_unregister_te_irq()
1374 gpio_free(dsi->te_gpio); in exynos_dsi_unregister_te_irq()
1375 dsi->te_gpio = -ENOENT; in exynos_dsi_unregister_te_irq()
1381 struct exynos_dsi *dsi = encoder_to_dsi(encoder); in exynos_dsi_enable() local
1385 if (dsi->state & DSIM_STATE_ENABLED) in exynos_dsi_enable()
1388 pm_runtime_get_sync(dsi->dev); in exynos_dsi_enable()
1389 dsi->state |= DSIM_STATE_ENABLED; in exynos_dsi_enable()
1391 if (dsi->panel) { in exynos_dsi_enable()
1392 ret = drm_panel_prepare(dsi->panel); in exynos_dsi_enable()
1396 list_for_each_entry_reverse(iter, &dsi->bridge_chain, in exynos_dsi_enable()
1398 if (iter->funcs->pre_enable) in exynos_dsi_enable()
1399 iter->funcs->pre_enable(iter); in exynos_dsi_enable()
1403 exynos_dsi_set_display_mode(dsi); in exynos_dsi_enable()
1404 exynos_dsi_set_display_enable(dsi, true); in exynos_dsi_enable()
1406 if (dsi->panel) { in exynos_dsi_enable()
1407 ret = drm_panel_enable(dsi->panel); in exynos_dsi_enable()
1411 list_for_each_entry(iter, &dsi->bridge_chain, chain_node) { in exynos_dsi_enable()
1412 if (iter->funcs->enable) in exynos_dsi_enable()
1413 iter->funcs->enable(iter); in exynos_dsi_enable()
1417 dsi->state |= DSIM_STATE_VIDOUT_AVAILABLE; in exynos_dsi_enable()
1421 exynos_dsi_set_display_enable(dsi, false); in exynos_dsi_enable()
1422 drm_panel_unprepare(dsi->panel); in exynos_dsi_enable()
1425 dsi->state &= ~DSIM_STATE_ENABLED; in exynos_dsi_enable()
1426 pm_runtime_put(dsi->dev); in exynos_dsi_enable()
1431 struct exynos_dsi *dsi = encoder_to_dsi(encoder); in exynos_dsi_disable() local
1434 if (!(dsi->state & DSIM_STATE_ENABLED)) in exynos_dsi_disable()
1437 dsi->state &= ~DSIM_STATE_VIDOUT_AVAILABLE; in exynos_dsi_disable()
1439 drm_panel_disable(dsi->panel); in exynos_dsi_disable()
1441 list_for_each_entry_reverse(iter, &dsi->bridge_chain, chain_node) { in exynos_dsi_disable()
1442 if (iter->funcs->disable) in exynos_dsi_disable()
1443 iter->funcs->disable(iter); in exynos_dsi_disable()
1446 exynos_dsi_set_display_enable(dsi, false); in exynos_dsi_disable()
1447 drm_panel_unprepare(dsi->panel); in exynos_dsi_disable()
1449 list_for_each_entry(iter, &dsi->bridge_chain, chain_node) { in exynos_dsi_disable()
1450 if (iter->funcs->post_disable) in exynos_dsi_disable()
1451 iter->funcs->post_disable(iter); in exynos_dsi_disable()
1454 dsi->state &= ~DSIM_STATE_ENABLED; in exynos_dsi_disable()
1455 pm_runtime_put_sync(dsi->dev); in exynos_dsi_disable()
1461 return connector->status; in exynos_dsi_detect()
1468 connector->dev = NULL; in exynos_dsi_connector_destroy()
1482 struct exynos_dsi *dsi = connector_to_dsi(connector); in exynos_dsi_get_modes() local
1484 if (dsi->panel) in exynos_dsi_get_modes()
1485 return drm_panel_get_modes(dsi->panel, connector); in exynos_dsi_get_modes()
1496 struct exynos_dsi *dsi = encoder_to_dsi(encoder); in exynos_dsi_create_connector() local
1497 struct drm_connector *connector = &dsi->connector; in exynos_dsi_create_connector()
1498 struct drm_device *drm = encoder->dev; in exynos_dsi_create_connector()
1501 connector->polled = DRM_CONNECTOR_POLL_HPD; in exynos_dsi_create_connector()
1506 DRM_DEV_ERROR(dsi->dev, in exynos_dsi_create_connector()
1511 connector->status = connector_status_disconnected; in exynos_dsi_create_connector()
1514 if (!drm->registered) in exynos_dsi_create_connector()
1517 connector->funcs->reset(connector); in exynos_dsi_create_connector()
1532 struct exynos_dsi *dsi = host_to_dsi(host); in exynos_dsi_host_attach() local
1533 struct drm_encoder *encoder = &dsi->encoder; in exynos_dsi_host_attach()
1534 struct drm_device *drm = encoder->dev; in exynos_dsi_host_attach()
1537 out_bridge = of_drm_find_bridge(device->dev.of_node); in exynos_dsi_host_attach()
1540 dsi->out_bridge = out_bridge; in exynos_dsi_host_attach()
1541 list_splice_init(&encoder->bridge_chain, &dsi->bridge_chain); in exynos_dsi_host_attach()
1546 DRM_DEV_ERROR(dsi->dev, in exynos_dsi_host_attach()
1553 dsi->panel = of_drm_find_panel(device->dev.of_node); in exynos_dsi_host_attach()
1554 if (IS_ERR(dsi->panel)) in exynos_dsi_host_attach()
1555 dsi->panel = NULL; in exynos_dsi_host_attach()
1557 dsi->connector.status = connector_status_connected; in exynos_dsi_host_attach()
1563 * If attached panel device is for command mode one, dsi should register in exynos_dsi_host_attach()
1566 if (!(device->mode_flags & MIPI_DSI_MODE_VIDEO)) { in exynos_dsi_host_attach()
1567 int ret = exynos_dsi_register_te_irq(dsi, &device->dev); in exynos_dsi_host_attach()
1572 mutex_lock(&drm->mode_config.mutex); in exynos_dsi_host_attach()
1574 dsi->lanes = device->lanes; in exynos_dsi_host_attach()
1575 dsi->format = device->format; in exynos_dsi_host_attach()
1576 dsi->mode_flags = device->mode_flags; in exynos_dsi_host_attach()
1577 exynos_drm_crtc_get_by_type(drm, EXYNOS_DISPLAY_TYPE_LCD)->i80_mode = in exynos_dsi_host_attach()
1578 !(dsi->mode_flags & MIPI_DSI_MODE_VIDEO); in exynos_dsi_host_attach()
1580 mutex_unlock(&drm->mode_config.mutex); in exynos_dsi_host_attach()
1582 if (drm->mode_config.poll_enabled) in exynos_dsi_host_attach()
1591 struct exynos_dsi *dsi = host_to_dsi(host); in exynos_dsi_host_detach() local
1592 struct drm_device *drm = dsi->encoder.dev; in exynos_dsi_host_detach()
1594 if (dsi->panel) { in exynos_dsi_host_detach()
1595 mutex_lock(&drm->mode_config.mutex); in exynos_dsi_host_detach()
1596 exynos_dsi_disable(&dsi->encoder); in exynos_dsi_host_detach()
1597 dsi->panel = NULL; in exynos_dsi_host_detach()
1598 dsi->connector.status = connector_status_disconnected; in exynos_dsi_host_detach()
1599 mutex_unlock(&drm->mode_config.mutex); in exynos_dsi_host_detach()
1601 if (dsi->out_bridge->funcs->detach) in exynos_dsi_host_detach()
1602 dsi->out_bridge->funcs->detach(dsi->out_bridge); in exynos_dsi_host_detach()
1603 dsi->out_bridge = NULL; in exynos_dsi_host_detach()
1604 INIT_LIST_HEAD(&dsi->bridge_chain); in exynos_dsi_host_detach()
1607 if (drm->mode_config.poll_enabled) in exynos_dsi_host_detach()
1610 exynos_dsi_unregister_te_irq(dsi); in exynos_dsi_host_detach()
1618 struct exynos_dsi *dsi = host_to_dsi(host); in exynos_dsi_host_transfer() local
1622 if (!(dsi->state & DSIM_STATE_ENABLED)) in exynos_dsi_host_transfer()
1623 return -EINVAL; in exynos_dsi_host_transfer()
1625 if (!(dsi->state & DSIM_STATE_INITIALIZED)) { in exynos_dsi_host_transfer()
1626 ret = exynos_dsi_init(dsi); in exynos_dsi_host_transfer()
1629 dsi->state |= DSIM_STATE_INITIALIZED; in exynos_dsi_host_transfer()
1636 xfer.rx_len = msg->rx_len; in exynos_dsi_host_transfer()
1637 xfer.rx_payload = msg->rx_buf; in exynos_dsi_host_transfer()
1638 xfer.flags = msg->flags; in exynos_dsi_host_transfer()
1640 ret = exynos_dsi_transfer(dsi, &xfer); in exynos_dsi_host_transfer()
1666 static int exynos_dsi_parse_dt(struct exynos_dsi *dsi) in exynos_dsi_parse_dt() argument
1668 struct device *dev = dsi->dev; in exynos_dsi_parse_dt()
1669 struct device_node *node = dev->of_node; in exynos_dsi_parse_dt()
1672 ret = exynos_dsi_of_read_u32(node, "samsung,pll-clock-frequency", in exynos_dsi_parse_dt()
1673 &dsi->pll_clk_rate); in exynos_dsi_parse_dt()
1677 ret = exynos_dsi_of_read_u32(node, "samsung,burst-clock-frequency", in exynos_dsi_parse_dt()
1678 &dsi->burst_clk_rate); in exynos_dsi_parse_dt()
1682 ret = exynos_dsi_of_read_u32(node, "samsung,esc-clock-frequency", in exynos_dsi_parse_dt()
1683 &dsi->esc_clk_rate); in exynos_dsi_parse_dt()
1687 dsi->in_bridge_node = of_graph_get_remote_node(node, DSI_PORT_IN, 0); in exynos_dsi_parse_dt()
1696 struct exynos_dsi *dsi = encoder_to_dsi(encoder); in exynos_dsi_bind() local
1709 if (dsi->in_bridge_node) { in exynos_dsi_bind()
1710 in_bridge = of_drm_find_bridge(dsi->in_bridge_node); in exynos_dsi_bind()
1715 return mipi_dsi_host_register(&dsi->dsi_host); in exynos_dsi_bind()
1722 struct exynos_dsi *dsi = encoder_to_dsi(encoder); in exynos_dsi_unbind() local
1726 mipi_dsi_host_unregister(&dsi->dsi_host); in exynos_dsi_unbind()
1736 struct device *dev = &pdev->dev; in exynos_dsi_probe()
1738 struct exynos_dsi *dsi; in exynos_dsi_probe() local
1741 dsi = devm_kzalloc(dev, sizeof(*dsi), GFP_KERNEL); in exynos_dsi_probe()
1742 if (!dsi) in exynos_dsi_probe()
1743 return -ENOMEM; in exynos_dsi_probe()
1746 dsi->te_gpio = -ENOENT; in exynos_dsi_probe()
1748 init_completion(&dsi->completed); in exynos_dsi_probe()
1749 spin_lock_init(&dsi->transfer_lock); in exynos_dsi_probe()
1750 INIT_LIST_HEAD(&dsi->transfer_list); in exynos_dsi_probe()
1751 INIT_LIST_HEAD(&dsi->bridge_chain); in exynos_dsi_probe()
1753 dsi->dsi_host.ops = &exynos_dsi_ops; in exynos_dsi_probe()
1754 dsi->dsi_host.dev = dev; in exynos_dsi_probe()
1756 dsi->dev = dev; in exynos_dsi_probe()
1757 dsi->driver_data = of_device_get_match_data(dev); in exynos_dsi_probe()
1759 dsi->supplies[0].supply = "vddcore"; in exynos_dsi_probe()
1760 dsi->supplies[1].supply = "vddio"; in exynos_dsi_probe()
1761 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(dsi->supplies), in exynos_dsi_probe()
1762 dsi->supplies); in exynos_dsi_probe()
1766 dsi->clks = devm_kcalloc(dev, in exynos_dsi_probe()
1767 dsi->driver_data->num_clks, sizeof(*dsi->clks), in exynos_dsi_probe()
1769 if (!dsi->clks) in exynos_dsi_probe()
1770 return -ENOMEM; in exynos_dsi_probe()
1772 for (i = 0; i < dsi->driver_data->num_clks; i++) { in exynos_dsi_probe()
1773 dsi->clks[i] = devm_clk_get(dev, clk_names[i]); in exynos_dsi_probe()
1774 if (IS_ERR(dsi->clks[i])) { in exynos_dsi_probe()
1776 dsi->clks[i] = devm_clk_get(dev, in exynos_dsi_probe()
1778 if (!IS_ERR(dsi->clks[i])) in exynos_dsi_probe()
1784 return PTR_ERR(dsi->clks[i]); in exynos_dsi_probe()
1789 dsi->reg_base = devm_ioremap_resource(dev, res); in exynos_dsi_probe()
1790 if (IS_ERR(dsi->reg_base)) { in exynos_dsi_probe()
1792 return PTR_ERR(dsi->reg_base); in exynos_dsi_probe()
1795 dsi->phy = devm_phy_get(dev, "dsim"); in exynos_dsi_probe()
1796 if (IS_ERR(dsi->phy)) { in exynos_dsi_probe()
1797 dev_info(dev, "failed to get dsim phy\n"); in exynos_dsi_probe()
1798 return PTR_ERR(dsi->phy); in exynos_dsi_probe()
1801 dsi->irq = platform_get_irq(pdev, 0); in exynos_dsi_probe()
1802 if (dsi->irq < 0) in exynos_dsi_probe()
1803 return dsi->irq; in exynos_dsi_probe()
1805 irq_set_status_flags(dsi->irq, IRQ_NOAUTOEN); in exynos_dsi_probe()
1806 ret = devm_request_threaded_irq(dev, dsi->irq, NULL, in exynos_dsi_probe()
1808 dev_name(dev), dsi); in exynos_dsi_probe()
1810 dev_err(dev, "failed to request dsi irq\n"); in exynos_dsi_probe()
1814 ret = exynos_dsi_parse_dt(dsi); in exynos_dsi_probe()
1818 platform_set_drvdata(pdev, &dsi->encoder); in exynos_dsi_probe()
1830 of_node_put(dsi->in_bridge_node); in exynos_dsi_probe()
1837 struct exynos_dsi *dsi = platform_get_drvdata(pdev); in exynos_dsi_remove() local
1839 of_node_put(dsi->in_bridge_node); in exynos_dsi_remove()
1841 pm_runtime_disable(&pdev->dev); in exynos_dsi_remove()
1843 component_del(&pdev->dev, &exynos_dsi_component_ops); in exynos_dsi_remove()
1851 struct exynos_dsi *dsi = encoder_to_dsi(encoder); in exynos_dsi_suspend() local
1852 const struct exynos_dsi_driver_data *driver_data = dsi->driver_data; in exynos_dsi_suspend()
1857 if (dsi->state & DSIM_STATE_INITIALIZED) { in exynos_dsi_suspend()
1858 dsi->state &= ~DSIM_STATE_INITIALIZED; in exynos_dsi_suspend()
1860 exynos_dsi_disable_clock(dsi); in exynos_dsi_suspend()
1862 exynos_dsi_disable_irq(dsi); in exynos_dsi_suspend()
1865 dsi->state &= ~DSIM_STATE_CMD_LPM; in exynos_dsi_suspend()
1867 phy_power_off(dsi->phy); in exynos_dsi_suspend()
1869 for (i = driver_data->num_clks - 1; i > -1; i--) in exynos_dsi_suspend()
1870 clk_disable_unprepare(dsi->clks[i]); in exynos_dsi_suspend()
1872 ret = regulator_bulk_disable(ARRAY_SIZE(dsi->supplies), dsi->supplies); in exynos_dsi_suspend()
1874 dev_err(dsi->dev, "cannot disable regulators %d\n", ret); in exynos_dsi_suspend()
1882 struct exynos_dsi *dsi = encoder_to_dsi(encoder); in exynos_dsi_resume() local
1883 const struct exynos_dsi_driver_data *driver_data = dsi->driver_data; in exynos_dsi_resume()
1886 ret = regulator_bulk_enable(ARRAY_SIZE(dsi->supplies), dsi->supplies); in exynos_dsi_resume()
1888 dev_err(dsi->dev, "cannot enable regulators %d\n", ret); in exynos_dsi_resume()
1892 for (i = 0; i < driver_data->num_clks; i++) { in exynos_dsi_resume()
1893 ret = clk_prepare_enable(dsi->clks[i]); in exynos_dsi_resume()
1898 ret = phy_power_on(dsi->phy); in exynos_dsi_resume()
1900 dev_err(dsi->dev, "cannot enable phy %d\n", ret); in exynos_dsi_resume()
1907 while (--i > -1) in exynos_dsi_resume()
1908 clk_disable_unprepare(dsi->clks[i]); in exynos_dsi_resume()
1909 regulator_bulk_disable(ARRAY_SIZE(dsi->supplies), dsi->supplies); in exynos_dsi_resume()
1924 .name = "exynos-dsi",
1933 MODULE_DESCRIPTION("Samsung SoC MIPI DSI Master");