Lines Matching full:reg
28 u32 reg; in analogix_dp_enable_video_mute() local
31 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
32 reg |= HDCP_VIDEO_MUTE; in analogix_dp_enable_video_mute()
33 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
35 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
36 reg &= ~HDCP_VIDEO_MUTE; in analogix_dp_enable_video_mute()
37 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
43 u32 reg; in analogix_dp_stop_video() local
45 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_stop_video()
46 reg &= ~VIDEO_EN; in analogix_dp_stop_video()
47 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_stop_video()
52 u32 reg; in analogix_dp_lane_swap() local
55 reg = LANE3_MAP_LOGIC_LANE_0 | LANE2_MAP_LOGIC_LANE_1 | in analogix_dp_lane_swap()
58 reg = LANE3_MAP_LOGIC_LANE_3 | LANE2_MAP_LOGIC_LANE_2 | in analogix_dp_lane_swap()
61 writel(reg, dp->reg_base + ANALOGIX_DP_LANE_MAP); in analogix_dp_lane_swap()
66 u32 reg; in analogix_dp_init_analog_param() local
68 reg = TX_TERMINAL_CTRL_50_OHM; in analogix_dp_init_analog_param()
69 writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_1); in analogix_dp_init_analog_param()
71 reg = SEL_24M | TX_DVDD_BIT_1_0625V; in analogix_dp_init_analog_param()
72 writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_2); in analogix_dp_init_analog_param()
75 reg = REF_CLK_24M; in analogix_dp_init_analog_param()
77 reg ^= REF_CLK_MASK; in analogix_dp_init_analog_param()
79 writel(reg, dp->reg_base + ANALOGIX_DP_PLL_REG_1); in analogix_dp_init_analog_param()
86 reg = DRIVE_DVDD_BIT_1_0625V | VCO_BIT_600_MICRO; in analogix_dp_init_analog_param()
87 writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_3); in analogix_dp_init_analog_param()
89 reg = PD_RING_OSC | AUX_TERMINAL_CTRL_50_OHM | in analogix_dp_init_analog_param()
91 writel(reg, dp->reg_base + ANALOGIX_DP_PLL_FILTER_CTL_1); in analogix_dp_init_analog_param()
93 reg = CH3_AMP_400_MV | CH2_AMP_400_MV | in analogix_dp_init_analog_param()
95 writel(reg, dp->reg_base + ANALOGIX_DP_TX_AMP_TUNING_CTL); in analogix_dp_init_analog_param()
120 u32 reg; in analogix_dp_reset() local
126 reg = RK_VID_CAP_FUNC_EN_N | RK_VID_FIFO_FUNC_EN_N | in analogix_dp_reset()
129 reg = MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N | in analogix_dp_reset()
133 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1); in analogix_dp_reset()
135 reg = SSC_FUNC_EN_N | AUX_FUNC_EN_N | in analogix_dp_reset()
138 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_reset()
175 u32 reg; in analogix_dp_config_interrupt() local
178 reg = COMMON_INT_MASK_1; in analogix_dp_config_interrupt()
179 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_1); in analogix_dp_config_interrupt()
181 reg = COMMON_INT_MASK_2; in analogix_dp_config_interrupt()
182 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_2); in analogix_dp_config_interrupt()
184 reg = COMMON_INT_MASK_3; in analogix_dp_config_interrupt()
185 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_3); in analogix_dp_config_interrupt()
187 reg = COMMON_INT_MASK_4; in analogix_dp_config_interrupt()
188 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); in analogix_dp_config_interrupt()
190 reg = INT_STA_MASK; in analogix_dp_config_interrupt()
191 writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK); in analogix_dp_config_interrupt()
196 u32 reg; in analogix_dp_mute_hpd_interrupt() local
199 reg = readl(dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); in analogix_dp_mute_hpd_interrupt()
200 reg &= ~COMMON_INT_MASK_4; in analogix_dp_mute_hpd_interrupt()
201 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); in analogix_dp_mute_hpd_interrupt()
203 reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA_MASK); in analogix_dp_mute_hpd_interrupt()
204 reg &= ~INT_STA_MASK; in analogix_dp_mute_hpd_interrupt()
205 writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK); in analogix_dp_mute_hpd_interrupt()
210 u32 reg; in analogix_dp_unmute_hpd_interrupt() local
213 reg = COMMON_INT_MASK_4; in analogix_dp_unmute_hpd_interrupt()
214 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); in analogix_dp_unmute_hpd_interrupt()
216 reg = INT_STA_MASK; in analogix_dp_unmute_hpd_interrupt()
217 writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK); in analogix_dp_unmute_hpd_interrupt()
222 u32 reg; in analogix_dp_get_pll_lock_status() local
224 reg = readl(dp->reg_base + ANALOGIX_DP_DEBUG_CTL); in analogix_dp_get_pll_lock_status()
225 if (reg & PLL_LOCK) in analogix_dp_get_pll_lock_status()
233 u32 reg; in analogix_dp_set_pll_power_down() local
242 reg = readl(dp->reg_base + pd_addr); in analogix_dp_set_pll_power_down()
244 reg |= mask; in analogix_dp_set_pll_power_down()
246 reg &= ~mask; in analogix_dp_set_pll_power_down()
247 writel(reg, dp->reg_base + pd_addr); in analogix_dp_set_pll_power_down()
254 u32 reg; in analogix_dp_set_analog_power_down() local
268 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
270 reg |= mask; in analogix_dp_set_analog_power_down()
272 reg &= ~mask; in analogix_dp_set_analog_power_down()
273 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
277 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
280 reg |= mask; in analogix_dp_set_analog_power_down()
282 reg &= ~mask; in analogix_dp_set_analog_power_down()
283 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
287 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
290 reg |= mask; in analogix_dp_set_analog_power_down()
292 reg &= ~mask; in analogix_dp_set_analog_power_down()
293 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
297 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
300 reg |= mask; in analogix_dp_set_analog_power_down()
302 reg &= ~mask; in analogix_dp_set_analog_power_down()
303 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
307 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
310 reg |= mask; in analogix_dp_set_analog_power_down()
312 reg &= ~mask; in analogix_dp_set_analog_power_down()
313 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
326 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
328 reg |= mask; in analogix_dp_set_analog_power_down()
330 reg &= ~mask; in analogix_dp_set_analog_power_down()
332 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
338 reg = DP_ALL_PD; in analogix_dp_set_analog_power_down()
339 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
341 reg = DP_ALL_PD; in analogix_dp_set_analog_power_down()
342 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
344 reg &= ~DP_INC_BG; in analogix_dp_set_analog_power_down()
345 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
358 u32 reg; in analogix_dp_init_analog_func() local
363 reg = PLL_LOCK_CHG; in analogix_dp_init_analog_func()
364 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_1); in analogix_dp_init_analog_func()
366 reg = readl(dp->reg_base + ANALOGIX_DP_DEBUG_CTL); in analogix_dp_init_analog_func()
367 reg &= ~(F_PLL_LOCK | PLL_LOCK_CTRL); in analogix_dp_init_analog_func()
368 writel(reg, dp->reg_base + ANALOGIX_DP_DEBUG_CTL); in analogix_dp_init_analog_func()
385 reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_init_analog_func()
386 reg &= ~(SERDES_FIFO_FUNC_EN_N | LS_CLK_DOMAIN_FUNC_EN_N in analogix_dp_init_analog_func()
388 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_init_analog_func()
394 u32 reg; in analogix_dp_clear_hotplug_interrupts() local
399 reg = HOTPLUG_CHG | HPD_LOST | PLUG; in analogix_dp_clear_hotplug_interrupts()
400 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_4); in analogix_dp_clear_hotplug_interrupts()
402 reg = INT_HPD; in analogix_dp_clear_hotplug_interrupts()
403 writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_clear_hotplug_interrupts()
408 u32 reg; in analogix_dp_init_hpd() local
415 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_init_hpd()
416 reg &= ~(F_HPD | HPD_CTRL); in analogix_dp_init_hpd()
417 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_init_hpd()
422 u32 reg; in analogix_dp_force_hpd() local
424 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_force_hpd()
425 reg = (F_HPD | HPD_CTRL); in analogix_dp_force_hpd()
426 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_force_hpd()
431 u32 reg; in analogix_dp_get_irq_type() local
434 reg = gpiod_get_value(dp->hpd_gpiod); in analogix_dp_get_irq_type()
435 if (reg) in analogix_dp_get_irq_type()
441 reg = readl(dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_4); in analogix_dp_get_irq_type()
443 if (reg & PLUG) in analogix_dp_get_irq_type()
446 if (reg & HPD_LOST) in analogix_dp_get_irq_type()
449 if (reg & HOTPLUG_CHG) in analogix_dp_get_irq_type()
458 u32 reg; in analogix_dp_reset_aux() local
461 reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_reset_aux()
462 reg |= AUX_FUNC_EN_N; in analogix_dp_reset_aux()
463 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_reset_aux()
468 u32 reg; in analogix_dp_init_aux() local
471 reg = RPLY_RECEIV | AUX_ERR; in analogix_dp_init_aux()
472 writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_init_aux()
482 reg = 0; in analogix_dp_init_aux()
484 reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3); in analogix_dp_init_aux()
487 reg |= AUX_HW_RETRY_COUNT_SEL(0) | in analogix_dp_init_aux()
490 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_HW_RETRY_CTL); in analogix_dp_init_aux()
493 reg = DEFER_CTRL_EN | DEFER_COUNT(1); in analogix_dp_init_aux()
494 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_DEFER_CTL); in analogix_dp_init_aux()
497 reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_init_aux()
498 reg &= ~AUX_FUNC_EN_N; in analogix_dp_init_aux()
499 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_init_aux()
504 u32 reg; in analogix_dp_get_plug_in_status() local
510 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_get_plug_in_status()
511 if (reg & HPD_STATUS) in analogix_dp_get_plug_in_status()
520 u32 reg; in analogix_dp_enable_sw_function() local
522 reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_1); in analogix_dp_enable_sw_function()
523 reg &= ~SW_FUNC_EN_N; in analogix_dp_enable_sw_function()
524 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1); in analogix_dp_enable_sw_function()
529 int reg; in analogix_dp_start_aux_transaction() local
534 reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2); in analogix_dp_start_aux_transaction()
535 reg |= AUX_EN; in analogix_dp_start_aux_transaction()
536 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2); in analogix_dp_start_aux_transaction()
539 reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_start_aux_transaction()
540 while (!(reg & RPLY_RECEIV)) { in analogix_dp_start_aux_transaction()
546 reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_start_aux_transaction()
554 reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_start_aux_transaction()
555 if (reg & AUX_ERR) { in analogix_dp_start_aux_transaction()
561 reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_STA); in analogix_dp_start_aux_transaction()
562 if ((reg & AUX_STATUS_MASK) != 0) { in analogix_dp_start_aux_transaction()
564 reg & AUX_STATUS_MASK); in analogix_dp_start_aux_transaction()
575 u32 reg; in analogix_dp_write_byte_to_dpcd() local
581 reg = BUF_CLR; in analogix_dp_write_byte_to_dpcd()
582 writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL); in analogix_dp_write_byte_to_dpcd()
585 reg = AUX_ADDR_7_0(reg_addr); in analogix_dp_write_byte_to_dpcd()
586 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0); in analogix_dp_write_byte_to_dpcd()
587 reg = AUX_ADDR_15_8(reg_addr); in analogix_dp_write_byte_to_dpcd()
588 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8); in analogix_dp_write_byte_to_dpcd()
589 reg = AUX_ADDR_19_16(reg_addr); in analogix_dp_write_byte_to_dpcd()
590 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16); in analogix_dp_write_byte_to_dpcd()
593 reg = (unsigned int)data; in analogix_dp_write_byte_to_dpcd()
594 writel(reg, dp->reg_base + ANALOGIX_DP_BUF_DATA_0); in analogix_dp_write_byte_to_dpcd()
601 reg = AUX_TX_COMM_DP_TRANSACTION | AUX_TX_COMM_WRITE; in analogix_dp_write_byte_to_dpcd()
602 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1); in analogix_dp_write_byte_to_dpcd()
617 u32 reg; in analogix_dp_set_link_bandwidth() local
619 reg = bwtype; in analogix_dp_set_link_bandwidth()
621 writel(reg, dp->reg_base + ANALOGIX_DP_LINK_BW_SET); in analogix_dp_set_link_bandwidth()
626 u32 reg; in analogix_dp_get_link_bandwidth() local
628 reg = readl(dp->reg_base + ANALOGIX_DP_LINK_BW_SET); in analogix_dp_get_link_bandwidth()
629 *bwtype = reg; in analogix_dp_get_link_bandwidth()
634 u32 reg; in analogix_dp_set_lane_count() local
636 reg = count; in analogix_dp_set_lane_count()
637 writel(reg, dp->reg_base + ANALOGIX_DP_LANE_COUNT_SET); in analogix_dp_set_lane_count()
642 u32 reg; in analogix_dp_get_lane_count() local
644 reg = readl(dp->reg_base + ANALOGIX_DP_LANE_COUNT_SET); in analogix_dp_get_lane_count()
645 *count = reg; in analogix_dp_get_lane_count()
651 u32 reg; in analogix_dp_enable_enhanced_mode() local
654 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_enable_enhanced_mode()
655 reg |= ENHANCED; in analogix_dp_enable_enhanced_mode()
656 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_enable_enhanced_mode()
658 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_enable_enhanced_mode()
659 reg &= ~ENHANCED; in analogix_dp_enable_enhanced_mode()
660 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_enable_enhanced_mode()
667 u32 reg; in analogix_dp_set_training_pattern() local
671 reg = SCRAMBLING_ENABLE | LINK_QUAL_PATTERN_SET_PRBS7; in analogix_dp_set_training_pattern()
672 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_set_training_pattern()
675 reg = SCRAMBLING_ENABLE | LINK_QUAL_PATTERN_SET_D10_2; in analogix_dp_set_training_pattern()
676 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_set_training_pattern()
679 reg = SCRAMBLING_DISABLE | SW_TRAINING_PATTERN_SET_PTN1; in analogix_dp_set_training_pattern()
680 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_set_training_pattern()
683 reg = SCRAMBLING_DISABLE | SW_TRAINING_PATTERN_SET_PTN2; in analogix_dp_set_training_pattern()
684 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_set_training_pattern()
687 reg = SCRAMBLING_ENABLE | in analogix_dp_set_training_pattern()
690 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_set_training_pattern()
700 u32 reg; in analogix_dp_set_lane0_pre_emphasis() local
702 reg = readl(dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL); in analogix_dp_set_lane0_pre_emphasis()
703 reg &= ~PRE_EMPHASIS_SET_MASK; in analogix_dp_set_lane0_pre_emphasis()
704 reg |= level << PRE_EMPHASIS_SET_SHIFT; in analogix_dp_set_lane0_pre_emphasis()
705 writel(reg, dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL); in analogix_dp_set_lane0_pre_emphasis()
711 u32 reg; in analogix_dp_set_lane1_pre_emphasis() local
713 reg = readl(dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL); in analogix_dp_set_lane1_pre_emphasis()
714 reg &= ~PRE_EMPHASIS_SET_MASK; in analogix_dp_set_lane1_pre_emphasis()
715 reg |= level << PRE_EMPHASIS_SET_SHIFT; in analogix_dp_set_lane1_pre_emphasis()
716 writel(reg, dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL); in analogix_dp_set_lane1_pre_emphasis()
722 u32 reg; in analogix_dp_set_lane2_pre_emphasis() local
724 reg = readl(dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL); in analogix_dp_set_lane2_pre_emphasis()
725 reg &= ~PRE_EMPHASIS_SET_MASK; in analogix_dp_set_lane2_pre_emphasis()
726 reg |= level << PRE_EMPHASIS_SET_SHIFT; in analogix_dp_set_lane2_pre_emphasis()
727 writel(reg, dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL); in analogix_dp_set_lane2_pre_emphasis()
733 u32 reg; in analogix_dp_set_lane3_pre_emphasis() local
735 reg = readl(dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL); in analogix_dp_set_lane3_pre_emphasis()
736 reg &= ~PRE_EMPHASIS_SET_MASK; in analogix_dp_set_lane3_pre_emphasis()
737 reg |= level << PRE_EMPHASIS_SET_SHIFT; in analogix_dp_set_lane3_pre_emphasis()
738 writel(reg, dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL); in analogix_dp_set_lane3_pre_emphasis()
744 u32 reg; in analogix_dp_set_lane0_link_training() local
746 reg = training_lane; in analogix_dp_set_lane0_link_training()
747 writel(reg, dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL); in analogix_dp_set_lane0_link_training()
753 u32 reg; in analogix_dp_set_lane1_link_training() local
755 reg = training_lane; in analogix_dp_set_lane1_link_training()
756 writel(reg, dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL); in analogix_dp_set_lane1_link_training()
762 u32 reg; in analogix_dp_set_lane2_link_training() local
764 reg = training_lane; in analogix_dp_set_lane2_link_training()
765 writel(reg, dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL); in analogix_dp_set_lane2_link_training()
771 u32 reg; in analogix_dp_set_lane3_link_training() local
773 reg = training_lane; in analogix_dp_set_lane3_link_training()
774 writel(reg, dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL); in analogix_dp_set_lane3_link_training()
799 u32 reg; in analogix_dp_reset_macro() local
801 reg = readl(dp->reg_base + ANALOGIX_DP_PHY_TEST); in analogix_dp_reset_macro()
802 reg |= MACRO_RST; in analogix_dp_reset_macro()
803 writel(reg, dp->reg_base + ANALOGIX_DP_PHY_TEST); in analogix_dp_reset_macro()
808 reg &= ~MACRO_RST; in analogix_dp_reset_macro()
809 writel(reg, dp->reg_base + ANALOGIX_DP_PHY_TEST); in analogix_dp_reset_macro()
814 u32 reg; in analogix_dp_init_video() local
816 reg = VSYNC_DET | VID_FORMAT_CHG | VID_CLK_CHG; in analogix_dp_init_video()
817 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_1); in analogix_dp_init_video()
819 reg = 0x0; in analogix_dp_init_video()
820 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_1); in analogix_dp_init_video()
822 reg = CHA_CRI(4) | CHA_CTRL; in analogix_dp_init_video()
823 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_2); in analogix_dp_init_video()
825 reg = 0x0; in analogix_dp_init_video()
826 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_init_video()
828 reg = VID_HRES_TH(2) | VID_VRES_TH(0); in analogix_dp_init_video()
829 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_8); in analogix_dp_init_video()
834 u32 reg; in analogix_dp_set_video_color_format() local
837 reg = (dp->video_info.dynamic_range << IN_D_RANGE_SHIFT) | in analogix_dp_set_video_color_format()
840 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_2); in analogix_dp_set_video_color_format()
843 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_3); in analogix_dp_set_video_color_format()
844 reg &= ~IN_YC_COEFFI_MASK; in analogix_dp_set_video_color_format()
846 reg |= IN_YC_COEFFI_ITU709; in analogix_dp_set_video_color_format()
848 reg |= IN_YC_COEFFI_ITU601; in analogix_dp_set_video_color_format()
849 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_3); in analogix_dp_set_video_color_format()
854 u32 reg; in analogix_dp_is_slave_video_stream_clock_on() local
856 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_1); in analogix_dp_is_slave_video_stream_clock_on()
857 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_1); in analogix_dp_is_slave_video_stream_clock_on()
859 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_1); in analogix_dp_is_slave_video_stream_clock_on()
861 if (!(reg & DET_STA)) { in analogix_dp_is_slave_video_stream_clock_on()
866 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_2); in analogix_dp_is_slave_video_stream_clock_on()
867 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_2); in analogix_dp_is_slave_video_stream_clock_on()
869 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_2); in analogix_dp_is_slave_video_stream_clock_on()
872 if (reg & CHA_STA) { in analogix_dp_is_slave_video_stream_clock_on()
884 u32 reg; in analogix_dp_set_video_cr_mn() local
887 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_set_video_cr_mn()
888 reg |= FIX_M_VID; in analogix_dp_set_video_cr_mn()
889 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_set_video_cr_mn()
890 reg = m_value & 0xff; in analogix_dp_set_video_cr_mn()
891 writel(reg, dp->reg_base + ANALOGIX_DP_M_VID_0); in analogix_dp_set_video_cr_mn()
892 reg = (m_value >> 8) & 0xff; in analogix_dp_set_video_cr_mn()
893 writel(reg, dp->reg_base + ANALOGIX_DP_M_VID_1); in analogix_dp_set_video_cr_mn()
894 reg = (m_value >> 16) & 0xff; in analogix_dp_set_video_cr_mn()
895 writel(reg, dp->reg_base + ANALOGIX_DP_M_VID_2); in analogix_dp_set_video_cr_mn()
897 reg = n_value & 0xff; in analogix_dp_set_video_cr_mn()
898 writel(reg, dp->reg_base + ANALOGIX_DP_N_VID_0); in analogix_dp_set_video_cr_mn()
899 reg = (n_value >> 8) & 0xff; in analogix_dp_set_video_cr_mn()
900 writel(reg, dp->reg_base + ANALOGIX_DP_N_VID_1); in analogix_dp_set_video_cr_mn()
901 reg = (n_value >> 16) & 0xff; in analogix_dp_set_video_cr_mn()
902 writel(reg, dp->reg_base + ANALOGIX_DP_N_VID_2); in analogix_dp_set_video_cr_mn()
904 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_set_video_cr_mn()
905 reg &= ~FIX_M_VID; in analogix_dp_set_video_cr_mn()
906 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_set_video_cr_mn()
916 u32 reg; in analogix_dp_set_video_timing_mode() local
919 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_set_video_timing_mode()
920 reg &= ~FORMAT_SEL; in analogix_dp_set_video_timing_mode()
921 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_set_video_timing_mode()
923 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_set_video_timing_mode()
924 reg |= FORMAT_SEL; in analogix_dp_set_video_timing_mode()
925 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_set_video_timing_mode()
931 u32 reg; in analogix_dp_enable_video_master() local
934 reg = readl(dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL); in analogix_dp_enable_video_master()
935 reg &= ~VIDEO_MODE_MASK; in analogix_dp_enable_video_master()
936 reg |= VIDEO_MASTER_MODE_EN | VIDEO_MODE_MASTER_MODE; in analogix_dp_enable_video_master()
937 writel(reg, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL); in analogix_dp_enable_video_master()
939 reg = readl(dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL); in analogix_dp_enable_video_master()
940 reg &= ~VIDEO_MODE_MASK; in analogix_dp_enable_video_master()
941 reg |= VIDEO_MODE_SLAVE_MODE; in analogix_dp_enable_video_master()
942 writel(reg, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL); in analogix_dp_enable_video_master()
948 u32 reg; in analogix_dp_start_video() local
950 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_start_video()
951 reg |= VIDEO_EN; in analogix_dp_start_video()
952 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_start_video()
957 u32 reg; in analogix_dp_is_video_stream_on() local
959 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_is_video_stream_on()
960 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_is_video_stream_on()
962 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_is_video_stream_on()
963 if (!(reg & STRM_VALID)) { in analogix_dp_is_video_stream_on()
973 u32 reg; in analogix_dp_config_video_slave_mode() local
975 reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_1); in analogix_dp_config_video_slave_mode()
977 reg &= ~(RK_VID_CAP_FUNC_EN_N | RK_VID_FIFO_FUNC_EN_N); in analogix_dp_config_video_slave_mode()
979 reg &= ~(MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N); in analogix_dp_config_video_slave_mode()
980 reg |= MASTER_VID_FUNC_EN_N; in analogix_dp_config_video_slave_mode()
982 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1); in analogix_dp_config_video_slave_mode()
984 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
985 reg &= ~INTERACE_SCAN_CFG; in analogix_dp_config_video_slave_mode()
986 reg |= (dp->video_info.interlaced << 2); in analogix_dp_config_video_slave_mode()
987 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
989 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
990 reg &= ~VSYNC_POLARITY_CFG; in analogix_dp_config_video_slave_mode()
991 reg |= (dp->video_info.v_sync_polarity << 1); in analogix_dp_config_video_slave_mode()
992 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
994 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
995 reg &= ~HSYNC_POLARITY_CFG; in analogix_dp_config_video_slave_mode()
996 reg |= (dp->video_info.h_sync_polarity << 0); in analogix_dp_config_video_slave_mode()
997 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
999 reg = AUDIO_MODE_SPDIF_MODE | VIDEO_MODE_SLAVE_MODE; in analogix_dp_config_video_slave_mode()
1000 writel(reg, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL); in analogix_dp_config_video_slave_mode()
1005 u32 reg; in analogix_dp_enable_scrambling() local
1007 reg = readl(dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_enable_scrambling()
1008 reg &= ~SCRAMBLING_DISABLE; in analogix_dp_enable_scrambling()
1009 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_enable_scrambling()
1014 u32 reg; in analogix_dp_disable_scrambling() local
1016 reg = readl(dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_disable_scrambling()
1017 reg |= SCRAMBLING_DISABLE; in analogix_dp_disable_scrambling()
1018 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_disable_scrambling()
1104 u32 reg; in analogix_dp_transfer() local
1116 reg = BUF_CLR; in analogix_dp_transfer()
1117 writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL); in analogix_dp_transfer()
1121 reg = AUX_TX_COMM_WRITE | AUX_TX_COMM_I2C_TRANSACTION; in analogix_dp_transfer()
1123 reg |= AUX_TX_COMM_MOT; in analogix_dp_transfer()
1127 reg = AUX_TX_COMM_READ | AUX_TX_COMM_I2C_TRANSACTION; in analogix_dp_transfer()
1129 reg |= AUX_TX_COMM_MOT; in analogix_dp_transfer()
1133 reg = AUX_TX_COMM_WRITE | AUX_TX_COMM_DP_TRANSACTION; in analogix_dp_transfer()
1137 reg = AUX_TX_COMM_READ | AUX_TX_COMM_DP_TRANSACTION; in analogix_dp_transfer()
1144 reg |= AUX_LENGTH(msg->size); in analogix_dp_transfer()
1145 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1); in analogix_dp_transfer()
1148 reg = AUX_ADDR_7_0(msg->address); in analogix_dp_transfer()
1149 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0); in analogix_dp_transfer()
1150 reg = AUX_ADDR_15_8(msg->address); in analogix_dp_transfer()
1151 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8); in analogix_dp_transfer()
1152 reg = AUX_ADDR_19_16(msg->address); in analogix_dp_transfer()
1153 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16); in analogix_dp_transfer()
1157 reg = buffer[i]; in analogix_dp_transfer()
1158 writel(reg, dp->reg_base + ANALOGIX_DP_BUF_DATA_0 + in analogix_dp_transfer()
1165 reg = AUX_EN; in analogix_dp_transfer()
1169 reg |= ADDR_ONLY; in analogix_dp_transfer()
1171 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2); in analogix_dp_transfer()
1174 reg, !(reg & AUX_EN), 25, 500 * 1000); in analogix_dp_transfer()
1183 reg, reg & RPLY_RECEIV, 10, 20 * 1000); in analogix_dp_transfer()
1193 reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_transfer()
1195 if ((reg & AUX_ERR) || (status_reg & AUX_STATUS_MASK)) { in analogix_dp_transfer()
1199 status_reg & AUX_STATUS_MASK, !!(reg & AUX_ERR)); in analogix_dp_transfer()
1205 reg = readl(dp->reg_base + ANALOGIX_DP_BUF_DATA_0 + in analogix_dp_transfer()
1207 buffer[i] = (unsigned char)reg; in analogix_dp_transfer()
1213 reg = readl(dp->reg_base + ANALOGIX_DP_AUX_RX_COMM); in analogix_dp_transfer()
1214 if (reg == AUX_RX_COMM_AUX_DEFER) in analogix_dp_transfer()
1216 else if (reg == AUX_RX_COMM_I2C_DEFER) in analogix_dp_transfer()