Lines Matching full:dp
3 * Analogix DP (Display port) core register interface driver.
26 void analogix_dp_enable_video_mute(struct analogix_dp_device *dp, bool enable) in analogix_dp_enable_video_mute() argument
31 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
33 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
35 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
37 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
41 void analogix_dp_stop_video(struct analogix_dp_device *dp) in analogix_dp_stop_video() argument
45 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_stop_video()
47 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_stop_video()
50 void analogix_dp_lane_swap(struct analogix_dp_device *dp, bool enable) in analogix_dp_lane_swap() argument
61 writel(reg, dp->reg_base + ANALOGIX_DP_LANE_MAP); in analogix_dp_lane_swap()
64 void analogix_dp_init_analog_param(struct analogix_dp_device *dp) in analogix_dp_init_analog_param() argument
69 writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_1); in analogix_dp_init_analog_param()
72 writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_2); in analogix_dp_init_analog_param()
74 if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) { in analogix_dp_init_analog_param()
76 if (dp->plat_data->dev_type == RK3288_DP) in analogix_dp_init_analog_param()
79 writel(reg, dp->reg_base + ANALOGIX_DP_PLL_REG_1); in analogix_dp_init_analog_param()
80 writel(0x95, dp->reg_base + ANALOGIX_DP_PLL_REG_2); in analogix_dp_init_analog_param()
81 writel(0x40, dp->reg_base + ANALOGIX_DP_PLL_REG_3); in analogix_dp_init_analog_param()
82 writel(0x58, dp->reg_base + ANALOGIX_DP_PLL_REG_4); in analogix_dp_init_analog_param()
83 writel(0x22, dp->reg_base + ANALOGIX_DP_PLL_REG_5); in analogix_dp_init_analog_param()
87 writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_3); in analogix_dp_init_analog_param()
91 writel(reg, dp->reg_base + ANALOGIX_DP_PLL_FILTER_CTL_1); in analogix_dp_init_analog_param()
95 writel(reg, dp->reg_base + ANALOGIX_DP_TX_AMP_TUNING_CTL); in analogix_dp_init_analog_param()
98 void analogix_dp_init_interrupt(struct analogix_dp_device *dp) in analogix_dp_init_interrupt() argument
101 writel(INT_POL1 | INT_POL0, dp->reg_base + ANALOGIX_DP_INT_CTL); in analogix_dp_init_interrupt()
104 writel(0xff, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_1); in analogix_dp_init_interrupt()
105 writel(0x4f, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_2); in analogix_dp_init_interrupt()
106 writel(0xe0, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_3); in analogix_dp_init_interrupt()
107 writel(0xe7, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_4); in analogix_dp_init_interrupt()
108 writel(0x63, dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_init_interrupt()
111 writel(0x00, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_1); in analogix_dp_init_interrupt()
112 writel(0x00, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_2); in analogix_dp_init_interrupt()
113 writel(0x00, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_3); in analogix_dp_init_interrupt()
114 writel(0x00, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); in analogix_dp_init_interrupt()
115 writel(0x00, dp->reg_base + ANALOGIX_DP_INT_STA_MASK); in analogix_dp_init_interrupt()
118 void analogix_dp_reset(struct analogix_dp_device *dp) in analogix_dp_reset() argument
122 analogix_dp_stop_video(dp); in analogix_dp_reset()
123 analogix_dp_enable_video_mute(dp, 0); in analogix_dp_reset()
125 if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) in analogix_dp_reset()
133 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1); in analogix_dp_reset()
138 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_reset()
142 analogix_dp_lane_swap(dp, 0); in analogix_dp_reset()
144 writel(0x0, dp->reg_base + ANALOGIX_DP_SYS_CTL_1); in analogix_dp_reset()
145 writel(0x40, dp->reg_base + ANALOGIX_DP_SYS_CTL_2); in analogix_dp_reset()
146 writel(0x0, dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_reset()
147 writel(0x0, dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_reset()
149 writel(0x0, dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL); in analogix_dp_reset()
150 writel(0x0, dp->reg_base + ANALOGIX_DP_HDCP_CTL); in analogix_dp_reset()
152 writel(0x5e, dp->reg_base + ANALOGIX_DP_HPD_DEGLITCH_L); in analogix_dp_reset()
153 writel(0x1a, dp->reg_base + ANALOGIX_DP_HPD_DEGLITCH_H); in analogix_dp_reset()
155 writel(0x10, dp->reg_base + ANALOGIX_DP_LINK_DEBUG_CTL); in analogix_dp_reset()
157 writel(0x0, dp->reg_base + ANALOGIX_DP_PHY_TEST); in analogix_dp_reset()
159 writel(0x0, dp->reg_base + ANALOGIX_DP_VIDEO_FIFO_THRD); in analogix_dp_reset()
160 writel(0x20, dp->reg_base + ANALOGIX_DP_AUDIO_MARGIN); in analogix_dp_reset()
162 writel(0x4, dp->reg_base + ANALOGIX_DP_M_VID_GEN_FILTER_TH); in analogix_dp_reset()
163 writel(0x2, dp->reg_base + ANALOGIX_DP_M_AUD_GEN_FILTER_TH); in analogix_dp_reset()
165 writel(0x00000101, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL); in analogix_dp_reset()
168 void analogix_dp_swreset(struct analogix_dp_device *dp) in analogix_dp_swreset() argument
170 writel(RESET_DP_TX, dp->reg_base + ANALOGIX_DP_TX_SW_RESET); in analogix_dp_swreset()
173 void analogix_dp_config_interrupt(struct analogix_dp_device *dp) in analogix_dp_config_interrupt() argument
179 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_1); in analogix_dp_config_interrupt()
182 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_2); in analogix_dp_config_interrupt()
185 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_3); in analogix_dp_config_interrupt()
188 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); in analogix_dp_config_interrupt()
191 writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK); in analogix_dp_config_interrupt()
194 void analogix_dp_mute_hpd_interrupt(struct analogix_dp_device *dp) in analogix_dp_mute_hpd_interrupt() argument
199 reg = readl(dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); in analogix_dp_mute_hpd_interrupt()
201 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); in analogix_dp_mute_hpd_interrupt()
203 reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA_MASK); in analogix_dp_mute_hpd_interrupt()
205 writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK); in analogix_dp_mute_hpd_interrupt()
208 void analogix_dp_unmute_hpd_interrupt(struct analogix_dp_device *dp) in analogix_dp_unmute_hpd_interrupt() argument
214 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); in analogix_dp_unmute_hpd_interrupt()
217 writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK); in analogix_dp_unmute_hpd_interrupt()
220 enum pll_status analogix_dp_get_pll_lock_status(struct analogix_dp_device *dp) in analogix_dp_get_pll_lock_status() argument
224 reg = readl(dp->reg_base + ANALOGIX_DP_DEBUG_CTL); in analogix_dp_get_pll_lock_status()
231 void analogix_dp_set_pll_power_down(struct analogix_dp_device *dp, bool enable) in analogix_dp_set_pll_power_down() argument
237 if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) { in analogix_dp_set_pll_power_down()
242 reg = readl(dp->reg_base + pd_addr); in analogix_dp_set_pll_power_down()
247 writel(reg, dp->reg_base + pd_addr); in analogix_dp_set_pll_power_down()
250 void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp, in analogix_dp_set_analog_power_down() argument
258 if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) in analogix_dp_set_analog_power_down()
263 if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) in analogix_dp_set_analog_power_down()
268 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
273 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
277 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
283 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
287 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
293 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
297 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
303 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
307 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
313 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
321 if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) in analogix_dp_set_analog_power_down()
326 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
332 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
333 if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) in analogix_dp_set_analog_power_down()
339 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
342 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
345 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
348 writel(0x00, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
356 int analogix_dp_init_analog_func(struct analogix_dp_device *dp) in analogix_dp_init_analog_func() argument
361 analogix_dp_set_analog_power_down(dp, POWER_ALL, 0); in analogix_dp_init_analog_func()
364 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_1); in analogix_dp_init_analog_func()
366 reg = readl(dp->reg_base + ANALOGIX_DP_DEBUG_CTL); in analogix_dp_init_analog_func()
368 writel(reg, dp->reg_base + ANALOGIX_DP_DEBUG_CTL); in analogix_dp_init_analog_func()
371 if (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) { in analogix_dp_init_analog_func()
372 analogix_dp_set_pll_power_down(dp, 0); in analogix_dp_init_analog_func()
374 while (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) { in analogix_dp_init_analog_func()
377 dev_err(dp->dev, "failed to get pll lock status\n"); in analogix_dp_init_analog_func()
385 reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_init_analog_func()
388 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_init_analog_func()
392 void analogix_dp_clear_hotplug_interrupts(struct analogix_dp_device *dp) in analogix_dp_clear_hotplug_interrupts() argument
396 if (dp->hpd_gpiod) in analogix_dp_clear_hotplug_interrupts()
400 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_4); in analogix_dp_clear_hotplug_interrupts()
403 writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_clear_hotplug_interrupts()
406 void analogix_dp_init_hpd(struct analogix_dp_device *dp) in analogix_dp_init_hpd() argument
410 if (dp->hpd_gpiod) in analogix_dp_init_hpd()
413 analogix_dp_clear_hotplug_interrupts(dp); in analogix_dp_init_hpd()
415 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_init_hpd()
417 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_init_hpd()
420 void analogix_dp_force_hpd(struct analogix_dp_device *dp) in analogix_dp_force_hpd() argument
424 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_force_hpd()
426 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_force_hpd()
429 enum dp_irq_type analogix_dp_get_irq_type(struct analogix_dp_device *dp) in analogix_dp_get_irq_type() argument
433 if (dp->hpd_gpiod) { in analogix_dp_get_irq_type()
434 reg = gpiod_get_value(dp->hpd_gpiod); in analogix_dp_get_irq_type()
441 reg = readl(dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_4); in analogix_dp_get_irq_type()
456 void analogix_dp_reset_aux(struct analogix_dp_device *dp) in analogix_dp_reset_aux() argument
461 reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_reset_aux()
463 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_reset_aux()
466 void analogix_dp_init_aux(struct analogix_dp_device *dp) in analogix_dp_init_aux() argument
472 writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_init_aux()
474 analogix_dp_set_analog_power_down(dp, AUX_BLOCK, true); in analogix_dp_init_aux()
476 analogix_dp_set_analog_power_down(dp, AUX_BLOCK, false); in analogix_dp_init_aux()
478 analogix_dp_reset_aux(dp); in analogix_dp_init_aux()
481 if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) in analogix_dp_init_aux()
490 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_HW_RETRY_CTL); in analogix_dp_init_aux()
494 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_DEFER_CTL); in analogix_dp_init_aux()
497 reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_init_aux()
499 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_init_aux()
502 int analogix_dp_get_plug_in_status(struct analogix_dp_device *dp) in analogix_dp_get_plug_in_status() argument
506 if (dp->hpd_gpiod) { in analogix_dp_get_plug_in_status()
507 if (gpiod_get_value(dp->hpd_gpiod)) in analogix_dp_get_plug_in_status()
510 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_get_plug_in_status()
518 void analogix_dp_enable_sw_function(struct analogix_dp_device *dp) in analogix_dp_enable_sw_function() argument
522 reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_1); in analogix_dp_enable_sw_function()
524 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1); in analogix_dp_enable_sw_function()
527 int analogix_dp_start_aux_transaction(struct analogix_dp_device *dp) in analogix_dp_start_aux_transaction() argument
534 reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2); in analogix_dp_start_aux_transaction()
536 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2); in analogix_dp_start_aux_transaction()
539 reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_start_aux_transaction()
543 dev_err(dp->dev, "AUX CH command reply failed!\n"); in analogix_dp_start_aux_transaction()
546 reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_start_aux_transaction()
551 writel(RPLY_RECEIV, dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_start_aux_transaction()
554 reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_start_aux_transaction()
556 writel(AUX_ERR, dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_start_aux_transaction()
561 reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_STA); in analogix_dp_start_aux_transaction()
563 dev_err(dp->dev, "AUX CH error happens: %d\n\n", in analogix_dp_start_aux_transaction()
571 int analogix_dp_write_byte_to_dpcd(struct analogix_dp_device *dp, in analogix_dp_write_byte_to_dpcd() argument
582 writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL); in analogix_dp_write_byte_to_dpcd()
586 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0); in analogix_dp_write_byte_to_dpcd()
588 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8); in analogix_dp_write_byte_to_dpcd()
590 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16); in analogix_dp_write_byte_to_dpcd()
594 writel(reg, dp->reg_base + ANALOGIX_DP_BUF_DATA_0); in analogix_dp_write_byte_to_dpcd()
602 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1); in analogix_dp_write_byte_to_dpcd()
605 retval = analogix_dp_start_aux_transaction(dp); in analogix_dp_write_byte_to_dpcd()
609 dev_dbg(dp->dev, "%s: Aux Transaction fail!\n", __func__); in analogix_dp_write_byte_to_dpcd()
615 void analogix_dp_set_link_bandwidth(struct analogix_dp_device *dp, u32 bwtype) in analogix_dp_set_link_bandwidth() argument
621 writel(reg, dp->reg_base + ANALOGIX_DP_LINK_BW_SET); in analogix_dp_set_link_bandwidth()
624 void analogix_dp_get_link_bandwidth(struct analogix_dp_device *dp, u32 *bwtype) in analogix_dp_get_link_bandwidth() argument
628 reg = readl(dp->reg_base + ANALOGIX_DP_LINK_BW_SET); in analogix_dp_get_link_bandwidth()
632 void analogix_dp_set_lane_count(struct analogix_dp_device *dp, u32 count) in analogix_dp_set_lane_count() argument
637 writel(reg, dp->reg_base + ANALOGIX_DP_LANE_COUNT_SET); in analogix_dp_set_lane_count()
640 void analogix_dp_get_lane_count(struct analogix_dp_device *dp, u32 *count) in analogix_dp_get_lane_count() argument
644 reg = readl(dp->reg_base + ANALOGIX_DP_LANE_COUNT_SET); in analogix_dp_get_lane_count()
648 void analogix_dp_enable_enhanced_mode(struct analogix_dp_device *dp, in analogix_dp_enable_enhanced_mode() argument
654 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_enable_enhanced_mode()
656 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_enable_enhanced_mode()
658 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_enable_enhanced_mode()
660 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_enable_enhanced_mode()
664 void analogix_dp_set_training_pattern(struct analogix_dp_device *dp, in analogix_dp_set_training_pattern() argument
672 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_set_training_pattern()
676 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_set_training_pattern()
680 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_set_training_pattern()
684 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_set_training_pattern()
690 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_set_training_pattern()
697 void analogix_dp_set_lane0_pre_emphasis(struct analogix_dp_device *dp, in analogix_dp_set_lane0_pre_emphasis() argument
702 reg = readl(dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL); in analogix_dp_set_lane0_pre_emphasis()
705 writel(reg, dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL); in analogix_dp_set_lane0_pre_emphasis()
708 void analogix_dp_set_lane1_pre_emphasis(struct analogix_dp_device *dp, in analogix_dp_set_lane1_pre_emphasis() argument
713 reg = readl(dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL); in analogix_dp_set_lane1_pre_emphasis()
716 writel(reg, dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL); in analogix_dp_set_lane1_pre_emphasis()
719 void analogix_dp_set_lane2_pre_emphasis(struct analogix_dp_device *dp, in analogix_dp_set_lane2_pre_emphasis() argument
724 reg = readl(dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL); in analogix_dp_set_lane2_pre_emphasis()
727 writel(reg, dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL); in analogix_dp_set_lane2_pre_emphasis()
730 void analogix_dp_set_lane3_pre_emphasis(struct analogix_dp_device *dp, in analogix_dp_set_lane3_pre_emphasis() argument
735 reg = readl(dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL); in analogix_dp_set_lane3_pre_emphasis()
738 writel(reg, dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL); in analogix_dp_set_lane3_pre_emphasis()
741 void analogix_dp_set_lane0_link_training(struct analogix_dp_device *dp, in analogix_dp_set_lane0_link_training() argument
747 writel(reg, dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL); in analogix_dp_set_lane0_link_training()
750 void analogix_dp_set_lane1_link_training(struct analogix_dp_device *dp, in analogix_dp_set_lane1_link_training() argument
756 writel(reg, dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL); in analogix_dp_set_lane1_link_training()
759 void analogix_dp_set_lane2_link_training(struct analogix_dp_device *dp, in analogix_dp_set_lane2_link_training() argument
765 writel(reg, dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL); in analogix_dp_set_lane2_link_training()
768 void analogix_dp_set_lane3_link_training(struct analogix_dp_device *dp, in analogix_dp_set_lane3_link_training() argument
774 writel(reg, dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL); in analogix_dp_set_lane3_link_training()
777 u32 analogix_dp_get_lane0_link_training(struct analogix_dp_device *dp) in analogix_dp_get_lane0_link_training() argument
779 return readl(dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL); in analogix_dp_get_lane0_link_training()
782 u32 analogix_dp_get_lane1_link_training(struct analogix_dp_device *dp) in analogix_dp_get_lane1_link_training() argument
784 return readl(dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL); in analogix_dp_get_lane1_link_training()
787 u32 analogix_dp_get_lane2_link_training(struct analogix_dp_device *dp) in analogix_dp_get_lane2_link_training() argument
789 return readl(dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL); in analogix_dp_get_lane2_link_training()
792 u32 analogix_dp_get_lane3_link_training(struct analogix_dp_device *dp) in analogix_dp_get_lane3_link_training() argument
794 return readl(dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL); in analogix_dp_get_lane3_link_training()
797 void analogix_dp_reset_macro(struct analogix_dp_device *dp) in analogix_dp_reset_macro() argument
801 reg = readl(dp->reg_base + ANALOGIX_DP_PHY_TEST); in analogix_dp_reset_macro()
803 writel(reg, dp->reg_base + ANALOGIX_DP_PHY_TEST); in analogix_dp_reset_macro()
809 writel(reg, dp->reg_base + ANALOGIX_DP_PHY_TEST); in analogix_dp_reset_macro()
812 void analogix_dp_init_video(struct analogix_dp_device *dp) in analogix_dp_init_video() argument
817 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_1); in analogix_dp_init_video()
820 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_1); in analogix_dp_init_video()
823 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_2); in analogix_dp_init_video()
826 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_init_video()
829 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_8); in analogix_dp_init_video()
832 void analogix_dp_set_video_color_format(struct analogix_dp_device *dp) in analogix_dp_set_video_color_format() argument
837 reg = (dp->video_info.dynamic_range << IN_D_RANGE_SHIFT) | in analogix_dp_set_video_color_format()
838 (dp->video_info.color_depth << IN_BPC_SHIFT) | in analogix_dp_set_video_color_format()
839 (dp->video_info.color_space << IN_COLOR_F_SHIFT); in analogix_dp_set_video_color_format()
840 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_2); in analogix_dp_set_video_color_format()
843 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_3); in analogix_dp_set_video_color_format()
845 if (dp->video_info.ycbcr_coeff) in analogix_dp_set_video_color_format()
849 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_3); in analogix_dp_set_video_color_format()
852 int analogix_dp_is_slave_video_stream_clock_on(struct analogix_dp_device *dp) in analogix_dp_is_slave_video_stream_clock_on() argument
856 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_1); in analogix_dp_is_slave_video_stream_clock_on()
857 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_1); in analogix_dp_is_slave_video_stream_clock_on()
859 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_1); in analogix_dp_is_slave_video_stream_clock_on()
862 dev_dbg(dp->dev, "Input stream clock not detected.\n"); in analogix_dp_is_slave_video_stream_clock_on()
866 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_2); in analogix_dp_is_slave_video_stream_clock_on()
867 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_2); in analogix_dp_is_slave_video_stream_clock_on()
869 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_2); in analogix_dp_is_slave_video_stream_clock_on()
870 dev_dbg(dp->dev, "wait SYS_CTL_2.\n"); in analogix_dp_is_slave_video_stream_clock_on()
873 dev_dbg(dp->dev, "Input stream clk is changing\n"); in analogix_dp_is_slave_video_stream_clock_on()
880 void analogix_dp_set_video_cr_mn(struct analogix_dp_device *dp, in analogix_dp_set_video_cr_mn() argument
887 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_set_video_cr_mn()
889 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_set_video_cr_mn()
891 writel(reg, dp->reg_base + ANALOGIX_DP_M_VID_0); in analogix_dp_set_video_cr_mn()
893 writel(reg, dp->reg_base + ANALOGIX_DP_M_VID_1); in analogix_dp_set_video_cr_mn()
895 writel(reg, dp->reg_base + ANALOGIX_DP_M_VID_2); in analogix_dp_set_video_cr_mn()
898 writel(reg, dp->reg_base + ANALOGIX_DP_N_VID_0); in analogix_dp_set_video_cr_mn()
900 writel(reg, dp->reg_base + ANALOGIX_DP_N_VID_1); in analogix_dp_set_video_cr_mn()
902 writel(reg, dp->reg_base + ANALOGIX_DP_N_VID_2); in analogix_dp_set_video_cr_mn()
904 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_set_video_cr_mn()
906 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_set_video_cr_mn()
908 writel(0x00, dp->reg_base + ANALOGIX_DP_N_VID_0); in analogix_dp_set_video_cr_mn()
909 writel(0x80, dp->reg_base + ANALOGIX_DP_N_VID_1); in analogix_dp_set_video_cr_mn()
910 writel(0x00, dp->reg_base + ANALOGIX_DP_N_VID_2); in analogix_dp_set_video_cr_mn()
914 void analogix_dp_set_video_timing_mode(struct analogix_dp_device *dp, u32 type) in analogix_dp_set_video_timing_mode() argument
919 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_set_video_timing_mode()
921 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_set_video_timing_mode()
923 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_set_video_timing_mode()
925 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_set_video_timing_mode()
929 void analogix_dp_enable_video_master(struct analogix_dp_device *dp, bool enable) in analogix_dp_enable_video_master() argument
934 reg = readl(dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL); in analogix_dp_enable_video_master()
937 writel(reg, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL); in analogix_dp_enable_video_master()
939 reg = readl(dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL); in analogix_dp_enable_video_master()
942 writel(reg, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL); in analogix_dp_enable_video_master()
946 void analogix_dp_start_video(struct analogix_dp_device *dp) in analogix_dp_start_video() argument
950 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_start_video()
952 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_start_video()
955 int analogix_dp_is_video_stream_on(struct analogix_dp_device *dp) in analogix_dp_is_video_stream_on() argument
959 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_is_video_stream_on()
960 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_is_video_stream_on()
962 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_is_video_stream_on()
964 dev_dbg(dp->dev, "Input video stream is not detected.\n"); in analogix_dp_is_video_stream_on()
971 void analogix_dp_config_video_slave_mode(struct analogix_dp_device *dp) in analogix_dp_config_video_slave_mode() argument
975 reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_1); in analogix_dp_config_video_slave_mode()
976 if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) { in analogix_dp_config_video_slave_mode()
982 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1); in analogix_dp_config_video_slave_mode()
984 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
986 reg |= (dp->video_info.interlaced << 2); in analogix_dp_config_video_slave_mode()
987 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
989 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
991 reg |= (dp->video_info.v_sync_polarity << 1); in analogix_dp_config_video_slave_mode()
992 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
994 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
996 reg |= (dp->video_info.h_sync_polarity << 0); in analogix_dp_config_video_slave_mode()
997 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
1000 writel(reg, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL); in analogix_dp_config_video_slave_mode()
1003 void analogix_dp_enable_scrambling(struct analogix_dp_device *dp) in analogix_dp_enable_scrambling() argument
1007 reg = readl(dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_enable_scrambling()
1009 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_enable_scrambling()
1012 void analogix_dp_disable_scrambling(struct analogix_dp_device *dp) in analogix_dp_disable_scrambling() argument
1016 reg = readl(dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_disable_scrambling()
1018 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_disable_scrambling()
1021 void analogix_dp_enable_psr_crc(struct analogix_dp_device *dp) in analogix_dp_enable_psr_crc() argument
1023 writel(PSR_VID_CRC_ENABLE, dp->reg_base + ANALOGIX_DP_CRC_CON); in analogix_dp_enable_psr_crc()
1026 static ssize_t analogix_dp_get_psr_status(struct analogix_dp_device *dp) in analogix_dp_get_psr_status() argument
1031 val = drm_dp_dpcd_readb(&dp->aux, DP_PSR_STATUS, &status); in analogix_dp_get_psr_status()
1033 dev_err(dp->dev, "PSR_STATUS read failed ret=%zd", val); in analogix_dp_get_psr_status()
1039 int analogix_dp_send_psr_spd(struct analogix_dp_device *dp, in analogix_dp_send_psr_spd() argument
1047 val = readl(dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL); in analogix_dp_send_psr_spd()
1049 writel(val, dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL); in analogix_dp_send_psr_spd()
1053 dp->reg_base + ANALOGIX_DP_PSR_FRAME_UPDATE_CTRL); in analogix_dp_send_psr_spd()
1056 writel(vsc->sdp_header.HB0, dp->reg_base + ANALOGIX_DP_SPD_HB0); in analogix_dp_send_psr_spd()
1057 writel(vsc->sdp_header.HB1, dp->reg_base + ANALOGIX_DP_SPD_HB1); in analogix_dp_send_psr_spd()
1058 writel(vsc->sdp_header.HB2, dp->reg_base + ANALOGIX_DP_SPD_HB2); in analogix_dp_send_psr_spd()
1059 writel(vsc->sdp_header.HB3, dp->reg_base + ANALOGIX_DP_SPD_HB3); in analogix_dp_send_psr_spd()
1062 writel(0x00, dp->reg_base + ANALOGIX_DP_SPD_PB0); in analogix_dp_send_psr_spd()
1063 writel(0x16, dp->reg_base + ANALOGIX_DP_SPD_PB1); in analogix_dp_send_psr_spd()
1064 writel(0xCE, dp->reg_base + ANALOGIX_DP_SPD_PB2); in analogix_dp_send_psr_spd()
1065 writel(0x5D, dp->reg_base + ANALOGIX_DP_SPD_PB3); in analogix_dp_send_psr_spd()
1068 writel(vsc->db[0], dp->reg_base + ANALOGIX_DP_VSC_SHADOW_DB0); in analogix_dp_send_psr_spd()
1069 writel(vsc->db[1], dp->reg_base + ANALOGIX_DP_VSC_SHADOW_DB1); in analogix_dp_send_psr_spd()
1072 val = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_3); in analogix_dp_send_psr_spd()
1074 writel(val, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_3); in analogix_dp_send_psr_spd()
1077 val = readl(dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL); in analogix_dp_send_psr_spd()
1079 writel(val, dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL); in analogix_dp_send_psr_spd()
1082 val = readl(dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL); in analogix_dp_send_psr_spd()
1084 writel(val, dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL); in analogix_dp_send_psr_spd()
1089 ret = readx_poll_timeout(analogix_dp_get_psr_status, dp, psr_status, in analogix_dp_send_psr_spd()
1095 dev_warn(dp->dev, "Failed to apply PSR %d\n", ret); in analogix_dp_send_psr_spd()
1101 ssize_t analogix_dp_transfer(struct analogix_dp_device *dp, in analogix_dp_transfer() argument
1117 writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL); in analogix_dp_transfer()
1145 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1); in analogix_dp_transfer()
1149 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0); in analogix_dp_transfer()
1151 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8); in analogix_dp_transfer()
1153 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16); in analogix_dp_transfer()
1158 writel(reg, dp->reg_base + ANALOGIX_DP_BUF_DATA_0 + in analogix_dp_transfer()
1171 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2); in analogix_dp_transfer()
1173 ret = readx_poll_timeout(readl, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2, in analogix_dp_transfer()
1176 dev_err(dp->dev, "AUX CH enable timeout!\n"); in analogix_dp_transfer()
1182 ret = readx_poll_timeout(readl, dp->reg_base + ANALOGIX_DP_INT_STA, in analogix_dp_transfer()
1185 dev_err(dp->dev, "AUX CH cmd reply timeout!\n"); in analogix_dp_transfer()
1190 writel(RPLY_RECEIV, dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_transfer()
1193 reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_transfer()
1194 status_reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_STA); in analogix_dp_transfer()
1196 writel(AUX_ERR, dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_transfer()
1198 dev_warn(dp->dev, "AUX CH error happened: %#x (%d)\n", in analogix_dp_transfer()
1205 reg = readl(dp->reg_base + ANALOGIX_DP_BUF_DATA_0 + in analogix_dp_transfer()
1213 reg = readl(dp->reg_base + ANALOGIX_DP_AUX_RX_COMM); in analogix_dp_transfer()
1229 analogix_dp_init_aux(dp); in analogix_dp_transfer()