Lines Matching +full:2 +full:v
79 addr = offset + (i << 2); in get_values_from_reg()
194 if (info->num_planes > 2) in d71_layer_update_fb()
195 malidp_write64(reg, BLK_P2_PTR_LOW, addr[2]); in d71_layer_update_fb()
288 u32 v[15], i; in d71_layer_dump() local
292 get_values_from_reg(c->reg, LAYER_INFO, 1, &v[14]); in d71_layer_dump()
293 if (v[14] & 0x1) { in d71_layer_dump()
301 rgb2rgb = !!(v[14] & L_INFO_CM); in d71_layer_dump()
305 seq_printf(sf, "%sLAYER_INFO:\t\t0x%X\n", prefix, v[14]); in d71_layer_dump()
307 get_values_from_reg(c->reg, 0xD0, 1, v); in d71_layer_dump()
308 seq_printf(sf, "%sCONTROL:\t\t0x%X\n", prefix, v[0]); in d71_layer_dump()
310 get_values_from_reg(c->reg, 0xD4, 1, v); in d71_layer_dump()
311 seq_printf(sf, "LR_RICH_CONTROL:\t0x%X\n", v[0]); in d71_layer_dump()
313 get_values_from_reg(c->reg, 0xD8, 4, v); in d71_layer_dump()
314 seq_printf(sf, "%sFORMAT:\t\t0x%X\n", prefix, v[0]); in d71_layer_dump()
315 seq_printf(sf, "%sIT_COEFFTAB:\t\t0x%X\n", prefix, v[1]); in d71_layer_dump()
316 seq_printf(sf, "%sIN_SIZE:\t\t0x%X\n", prefix, v[2]); in d71_layer_dump()
317 seq_printf(sf, "%sPALPHA:\t\t0x%X\n", prefix, v[3]); in d71_layer_dump()
319 get_values_from_reg(c->reg, 0x100, 3, v); in d71_layer_dump()
320 seq_printf(sf, "%sP0_PTR_LOW:\t\t0x%X\n", prefix, v[0]); in d71_layer_dump()
321 seq_printf(sf, "%sP0_PTR_HIGH:\t\t0x%X\n", prefix, v[1]); in d71_layer_dump()
322 seq_printf(sf, "%sP0_STRIDE:\t\t0x%X\n", prefix, v[2]); in d71_layer_dump()
324 get_values_from_reg(c->reg, 0x110, 2, v); in d71_layer_dump()
325 seq_printf(sf, "%sP1_PTR_LOW:\t\t0x%X\n", prefix, v[0]); in d71_layer_dump()
326 seq_printf(sf, "%sP1_PTR_HIGH:\t\t0x%X\n", prefix, v[1]); in d71_layer_dump()
328 get_values_from_reg(c->reg, 0x118, 1, v); in d71_layer_dump()
329 seq_printf(sf, "LR_P1_STRIDE:\t\t0x%X\n", v[0]); in d71_layer_dump()
331 get_values_from_reg(c->reg, 0x120, 2, v); in d71_layer_dump()
332 seq_printf(sf, "LR_P2_PTR_LOW:\t\t0x%X\n", v[0]); in d71_layer_dump()
333 seq_printf(sf, "LR_P2_PTR_HIGH:\t\t0x%X\n", v[1]); in d71_layer_dump()
335 get_values_from_reg(c->reg, 0x130, 12, v); in d71_layer_dump()
337 seq_printf(sf, "LR_YUV_RGB_COEFF%u:\t0x%X\n", i, v[i]); in d71_layer_dump()
341 get_values_from_reg(c->reg, LAYER_RGB_RGB_COEFF0, 12, v); in d71_layer_dump()
343 seq_printf(sf, "LS_RGB_RGB_COEFF%u:\t0x%X\n", i, v[i]); in d71_layer_dump()
346 get_values_from_reg(c->reg, 0x160, 3, v); in d71_layer_dump()
347 seq_printf(sf, "%sAD_CONTROL:\t\t0x%X\n", prefix, v[0]); in d71_layer_dump()
348 seq_printf(sf, "%sAD_H_CROP:\t\t0x%X\n", prefix, v[1]); in d71_layer_dump()
349 seq_printf(sf, "%sAD_V_CROP:\t\t0x%X\n", prefix, v[2]); in d71_layer_dump()
376 max_line_sz = layer->line_sz / 2; in d71_layer_validate()
441 layer->yuv_line_sz = layer->line_sz / 2; in d71_layer_init()
443 /* D71 2K */ in d71_layer_init()
446 layer->line_sz = d71->max_line_size * 2; in d71_layer_init()
447 layer->yuv_line_sz = layer->line_sz / 2; in d71_layer_init()
486 u32 v[12], i; in d71_wb_layer_dump() local
490 get_values_from_reg(c->reg, 0x80, 1, v); in d71_wb_layer_dump()
491 seq_printf(sf, "LW_INPUT_ID0:\t\t0x%X\n", v[0]); in d71_wb_layer_dump()
493 get_values_from_reg(c->reg, 0xD0, 3, v); in d71_wb_layer_dump()
494 seq_printf(sf, "LW_CONTROL:\t\t0x%X\n", v[0]); in d71_wb_layer_dump()
495 seq_printf(sf, "LW_PROG_LINE:\t\t0x%X\n", v[1]); in d71_wb_layer_dump()
496 seq_printf(sf, "LW_FORMAT:\t\t0x%X\n", v[2]); in d71_wb_layer_dump()
498 get_values_from_reg(c->reg, 0xE0, 1, v); in d71_wb_layer_dump()
499 seq_printf(sf, "LW_IN_SIZE:\t\t0x%X\n", v[0]); in d71_wb_layer_dump()
501 for (i = 0; i < 2; i++) { in d71_wb_layer_dump()
502 get_values_from_reg(c->reg, 0x100 + i * 0x10, 3, v); in d71_wb_layer_dump()
503 seq_printf(sf, "LW_P%u_PTR_LOW:\t\t0x%X\n", i, v[0]); in d71_wb_layer_dump()
504 seq_printf(sf, "LW_P%u_PTR_HIGH:\t\t0x%X\n", i, v[1]); in d71_wb_layer_dump()
505 seq_printf(sf, "LW_P%u_STRIDE:\t\t0x%X\n", i, v[2]); in d71_wb_layer_dump()
508 get_values_from_reg(c->reg, 0x130, 12, v); in d71_wb_layer_dump()
510 seq_printf(sf, "LW_RGB_YUV_COEFF%u:\t0x%X\n", i, v[i]); in d71_wb_layer_dump()
563 malidp_write32(reg, BLK_INPUT_ID0 + (i << 2), 0); in d71_component_disable()
626 u32 v[8], i; in d71_compiz_dump() local
630 get_values_from_reg(c->reg, 0x80, 5, v); in d71_compiz_dump()
632 seq_printf(sf, "CU_INPUT_ID%u:\t\t0x%X\n", i, v[i]); in d71_compiz_dump()
634 get_values_from_reg(c->reg, 0xA0, 5, v); in d71_compiz_dump()
635 seq_printf(sf, "CU_IRQ_RAW_STATUS:\t0x%X\n", v[0]); in d71_compiz_dump()
636 seq_printf(sf, "CU_IRQ_CLEAR:\t\t0x%X\n", v[1]); in d71_compiz_dump()
637 seq_printf(sf, "CU_IRQ_MASK:\t\t0x%X\n", v[2]); in d71_compiz_dump()
638 seq_printf(sf, "CU_IRQ_STATUS:\t\t0x%X\n", v[3]); in d71_compiz_dump()
639 seq_printf(sf, "CU_STATUS:\t\t0x%X\n", v[4]); in d71_compiz_dump()
641 get_values_from_reg(c->reg, 0xD0, 2, v); in d71_compiz_dump()
642 seq_printf(sf, "CU_CONTROL:\t\t0x%X\n", v[0]); in d71_compiz_dump()
643 seq_printf(sf, "CU_SIZE:\t\t0x%X\n", v[1]); in d71_compiz_dump()
645 get_values_from_reg(c->reg, 0xDC, 1, v); in d71_compiz_dump()
646 seq_printf(sf, "CU_BG_COLOR:\t\t0x%X\n", v[0]); in d71_compiz_dump()
648 for (i = 0, v[4] = 0xE0; i < 5; i++, v[4] += 0x10) { in d71_compiz_dump()
649 get_values_from_reg(c->reg, v[4], 3, v); in d71_compiz_dump()
650 seq_printf(sf, "CU_INPUT%u_SIZE:\t\t0x%X\n", i, v[0]); in d71_compiz_dump()
651 seq_printf(sf, "CU_INPUT%u_OFFSET:\t0x%X\n", i, v[1]); in d71_compiz_dump()
652 seq_printf(sf, "CU_INPUT%u_CONTROL:\t0x%X\n", i, v[2]); in d71_compiz_dump()
655 get_values_from_reg(c->reg, 0x130, 2, v); in d71_compiz_dump()
656 seq_printf(sf, "CU_USER_LOW:\t\t0x%X\n", v[0]); in d71_compiz_dump()
657 seq_printf(sf, "CU_USER_HIGH:\t\t0x%X\n", v[1]); in d71_compiz_dump()
701 else if (hsize_in <= (hsize_out + hsize_out / 2)) in d71_scaler_update_filter_lut()
703 else if (hsize_in <= hsize_out * 2) in d71_scaler_update_filter_lut()
705 else if (hsize_in <= hsize_out * 2 + (hsize_out * 3) / 4) in d71_scaler_update_filter_lut()
712 else if (vsize_in <= (vsize_out + vsize_out / 2)) in d71_scaler_update_filter_lut()
714 else if (vsize_in <= vsize_out * 2) in d71_scaler_update_filter_lut()
716 else if (vsize_in <= vsize_out * 2 + vsize_out * 3 / 4) in d71_scaler_update_filter_lut()
762 init_ph = ((st->total_hsize_in * (2 * dst_a + 1) - in d71_scaler_update()
763 2 * st->total_hsize_out * (st->total_hsize_in - in d71_scaler_update()
795 u32 v[10]; in d71_scaler_dump() local
799 get_values_from_reg(c->reg, 0x80, 1, v); in d71_scaler_dump()
800 seq_printf(sf, "SC_INPUT_ID0:\t\t0x%X\n", v[0]); in d71_scaler_dump()
802 get_values_from_reg(c->reg, 0xD0, 1, v); in d71_scaler_dump()
803 seq_printf(sf, "SC_CONTROL:\t\t0x%X\n", v[0]); in d71_scaler_dump()
805 get_values_from_reg(c->reg, 0xDC, 9, v); in d71_scaler_dump()
806 seq_printf(sf, "SC_COEFFTAB:\t\t0x%X\n", v[0]); in d71_scaler_dump()
807 seq_printf(sf, "SC_IN_SIZE:\t\t0x%X\n", v[1]); in d71_scaler_dump()
808 seq_printf(sf, "SC_OUT_SIZE:\t\t0x%X\n", v[2]); in d71_scaler_dump()
809 seq_printf(sf, "SC_H_CROP:\t\t0x%X\n", v[3]); in d71_scaler_dump()
810 seq_printf(sf, "SC_V_CROP:\t\t0x%X\n", v[4]); in d71_scaler_dump()
811 seq_printf(sf, "SC_H_INIT_PH:\t\t0x%X\n", v[5]); in d71_scaler_dump()
812 seq_printf(sf, "SC_H_DELTA_PH:\t\t0x%X\n", v[6]); in d71_scaler_dump()
813 seq_printf(sf, "SC_V_INIT_PH:\t\t0x%X\n", v[7]); in d71_scaler_dump()
814 seq_printf(sf, "SC_V_DELTA_PH:\t\t0x%X\n", v[8]); in d71_scaler_dump()
816 get_values_from_reg(c->reg, 0x130, 10, v); in d71_scaler_dump()
817 seq_printf(sf, "SC_ENH_LIMITS:\t\t0x%X\n", v[0]); in d71_scaler_dump()
818 seq_printf(sf, "SC_ENH_COEFF0:\t\t0x%X\n", v[1]); in d71_scaler_dump()
819 seq_printf(sf, "SC_ENH_COEFF1:\t\t0x%X\n", v[2]); in d71_scaler_dump()
820 seq_printf(sf, "SC_ENH_COEFF2:\t\t0x%X\n", v[3]); in d71_scaler_dump()
821 seq_printf(sf, "SC_ENH_COEFF3:\t\t0x%X\n", v[4]); in d71_scaler_dump()
822 seq_printf(sf, "SC_ENH_COEFF4:\t\t0x%X\n", v[5]); in d71_scaler_dump()
823 seq_printf(sf, "SC_ENH_COEFF5:\t\t0x%X\n", v[6]); in d71_scaler_dump()
824 seq_printf(sf, "SC_ENH_COEFF6:\t\t0x%X\n", v[7]); in d71_scaler_dump()
825 seq_printf(sf, "SC_ENH_COEFF7:\t\t0x%X\n", v[8]); in d71_scaler_dump()
826 seq_printf(sf, "SC_ENH_COEFF8:\t\t0x%X\n", v[9]); in d71_scaler_dump()
883 * PXLCLK (h_total - (1 + 2 * v_in / v_out)) * v_out in d71_downscaling_clk_check()
896 * PXLCLK (h_total -1 ) * v_out - 2 * v_in in d71_downscaling_clk_check()
903 denominator = (mode->htotal - 1) * v_out - 2 * v_in; in d71_downscaling_clk_check()
924 u32 v[3]; in d71_splitter_dump() local
928 get_values_from_reg(c->reg, BLK_INPUT_ID0, 1, v); in d71_splitter_dump()
929 seq_printf(sf, "SP_INPUT_ID0:\t\t0x%X\n", v[0]); in d71_splitter_dump()
931 get_values_from_reg(c->reg, BLK_CONTROL, 3, v); in d71_splitter_dump()
932 seq_printf(sf, "SP_CONTROL:\t\t0x%X\n", v[0]); in d71_splitter_dump()
933 seq_printf(sf, "SP_SIZE:\t\t0x%X\n", v[1]); in d71_splitter_dump()
934 seq_printf(sf, "SP_OVERLAP_SIZE:\t0x%X\n", v[2]); in d71_splitter_dump()
956 1, get_valid_inputs(blk), 2, reg, in d71_splitter_init()
990 u32 v; in d71_merger_dump() local
994 get_values_from_reg(c->reg, MG_INPUT_ID0, 1, &v); in d71_merger_dump()
995 seq_printf(sf, "MG_INPUT_ID0:\t\t0x%X\n", v); in d71_merger_dump()
997 get_values_from_reg(c->reg, MG_INPUT_ID1, 1, &v); in d71_merger_dump()
998 seq_printf(sf, "MG_INPUT_ID1:\t\t0x%X\n", v); in d71_merger_dump()
1000 get_values_from_reg(c->reg, BLK_CONTROL, 1, &v); in d71_merger_dump()
1001 seq_printf(sf, "MG_CONTROL:\t\t0x%X\n", v); in d71_merger_dump()
1003 get_values_from_reg(c->reg, MG_SIZE, 1, &v); in d71_merger_dump()
1004 seq_printf(sf, "MG_SIZE:\t\t0x%X\n", v); in d71_merger_dump()
1093 u32 v[12], i; in d71_improc_dump() local
1097 get_values_from_reg(c->reg, 0x80, 2, v); in d71_improc_dump()
1098 seq_printf(sf, "IPS_INPUT_ID0:\t\t0x%X\n", v[0]); in d71_improc_dump()
1099 seq_printf(sf, "IPS_INPUT_ID1:\t\t0x%X\n", v[1]); in d71_improc_dump()
1101 get_values_from_reg(c->reg, 0xC0, 1, v); in d71_improc_dump()
1102 seq_printf(sf, "IPS_INFO:\t\t0x%X\n", v[0]); in d71_improc_dump()
1104 get_values_from_reg(c->reg, 0xD0, 3, v); in d71_improc_dump()
1105 seq_printf(sf, "IPS_CONTROL:\t\t0x%X\n", v[0]); in d71_improc_dump()
1106 seq_printf(sf, "IPS_SIZE:\t\t0x%X\n", v[1]); in d71_improc_dump()
1107 seq_printf(sf, "IPS_DEPTH:\t\t0x%X\n", v[2]); in d71_improc_dump()
1109 get_values_from_reg(c->reg, 0x130, 12, v); in d71_improc_dump()
1111 seq_printf(sf, "IPS_RGB_RGB_COEFF%u:\t0x%X\n", i, v[i]); in d71_improc_dump()
1113 get_values_from_reg(c->reg, 0x170, 12, v); in d71_improc_dump()
1115 seq_printf(sf, "IPS_RGB_YUV_COEFF%u:\t0x%X\n", i, v[i]); in d71_improc_dump()
1211 u32 v[8], i; in d71_timing_ctrlr_dump() local
1215 get_values_from_reg(c->reg, 0xC0, 1, v); in d71_timing_ctrlr_dump()
1216 seq_printf(sf, "BS_INFO:\t\t0x%X\n", v[0]); in d71_timing_ctrlr_dump()
1218 get_values_from_reg(c->reg, 0xD0, 8, v); in d71_timing_ctrlr_dump()
1219 seq_printf(sf, "BS_CONTROL:\t\t0x%X\n", v[0]); in d71_timing_ctrlr_dump()
1220 seq_printf(sf, "BS_PROG_LINE:\t\t0x%X\n", v[1]); in d71_timing_ctrlr_dump()
1221 seq_printf(sf, "BS_PREFETCH_LINE:\t0x%X\n", v[2]); in d71_timing_ctrlr_dump()
1222 seq_printf(sf, "BS_BG_COLOR:\t\t0x%X\n", v[3]); in d71_timing_ctrlr_dump()
1223 seq_printf(sf, "BS_ACTIVESIZE:\t\t0x%X\n", v[4]); in d71_timing_ctrlr_dump()
1224 seq_printf(sf, "BS_HINTERVALS:\t\t0x%X\n", v[5]); in d71_timing_ctrlr_dump()
1225 seq_printf(sf, "BS_VINTERVALS:\t\t0x%X\n", v[6]); in d71_timing_ctrlr_dump()
1226 seq_printf(sf, "BS_SYNC:\t\t0x%X\n", v[7]); in d71_timing_ctrlr_dump()
1228 get_values_from_reg(c->reg, 0x100, 3, v); in d71_timing_ctrlr_dump()
1229 seq_printf(sf, "BS_DRIFT_TO:\t\t0x%X\n", v[0]); in d71_timing_ctrlr_dump()
1230 seq_printf(sf, "BS_FRAME_TO:\t\t0x%X\n", v[1]); in d71_timing_ctrlr_dump()
1231 seq_printf(sf, "BS_TE_TO:\t\t0x%X\n", v[2]); in d71_timing_ctrlr_dump()
1233 get_values_from_reg(c->reg, 0x110, 3, v); in d71_timing_ctrlr_dump()
1235 seq_printf(sf, "BS_T%u_INTERVAL:\t\t0x%X\n", i, v[i]); in d71_timing_ctrlr_dump()
1237 get_values_from_reg(c->reg, 0x120, 5, v); in d71_timing_ctrlr_dump()
1238 for (i = 0; i < 2; i++) { in d71_timing_ctrlr_dump()
1239 seq_printf(sf, "BS_CRC%u_LOW:\t\t0x%X\n", i, v[i << 1]); in d71_timing_ctrlr_dump()
1240 seq_printf(sf, "BS_CRC%u_HIGH:\t\t0x%X\n", i, v[(i << 1) + 1]); in d71_timing_ctrlr_dump()
1242 seq_printf(sf, "BS_USER:\t\t0x%X\n", v[4]); in d71_timing_ctrlr_dump()
1358 u32 v[5]; in d71_gcu_dump() local
1362 get_values_from_reg(d71->gcu_addr, 0, 3, v); in d71_gcu_dump()
1363 seq_printf(sf, "GLB_ARCH_ID:\t\t0x%X\n", v[0]); in d71_gcu_dump()
1364 seq_printf(sf, "GLB_CORE_ID:\t\t0x%X\n", v[1]); in d71_gcu_dump()
1365 seq_printf(sf, "GLB_CORE_INFO:\t\t0x%X\n", v[2]); in d71_gcu_dump()
1367 get_values_from_reg(d71->gcu_addr, 0x10, 1, v); in d71_gcu_dump()
1368 seq_printf(sf, "GLB_IRQ_STATUS:\t\t0x%X\n", v[0]); in d71_gcu_dump()
1370 get_values_from_reg(d71->gcu_addr, 0xA0, 5, v); in d71_gcu_dump()
1371 seq_printf(sf, "GCU_IRQ_RAW_STATUS:\t0x%X\n", v[0]); in d71_gcu_dump()
1372 seq_printf(sf, "GCU_IRQ_CLEAR:\t\t0x%X\n", v[1]); in d71_gcu_dump()
1373 seq_printf(sf, "GCU_IRQ_MASK:\t\t0x%X\n", v[2]); in d71_gcu_dump()
1374 seq_printf(sf, "GCU_IRQ_STATUS:\t\t0x%X\n", v[3]); in d71_gcu_dump()
1375 seq_printf(sf, "GCU_STATUS:\t\t0x%X\n", v[4]); in d71_gcu_dump()
1377 get_values_from_reg(d71->gcu_addr, 0xD0, 3, v); in d71_gcu_dump()
1378 seq_printf(sf, "GCU_CONTROL:\t\t0x%X\n", v[0]); in d71_gcu_dump()
1379 seq_printf(sf, "GCU_CONFIG_VALID0:\t0x%X\n", v[1]); in d71_gcu_dump()
1380 seq_printf(sf, "GCU_CONFIG_VALID1:\t0x%X\n", v[2]); in d71_gcu_dump()
1385 u32 v[6]; in d71_lpu_dump() local
1391 get_values_from_reg(pipe->lpu_addr, 0xA0, 6, v); in d71_lpu_dump()
1392 seq_printf(sf, "LPU_IRQ_RAW_STATUS:\t0x%X\n", v[0]); in d71_lpu_dump()
1393 seq_printf(sf, "LPU_IRQ_CLEAR:\t\t0x%X\n", v[1]); in d71_lpu_dump()
1394 seq_printf(sf, "LPU_IRQ_MASK:\t\t0x%X\n", v[2]); in d71_lpu_dump()
1395 seq_printf(sf, "LPU_IRQ_STATUS:\t\t0x%X\n", v[3]); in d71_lpu_dump()
1396 seq_printf(sf, "LPU_STATUS:\t\t0x%X\n", v[4]); in d71_lpu_dump()
1397 seq_printf(sf, "LPU_TBU_STATUS:\t\t0x%X\n", v[5]); in d71_lpu_dump()
1399 get_values_from_reg(pipe->lpu_addr, 0xC0, 1, v); in d71_lpu_dump()
1400 seq_printf(sf, "LPU_INFO:\t\t0x%X\n", v[0]); in d71_lpu_dump()
1402 get_values_from_reg(pipe->lpu_addr, 0xD0, 3, v); in d71_lpu_dump()
1403 seq_printf(sf, "LPU_RAXI_CONTROL:\t0x%X\n", v[0]); in d71_lpu_dump()
1404 seq_printf(sf, "LPU_WAXI_CONTROL:\t0x%X\n", v[1]); in d71_lpu_dump()
1405 seq_printf(sf, "LPU_TBU_CONTROL:\t0x%X\n", v[2]); in d71_lpu_dump()
1410 u32 v[5]; in d71_dou_dump() local
1416 get_values_from_reg(pipe->dou_addr, 0xA0, 5, v); in d71_dou_dump()
1417 seq_printf(sf, "DOU_IRQ_RAW_STATUS:\t0x%X\n", v[0]); in d71_dou_dump()
1418 seq_printf(sf, "DOU_IRQ_CLEAR:\t\t0x%X\n", v[1]); in d71_dou_dump()
1419 seq_printf(sf, "DOU_IRQ_MASK:\t\t0x%X\n", v[2]); in d71_dou_dump()
1420 seq_printf(sf, "DOU_IRQ_STATUS:\t\t0x%X\n", v[3]); in d71_dou_dump()
1421 seq_printf(sf, "DOU_STATUS:\t\t0x%X\n", v[4]); in d71_dou_dump()