Lines Matching full:enum
38 enum atom_bios_header_version_def{
57 enum atom_crtc_def{
67 enum atom_ppll_def{
82 enum atom_dig_def{
93 enum atom_encode_mode_def
106 enum atom_encoder_refclk_src_def{
114 enum atom_scaler_def{
120 enum atom_operation_def{
127 enum atom_embedded_display_op_def{
135 enum atom_spread_spectrum_mode{
145 enum atom_panel_bit_per_color{
155 enum atom_voltage_type
180 enum atom_dgpu_vram_type {
186 enum atom_dp_vs_preemph_def{
201 enum atom_string_def{
210 enum atombios_image_offset{
238 …uint8_t atom_bios_string[4]; //enum atom_string_def atom_bios_string; //Signature to d…
449 enum atom_dtd_format_modemiscinfo{
477 uint32_t firmware_capability; // enum atombios_firmware_capability
493 enum atombios_firmware_capability
504 enum atom_cooling_solution_id{
514 uint32_t firmware_capability; // enum atombios_firmware_capability
526 uint8_t board_i2c_feature_id; // enum of atom_board_i2c_feature_id_def
542 uint32_t firmware_capability; // enum atombios_firmware_capability
554 uint8_t board_i2c_feature_id; // enum of atom_board_i2c_feature_id_def
570 uint32_t firmware_capability; // enum atombios_firmware_capability
582 uint8_t board_i2c_feature_id; // enum of atom_board_i2c_feature_id_def
637 enum atom_lcd_info_panel_misc{
642 enum atom_lcd_info_dptolvds_rx_id
666 enum atom_gpio_pin_assignment_gpio_id {
718 enum atom_object_record_type_id
752 enum atom_encoder_caps_def
768 enum atom_connector_caps_def
796 enum atom_gpio_pin_control_pinstate_def
811 enum atom_glsync_record_gpio_index_def
854 enum atom_connector_layout_info_connector_type_def
873 enum atom_display_device_tag_def{
925 uint8_t dvi_ss_mode; // enum of atom_spread_spectrum_mode
926 uint8_t hdmi_ss_mode; // enum of atom_spread_spectrum_mode
927 uint8_t dp_ss_mode; // enum of atom_spread_spectrum_mode
957 uint8_t dvi_ss_mode; // enum of atom_spread_spectrum_mode
958 uint8_t hdmi_ss_mode; // enum of atom_spread_spectrum_mode
959 uint8_t dp_ss_mode; // enum of atom_spread_spectrum_mode
990 uint8_t dvi_ss_mode; // enum of atom_spread_spectrum_mode
991 uint8_t hdmi_ss_mode; // enum of atom_spread_spectrum_mode
992 uint8_t dp_ss_mode; // enum of atom_spread_spectrum_mode
1032 enum dce_info_caps_def
1063 enum ext_display_path_cap_def {
1138 uint8_t dp_vs_pemph_level; //enum of atom_dp_vs_preemph_def
1185 uint8_t dp_vs_pemph_level; //enum of atom_dp_vs_preemph_def
1216 uint32_t vbios_misc; //enum of atom_system_vbiosmisc_def
1217 uint32_t gpucapinfo; //enum of atom_system_gpucapinf_def
1228 uint16_t dpphy_override; // bit vector, enum of atom_sysinfo_dpphy_override_def
1229 uint16_t lvds_misc; // enum of atom_sys_info_lvds_misc_def
1231 …uint8_t memorytype; // enum of atom_dmi_t17_mem_type_def, APU memory type …
1265 uint32_t vbios_misc; //enum of atom_system_vbiosmisc_def
1266 uint32_t gpucapinfo; //enum of atom_system_gpucapinf_def
1277 uint16_t dpphy_override; // bit vector, enum of atom_sysinfo_dpphy_override_def
1278 uint16_t lvds_misc; // enum of atom_sys_info_lvds_misc_def
1280 …uint8_t memorytype; // enum of atom_dmi_t17_mem_type_def, APU memory type …
1313 enum atom_system_vbiosmisc_def{
1319 enum atom_system_gpucapinf_def{
1324 enum atom_sysinfo_dpphy_override_def{
1333 enum atom_sys_info_lvds_misc_def
1342 enum atom_dmi_t17_mem_type_def{
1479 uint8_t gpuclk_ss_mode; // enum of atom_spread_spectrum_mode
1830 enum smudpm_v4_5_i2ccontrollername_e{
1842 enum smudpm_v4_5_i2ccontrollerthrottler_e{
1854 enum smudpm_v4_5_i2ccontrollerprotocol_e{
2424 uint8_t vram_type; //enum of atom_dgpu_vram_type
2430 enum atom_umc_config_def {
2451 uint8_t vram_type; //enum of atom_dgpu_vram_type
2471 uint8_t vram_type; //enum of atom_dgpu_vram_type
2494 uint8_t memory_type; // enum of atom_dgpu_vram_type
2530 enum atom_umc_register_addr_info_flag{
2572 uint8_t memory_type; // enum of atom_dgpu_vram_type
2612 uint8_t memory_type; // enum of atom_dgpu_vram_type
2741 uint8_t voltage_type; //enum atom_voltage_type
2742 uint8_t voltage_mode; //enum atom_voltage_object_mode
2747 enum atom_voltage_object_mode
2771 enum atom_i2c_voltage_control_flag
2810 uint8_t merged_powerrail_type; //enum atom_voltage_type
2843 uint32_t engineflag:8; /* enum atom_asic_init_engine_flag */
2849 uint32_t memflag:8; /* enum atom_asic_init_mem_flag */
2865 enum atom_asic_init_engine_flag
2872 enum atom_asic_init_mem_flag
2887 uint32_t sclkflag:8; /* enum atom_set_engine_mem_clock_flag, */
2898 enum atom_set_engine_mem_clock_flag
2924 uint32_t mclkflag:8; /* enum atom_set_engine_mem_clock_flag, */
2956 uint8_t voltagetype; /* enum atom_voltage_type */
2957 …uint8_t command; /* Indicate action: Set voltage level, enum atom_set_voltage_…
2962 enum atom_set_voltage_command{
2983 enum atom_gpu_clock_type
2993 uint32_t gpu_clock_type:8; //Input indicate clock type: enum atom_gpu_clock_type
3042 uint8_t command; // enum of atom_get_smu_clock_info_command
3046 enum atom_get_smu_clock_info_command
3053 enum atom_smu9_syspll0_clock_id
3068 enum atom_smu11_syspll_id {
3078 enum atom_smu11_syspll0_clock_id {
3087 enum atom_smu11_syspll1_0_clock_id {
3091 enum atom_smu11_syspll1_1_clock_id {
3095 enum atom_smu11_syspll1_2_clock_id {
3099 enum atom_smu11_syspll2_clock_id {
3103 enum atom_smu11_syspll3_0_clock_id {
3109 enum atom_smu11_syspll3_1_clock_id {
3132 enum atom_dynamic_memory_setting_command
3143 uint32_t command:8; //command enum of atom_dynamic_memory_setting_command
3151 uint32_t command:8; //command enum of atom_dynamic_memory_setting_command
3170 enum atom_umc6_0_ucode_function_call_enum_id
3200 uint8_t miscinfo; // enum atom_set_pixel_clock_v1_7_misc_info
3201 uint8_t crtc_id; // enum of atom_crtc_def
3202 …uint8_t deep_color_ratio; // HDMI panel bit depth: enum atom_set_pixel_clock_v1_7_deepc…
3208 enum atom_set_pixel_clock_v1_7_misc_info
3224 enum atom_set_pixel_clock_v1_7_deepcolor_ratio
3249 enum atom_set_dce_clock_clock_type
3257 enum atom_set_dce_clock_dprefclk_flag
3267 enum atom_set_dce_clock_pixclk_flag
3289 uint8_t crtc_id; // enum atom_crtc_def
3290 uint8_t blanking; // enum atom_blank_crtc_command
3295 enum atom_blank_crtc_command
3306 uint8_t crtc_id; // enum atom_crtc_def
3344 uint8_t crtc_id; // enum atom_crtc_def
3358 uint8_t status; /* enum atom_process_i2c_flag */
3361 uint8_t flag; /* enum atom_process_i2c_status */
3368 enum atom_process_i2c_flag
3377 enum atom_process_i2c_status
3408 uint8_t crtc_id; // enum atom_crtc_def
3409 uint8_t encoder_id; // enum atom_dig_def
3410 uint8_t encode_mode; // enum atom_encode_mode_def
3411 uint8_t dst_bpc; // enum atom_panel_bit_per_color
3420 enum atom_dig_encoder_control_action
3439 enum atom_dig_encoder_control_panelmode
3447 enum atom_dig_encoder_control_v5_digid
3461 uint8_t digid; // 0~6 map to DIG0~DIG6 enum atom_dig_encoder_control_v5_digid
3473 uint8_t digid; // 0~6 map to DIG0~DIG6 enum atom_dig_encoder_control_v5_digid
3485 uint8_t digid; // 0~6 map to DIG0~DIG6 enum atom_dig_encoder_control_v5_digid
3487 uint8_t panelmode; // enum atom_dig_encoder_control_panelmode
3494 uint8_t digid; // 0~6 map to DIG0~DIG6 enum atom_dig_encoder_control_v5_digid
3518 uint8_t digmode; // enum atom_encode_mode_def
3537 enum atom_dig_transmitter_control_action
3556 enum atom_dig_transmitter_control_digfe_sel
3569 enum atom_dig_transmitter_control_hpd_sel
3581 enum atom_dig_transmitter_control_dplaneset
3614 enum external_encoder_control_action_def
3627 enum external_encoder_control_v2_4_config_def
3707 enum scratch_register_def{
3719 enum scratch_device_connect_info_bit_def{
3731 enum scratch_bl_bri_level_info_bit_def{
3739 enum scratch_active_info_bits_def{
3750 enum scratch_device_req_info_bits_def{
3761 enum scratch_acc_change_info_bitshift_def{
3766 enum scratch_acc_change_info_bits_def{
3771 enum scratch_pre_os_mode_info_bits_def{