64 		/* TCP L1 Cache per CU */
98 		/* TCP L1 Cache per CU */
146 		struct crat_subtype_computeunit *cu)  in kfd_populated_cu_info_cpu()  argument
148 	dev->node_props.cpu_cores_count = cu->num_cpu_cores;  in kfd_populated_cu_info_cpu()
149 	dev->node_props.cpu_core_id_base = cu->processor_id_low;  in kfd_populated_cu_info_cpu()
150 	if (cu->hsa_capability & CRAT_CU_FLAGS_IOMMU_PRESENT)  in kfd_populated_cu_info_cpu()
153 	pr_debug("CU CPU: cores=%d id_base=%d\n", cu->num_cpu_cores,  in kfd_populated_cu_info_cpu()
154 			cu->processor_id_low);  in kfd_populated_cu_info_cpu()
158 		struct crat_subtype_computeunit *cu)  in kfd_populated_cu_info_gpu()  argument
160 	dev->node_props.simd_id_base = cu->processor_id_low;  in kfd_populated_cu_info_gpu()
161 	dev->node_props.simd_count = cu->num_simd_cores;  in kfd_populated_cu_info_gpu()
162 	dev->node_props.lds_size_in_kb = cu->lds_size_in_kb;  in kfd_populated_cu_info_gpu()
163 	dev->node_props.max_waves_per_simd = cu->max_waves_simd;  in kfd_populated_cu_info_gpu()
164 	dev->node_props.wave_front_size = cu->wave_front_size;  in kfd_populated_cu_info_gpu()
165 	dev->node_props.array_count = cu->array_count;  in kfd_populated_cu_info_gpu()
166 	dev->node_props.cu_per_simd_array = cu->num_cu_per_array;  in kfd_populated_cu_info_gpu()
167 	dev->node_props.simd_per_cu = cu->num_simd_per_cu;  in kfd_populated_cu_info_gpu()
168 	dev->node_props.max_slots_scratch_cu = cu->max_slots_scatch_cu;  in kfd_populated_cu_info_gpu()
169 	if (cu->hsa_capability & CRAT_CU_FLAGS_HOT_PLUGGABLE)  in kfd_populated_cu_info_gpu()
171 	pr_debug("CU GPU: id_base=%d\n", cu->processor_id_low);  in kfd_populated_cu_info_gpu()
177 static int kfd_parse_subtype_cu(struct crat_subtype_computeunit *cu,  in kfd_parse_subtype_cu()  argument
182 	pr_debug("Found CU entry in CRAT table with proximity_domain=%d caps=%x\n",  in kfd_parse_subtype_cu()
183 			cu->proximity_domain, cu->hsa_capability);  in kfd_parse_subtype_cu()
185 		if (cu->proximity_domain == dev->proximity_domain) {  in kfd_parse_subtype_cu()
186 			if (cu->flags & CRAT_CU_FLAGS_CPU_PRESENT)  in kfd_parse_subtype_cu()
187 				kfd_populated_cu_info_cpu(dev, cu);  in kfd_parse_subtype_cu()
189 			if (cu->flags & CRAT_CU_FLAGS_GPU_PRESENT)  in kfd_parse_subtype_cu()
190 				kfd_populated_cu_info_gpu(dev, cu);  in kfd_parse_subtype_cu()
430 	struct crat_subtype_computeunit *cu;  in kfd_parse_subtype()  local
438 		cu = (struct crat_subtype_computeunit *)sub_type_hdr;  in kfd_parse_subtype()
439 		ret = kfd_parse_subtype_cu(cu, device_list);  in kfd_parse_subtype()
566 	/* CU could be inactive. In case of shared cache find the first active  in fill_in_pcache()
567 	 * CU. and incase of non-shared cache check if the CU is inactive. If  in fill_in_pcache()
581 		 * inactive CU  in fill_in_pcache()
697 	 *			will parse through all available CU  in kfd_fill_gpu_cache_info()
699 	 *			then it will consider only one CU from  in kfd_fill_gpu_cache_info()
732 					/* Move to next CU block */  in kfd_fill_gpu_cache_info()
846 	/* Fill in CU data */  in kfd_fill_cu_for_cpu()
1170 	struct crat_subtype_computeunit *cu;  in kfd_create_vcrat_image_gpu()  local
1212 	/* Fill CU subtype data */  in kfd_create_vcrat_image_gpu()
1213 	cu = (struct crat_subtype_computeunit *)sub_type_hdr;  in kfd_create_vcrat_image_gpu()
1214 	cu->flags |= CRAT_CU_FLAGS_GPU_PRESENT;  in kfd_create_vcrat_image_gpu()
1215 	cu->proximity_domain = proximity_domain;  in kfd_create_vcrat_image_gpu()
1218 	cu->num_simd_per_cu = cu_info.simd_per_cu;  in kfd_create_vcrat_image_gpu()
1219 	cu->num_simd_cores = cu_info.simd_per_cu * cu_info.cu_active_number;  in kfd_create_vcrat_image_gpu()
1220 	cu->max_waves_simd = cu_info.max_waves_per_simd;  in kfd_create_vcrat_image_gpu()
1222 	cu->wave_front_size = cu_info.wave_front_size;  in kfd_create_vcrat_image_gpu()
1223 	cu->array_count = cu_info.num_shader_arrays_per_engine *  in kfd_create_vcrat_image_gpu()
1225 	total_num_of_cu = (cu->array_count * cu_info.num_cu_per_sh);  in kfd_create_vcrat_image_gpu()
1226 	cu->processor_id_low = get_and_inc_gpu_processor_id(total_num_of_cu);  in kfd_create_vcrat_image_gpu()
1227 	cu->num_cu_per_array = cu_info.num_cu_per_sh;  in kfd_create_vcrat_image_gpu()
1228 	cu->max_slots_scatch_cu = cu_info.max_scratch_slots_per_cu;  in kfd_create_vcrat_image_gpu()
1229 	cu->num_banks = cu_info.num_shader_engines;  in kfd_create_vcrat_image_gpu()
1230 	cu->lds_size_in_kb = cu_info.lds_size;  in kfd_create_vcrat_image_gpu()
1232 	cu->hsa_capability = 0;  in kfd_create_vcrat_image_gpu()
1238 		cu->hsa_capability |= CRAT_CU_FLAGS_IOMMU_PRESENT;  in kfd_create_vcrat_image_gpu()
1281 	ret = kfd_fill_gpu_cache_info(kdev, cu->processor_id_low,  in kfd_create_vcrat_image_gpu()